Merge branch 'linus' into x86/cleanups
[deliverable/linux.git] / arch / mips / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) 2000, 2001 Kanoj Sarcar
17 * Copyright (C) 2000, 2001 Ralf Baechle
18 * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
19 * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
20 */
21#include <linux/cache.h>
22#include <linux/delay.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/spinlock.h>
26#include <linux/threads.h>
27#include <linux/module.h>
28#include <linux/time.h>
29#include <linux/timex.h>
30#include <linux/sched.h>
31#include <linux/cpumask.h>
1e35aaba 32#include <linux/cpu.h>
4e950f6f 33#include <linux/err.h>
1da177e4
LT
34
35#include <asm/atomic.h>
36#include <asm/cpu.h>
37#include <asm/processor.h>
39b8d525 38#include <asm/r4k-timer.h>
1da177e4
LT
39#include <asm/system.h>
40#include <asm/mmu_context.h>
7bcf7717 41#include <asm/time.h>
1da177e4 42
41c594ab
RB
43#ifdef CONFIG_MIPS_MT_SMTC
44#include <asm/mipsmtregs.h>
45#endif /* CONFIG_MIPS_MT_SMTC */
46
1da177e4
LT
47cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
48volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
49cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
50int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
51int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
52
53EXPORT_SYMBOL(phys_cpu_present_map);
54EXPORT_SYMBOL(cpu_online_map);
55
b3f6df9f 56extern void cpu_idle(void);
1da177e4 57
0ab7aefc
RB
58/* Number of TCs (or siblings in Intel speak) per CPU core */
59int smp_num_siblings = 1;
60EXPORT_SYMBOL(smp_num_siblings);
61
62/* representing the TCs (or siblings in Intel speak) of each logical CPU */
63cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
64EXPORT_SYMBOL(cpu_sibling_map);
65
66/* representing cpus for which sibling maps can be computed */
67static cpumask_t cpu_sibling_setup_map;
68
69static inline void set_cpu_sibling_map(int cpu)
70{
71 int i;
72
73 cpu_set(cpu, cpu_sibling_setup_map);
74
75 if (smp_num_siblings > 1) {
76 for_each_cpu_mask(i, cpu_sibling_setup_map) {
77 if (cpu_data[cpu].core == cpu_data[i].core) {
78 cpu_set(i, cpu_sibling_map[cpu]);
79 cpu_set(cpu, cpu_sibling_map[i]);
80 }
81 }
82 } else
83 cpu_set(cpu, cpu_sibling_map[cpu]);
84}
85
87353d8a
RB
86struct plat_smp_ops *mp_ops;
87
88__cpuinit void register_smp_ops(struct plat_smp_ops *ops)
89{
83738e30
TS
90 if (mp_ops)
91 printk(KERN_WARNING "Overriding previously set SMP ops\n");
87353d8a
RB
92
93 mp_ops = ops;
94}
95
1da177e4
LT
96/*
97 * First C code run on the secondary CPUs after being started up by
98 * the master.
99 */
4ebd5233 100asmlinkage __cpuinit void start_secondary(void)
1da177e4 101{
5bfb5d69 102 unsigned int cpu;
1da177e4 103
41c594ab
RB
104#ifdef CONFIG_MIPS_MT_SMTC
105 /* Only do cpu_probe for first TC of CPU */
106 if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
107#endif /* CONFIG_MIPS_MT_SMTC */
1da177e4
LT
108 cpu_probe();
109 cpu_report();
110 per_cpu_trap_init();
7bcf7717 111 mips_clockevent_init();
87353d8a 112 mp_ops->init_secondary();
1da177e4
LT
113
114 /*
115 * XXX parity protection should be folded in here when it's converted
116 * to an option instead of something based on .cputype
117 */
118
119 calibrate_delay();
5bfb5d69
NP
120 preempt_disable();
121 cpu = smp_processor_id();
1da177e4
LT
122 cpu_data[cpu].udelay_val = loops_per_jiffy;
123
87353d8a 124 mp_ops->smp_finish();
0ab7aefc 125 set_cpu_sibling_map(cpu);
1da177e4
LT
126
127 cpu_set(cpu, cpu_callin_map);
128
39b8d525
RB
129 synchronise_count_slave();
130
1da177e4
LT
131 cpu_idle();
132}
133
134DEFINE_SPINLOCK(smp_call_lock);
135
136struct call_data_struct *call_data;
137
138/*
139 * Run a function on all other CPUs.
bd6aeeff
RB
140 *
141 * <mask> cpuset_t of all processors to run the function on.
1da177e4
LT
142 * <func> The function to run. This must be fast and non-blocking.
143 * <info> An arbitrary pointer to pass to the function.
144 * <retry> If true, keep retrying until ready.
145 * <wait> If true, wait until function has completed on other CPUs.
146 * [RETURNS] 0 on success, else a negative status code.
147 *
148 * Does not return until remote CPUs are nearly ready to execute <func>
149 * or are or have executed.
150 *
151 * You must not call this function with disabled interrupts or from a
57f0060b
RB
152 * hardware interrupt handler or from a bottom half handler:
153 *
154 * CPU A CPU B
155 * Disable interrupts
156 * smp_call_function()
157 * Take call_lock
158 * Send IPIs
159 * Wait for all cpus to acknowledge IPI
160 * CPU A has not responded, spin waiting
161 * for cpu A to respond, holding call_lock
162 * smp_call_function()
163 * Spin waiting for call_lock
164 * Deadlock Deadlock
1da177e4 165 */
bd6aeeff
RB
166int smp_call_function_mask(cpumask_t mask, void (*func) (void *info),
167 void *info, int retry, int wait)
1da177e4
LT
168{
169 struct call_data_struct data;
1da177e4 170 int cpu = smp_processor_id();
bd6aeeff 171 int cpus;
1da177e4 172
ae1b3d51
RB
173 /*
174 * Can die spectacularly if this CPU isn't yet marked online
175 */
176 BUG_ON(!cpu_online(cpu));
177
bd6aeeff
RB
178 cpu_clear(cpu, mask);
179 cpus = cpus_weight(mask);
1da177e4
LT
180 if (!cpus)
181 return 0;
182
183 /* Can deadlock when called with interrupts disabled */
184 WARN_ON(irqs_disabled());
185
186 data.func = func;
187 data.info = info;
188 atomic_set(&data.started, 0);
189 data.wait = wait;
190 if (wait)
191 atomic_set(&data.finished, 0);
192
193 spin_lock(&smp_call_lock);
194 call_data = &data;
0004a9df 195 smp_mb();
1da177e4
LT
196
197 /* Send a message to all other CPUs and wait for them to respond */
87353d8a 198 mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION);
1da177e4
LT
199
200 /* Wait for response */
201 /* FIXME: lock-up detection, backtrace on lock-up */
202 while (atomic_read(&data.started) != cpus)
203 barrier();
204
205 if (wait)
206 while (atomic_read(&data.finished) != cpus)
207 barrier();
41c594ab 208 call_data = NULL;
1da177e4
LT
209 spin_unlock(&smp_call_lock);
210
211 return 0;
212}
213
bd6aeeff
RB
214int smp_call_function(void (*func) (void *info), void *info, int retry,
215 int wait)
216{
217 return smp_call_function_mask(cpu_online_map, func, info, retry, wait);
218}
a9ad02bd 219EXPORT_SYMBOL(smp_call_function);
41c594ab 220
1da177e4
LT
221void smp_call_function_interrupt(void)
222{
223 void (*func) (void *info) = call_data->func;
224 void *info = call_data->info;
225 int wait = call_data->wait;
226
227 /*
228 * Notify initiating CPU that I've grabbed the data and am
229 * about to execute the function.
230 */
0004a9df 231 smp_mb();
1da177e4
LT
232 atomic_inc(&call_data->started);
233
234 /*
235 * At this point the info structure may be out of scope unless wait==1.
236 */
237 irq_enter();
238 (*func)(info);
239 irq_exit();
240
241 if (wait) {
0004a9df 242 smp_mb();
1da177e4
LT
243 atomic_inc(&call_data->finished);
244 }
245}
246
b4b2917c
PW
247int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
248 int retry, int wait)
249{
bd6aeeff 250 int ret, me;
b4b2917c
PW
251
252 /*
253 * Can die spectacularly if this CPU isn't yet marked online
254 */
255 if (!cpu_online(cpu))
256 return 0;
257
258 me = get_cpu();
259 BUG_ON(!cpu_online(me));
260
261 if (cpu == me) {
262 local_irq_disable();
263 func(info);
264 local_irq_enable();
265 put_cpu();
266 return 0;
267 }
268
bd6aeeff
RB
269 ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, retry,
270 wait);
b4b2917c
PW
271
272 put_cpu();
273 return 0;
274}
a9ad02bd 275EXPORT_SYMBOL(smp_call_function_single);
b4b2917c 276
1da177e4
LT
277static void stop_this_cpu(void *dummy)
278{
279 /*
280 * Remove this CPU:
281 */
282 cpu_clear(smp_processor_id(), cpu_online_map);
283 local_irq_enable(); /* May need to service _machine_restart IPI */
284 for (;;); /* Wait if available. */
285}
286
287void smp_send_stop(void)
288{
289 smp_call_function(stop_this_cpu, NULL, 1, 0);
290}
291
292void __init smp_cpus_done(unsigned int max_cpus)
293{
87353d8a 294 mp_ops->cpus_done();
39b8d525 295 synchronise_count_master();
1da177e4
LT
296}
297
298/* called from main before smp_init() */
299void __init smp_prepare_cpus(unsigned int max_cpus)
300{
1da177e4
LT
301 init_new_context(current, &init_mm);
302 current_thread_info()->cpu = 0;
87353d8a 303 mp_ops->prepare_cpus(max_cpus);
0ab7aefc 304 set_cpu_sibling_map(0);
320e6aba
RB
305#ifndef CONFIG_HOTPLUG_CPU
306 cpu_present_map = cpu_possible_map;
307#endif
1da177e4
LT
308}
309
310/* preload SMP state for boot cpu */
311void __devinit smp_prepare_boot_cpu(void)
312{
313 /*
314 * This assumes that bootup is always handled by the processor
315 * with the logic and physical number 0.
316 */
317 __cpu_number_map[0] = 0;
318 __cpu_logical_map[0] = 0;
319 cpu_set(0, phys_cpu_present_map);
320 cpu_set(0, cpu_online_map);
321 cpu_set(0, cpu_callin_map);
322}
323
324/*
b727a602
RB
325 * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
326 * and keep control until "cpu_online(cpu)" is set. Note: cpu is
327 * physical, not logical.
1da177e4 328 */
b282b6f8 329int __cpuinit __cpu_up(unsigned int cpu)
1da177e4
LT
330{
331 struct task_struct *idle;
332
333 /*
b727a602 334 * Processor goes to start_secondary(), sets online flag
1da177e4
LT
335 * The following code is purely to make sure
336 * Linux can schedule processes on this slave.
337 */
338 idle = fork_idle(cpu);
339 if (IS_ERR(idle))
b727a602 340 panic(KERN_ERR "Fork failed for CPU %d", cpu);
1da177e4 341
87353d8a 342 mp_ops->boot_secondary(cpu, idle);
1da177e4 343
b727a602
RB
344 /*
345 * Trust is futile. We should really have timeouts ...
346 */
1da177e4
LT
347 while (!cpu_isset(cpu, cpu_callin_map))
348 udelay(100);
349
350 cpu_set(cpu, cpu_online_map);
351
352 return 0;
353}
354
1da177e4
LT
355/* Not really SMP stuff ... */
356int setup_profiling_timer(unsigned int multiplier)
357{
358 return 0;
359}
360
361static void flush_tlb_all_ipi(void *info)
362{
363 local_flush_tlb_all();
364}
365
366void flush_tlb_all(void)
367{
9a244b95 368 on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1);
1da177e4
LT
369}
370
371static void flush_tlb_mm_ipi(void *mm)
372{
373 local_flush_tlb_mm((struct mm_struct *)mm);
374}
375
25969354
RB
376/*
377 * Special Variant of smp_call_function for use by TLB functions:
378 *
379 * o No return value
380 * o collapses to normal function call on UP kernels
381 * o collapses to normal function call on systems with a single shared
382 * primary cache.
383 * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
384 */
385static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
386{
387#ifndef CONFIG_MIPS_MT_SMTC
388 smp_call_function(func, info, 1, 1);
389#endif
390}
391
392static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
393{
394 preempt_disable();
395
396 smp_on_other_tlbs(func, info);
397 func(info);
398
399 preempt_enable();
400}
401
1da177e4
LT
402/*
403 * The following tlb flush calls are invoked when old translations are
404 * being torn down, or pte attributes are changing. For single threaded
405 * address spaces, a new context is obtained on the current cpu, and tlb
406 * context on other cpus are invalidated to force a new context allocation
407 * at switch_mm time, should the mm ever be used on other cpus. For
408 * multithreaded address spaces, intercpu interrupts have to be sent.
409 * Another case where intercpu interrupts are required is when the target
410 * mm might be active on another cpu (eg debuggers doing the flushes on
411 * behalf of debugees, kswapd stealing pages from another process etc).
412 * Kanoj 07/00.
413 */
414
415void flush_tlb_mm(struct mm_struct *mm)
416{
417 preempt_disable();
418
419 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
c50cade9 420 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
1da177e4 421 } else {
b5eb5511
RB
422 cpumask_t mask = cpu_online_map;
423 unsigned int cpu;
424
425 cpu_clear(smp_processor_id(), mask);
ece8a9e4 426 for_each_cpu_mask(cpu, mask)
b5eb5511
RB
427 if (cpu_context(cpu, mm))
428 cpu_context(cpu, mm) = 0;
1da177e4
LT
429 }
430 local_flush_tlb_mm(mm);
431
432 preempt_enable();
433}
434
435struct flush_tlb_data {
436 struct vm_area_struct *vma;
437 unsigned long addr1;
438 unsigned long addr2;
439};
440
441static void flush_tlb_range_ipi(void *info)
442{
c50cade9 443 struct flush_tlb_data *fd = info;
1da177e4
LT
444
445 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
446}
447
448void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
449{
450 struct mm_struct *mm = vma->vm_mm;
451
452 preempt_disable();
453 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
89a8a5a6
RB
454 struct flush_tlb_data fd = {
455 .vma = vma,
456 .addr1 = start,
457 .addr2 = end,
458 };
1da177e4 459
c50cade9 460 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
1da177e4 461 } else {
b5eb5511
RB
462 cpumask_t mask = cpu_online_map;
463 unsigned int cpu;
464
465 cpu_clear(smp_processor_id(), mask);
ece8a9e4 466 for_each_cpu_mask(cpu, mask)
b5eb5511
RB
467 if (cpu_context(cpu, mm))
468 cpu_context(cpu, mm) = 0;
1da177e4
LT
469 }
470 local_flush_tlb_range(vma, start, end);
471 preempt_enable();
472}
473
474static void flush_tlb_kernel_range_ipi(void *info)
475{
c50cade9 476 struct flush_tlb_data *fd = info;
1da177e4
LT
477
478 local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
479}
480
481void flush_tlb_kernel_range(unsigned long start, unsigned long end)
482{
89a8a5a6
RB
483 struct flush_tlb_data fd = {
484 .addr1 = start,
485 .addr2 = end,
486 };
1da177e4 487
c50cade9 488 on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1, 1);
1da177e4
LT
489}
490
491static void flush_tlb_page_ipi(void *info)
492{
c50cade9 493 struct flush_tlb_data *fd = info;
1da177e4
LT
494
495 local_flush_tlb_page(fd->vma, fd->addr1);
496}
497
498void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
499{
500 preempt_disable();
501 if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
89a8a5a6
RB
502 struct flush_tlb_data fd = {
503 .vma = vma,
504 .addr1 = page,
505 };
1da177e4 506
c50cade9 507 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
1da177e4 508 } else {
b5eb5511
RB
509 cpumask_t mask = cpu_online_map;
510 unsigned int cpu;
511
512 cpu_clear(smp_processor_id(), mask);
ece8a9e4 513 for_each_cpu_mask(cpu, mask)
b5eb5511
RB
514 if (cpu_context(cpu, vma->vm_mm))
515 cpu_context(cpu, vma->vm_mm) = 0;
1da177e4
LT
516 }
517 local_flush_tlb_page(vma, page);
518 preempt_enable();
519}
520
521static void flush_tlb_one_ipi(void *info)
522{
523 unsigned long vaddr = (unsigned long) info;
524
525 local_flush_tlb_one(vaddr);
526}
527
528void flush_tlb_one(unsigned long vaddr)
529{
25969354 530 smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
1da177e4
LT
531}
532
533EXPORT_SYMBOL(flush_tlb_page);
534EXPORT_SYMBOL(flush_tlb_one);
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