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1da177e4 LT |
1 | /* |
2 | * Copyright 2001 MontaVista Software Inc. | |
3 | * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net | |
4 | * Copyright (c) 2003, 2004 Maciej W. Rozycki | |
5 | * | |
6 | * Common time service routines for MIPS machines. See | |
7 | * Documentation/mips/time.README. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | #include <linux/types.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/param.h> | |
19 | #include <linux/time.h> | |
20 | #include <linux/timex.h> | |
21 | #include <linux/smp.h> | |
22 | #include <linux/kernel_stat.h> | |
23 | #include <linux/spinlock.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/module.h> | |
26 | ||
27 | #include <asm/bootinfo.h> | |
ec74e361 | 28 | #include <asm/cache.h> |
1da177e4 LT |
29 | #include <asm/compiler.h> |
30 | #include <asm/cpu.h> | |
31 | #include <asm/cpu-features.h> | |
32 | #include <asm/div64.h> | |
33 | #include <asm/sections.h> | |
34 | #include <asm/time.h> | |
35 | ||
36 | /* | |
37 | * The integer part of the number of usecs per jiffy is taken from tick, | |
38 | * but the fractional part is not recorded, so we calculate it using the | |
39 | * initial value of HZ. This aids systems where tick isn't really an | |
40 | * integer (e.g. for HZ = 128). | |
41 | */ | |
42 | #define USECS_PER_JIFFY TICK_SIZE | |
43 | #define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ)) | |
44 | ||
45 | #define TICK_SIZE (tick_nsec / 1000) | |
46 | ||
1da177e4 LT |
47 | /* |
48 | * forward reference | |
49 | */ | |
1da177e4 LT |
50 | DEFINE_SPINLOCK(rtc_lock); |
51 | ||
52 | /* | |
53 | * By default we provide the null RTC ops | |
54 | */ | |
55 | static unsigned long null_rtc_get_time(void) | |
56 | { | |
57 | return mktime(2000, 1, 1, 0, 0, 0); | |
58 | } | |
59 | ||
60 | static int null_rtc_set_time(unsigned long sec) | |
61 | { | |
62 | return 0; | |
63 | } | |
64 | ||
d23ee8fe YY |
65 | unsigned long (*rtc_mips_get_time)(void) = null_rtc_get_time; |
66 | int (*rtc_mips_set_time)(unsigned long) = null_rtc_set_time; | |
67 | int (*rtc_mips_set_mmss)(unsigned long); | |
1da177e4 LT |
68 | |
69 | ||
1da177e4 | 70 | /* how many counter cycles in a jiffy */ |
ec74e361 | 71 | static unsigned long cycles_per_jiffy __read_mostly; |
1da177e4 | 72 | |
1da177e4 LT |
73 | /* expirelo is the count value for next CPU timer interrupt */ |
74 | static unsigned int expirelo; | |
75 | ||
76 | ||
77 | /* | |
78 | * Null timer ack for systems not needing one (e.g. i8254). | |
79 | */ | |
80 | static void null_timer_ack(void) { /* nothing */ } | |
81 | ||
82 | /* | |
83 | * Null high precision timer functions for systems lacking one. | |
84 | */ | |
00598560 | 85 | static cycle_t null_hpt_read(void) |
1da177e4 LT |
86 | { |
87 | return 0; | |
88 | } | |
89 | ||
1da177e4 LT |
90 | /* |
91 | * Timer ack for an R4k-compatible timer of a known frequency. | |
92 | */ | |
93 | static void c0_timer_ack(void) | |
94 | { | |
95 | unsigned int count; | |
96 | ||
97 | /* Ack this timer interrupt and set the next one. */ | |
98 | expirelo += cycles_per_jiffy; | |
99 | write_c0_compare(expirelo); | |
100 | ||
101 | /* Check to see if we have missed any timer interrupts. */ | |
41c594ab | 102 | while (((count = read_c0_count()) - expirelo) < 0x7fffffff) { |
1da177e4 LT |
103 | /* missed_timer_count++; */ |
104 | expirelo = count + cycles_per_jiffy; | |
105 | write_c0_compare(expirelo); | |
106 | } | |
107 | } | |
108 | ||
109 | /* | |
110 | * High precision timer functions for a R4k-compatible timer. | |
111 | */ | |
00598560 | 112 | static cycle_t c0_hpt_read(void) |
1da177e4 LT |
113 | { |
114 | return read_c0_count(); | |
115 | } | |
116 | ||
1da177e4 | 117 | /* For use both as a high precision timer and an interrupt source. */ |
16b7b2ac | 118 | static void __init c0_hpt_timer_init(void) |
1da177e4 | 119 | { |
16b7b2ac | 120 | expirelo = read_c0_count() + cycles_per_jiffy; |
1da177e4 | 121 | write_c0_compare(expirelo); |
1da177e4 LT |
122 | } |
123 | ||
124 | int (*mips_timer_state)(void); | |
125 | void (*mips_timer_ack)(void); | |
1da177e4 LT |
126 | |
127 | /* last time when xtime and rtc are sync'ed up */ | |
128 | static long last_rtc_update; | |
129 | ||
130 | /* | |
131 | * local_timer_interrupt() does profiling and process accounting | |
132 | * on a per-CPU basis. | |
133 | * | |
134 | * In UP mode, it is invoked from the (global) timer_interrupt. | |
135 | * | |
136 | * In SMP mode, it might invoked by per-CPU timer interrupt, or | |
137 | * a broadcasted inter-processor interrupt which itself is triggered | |
138 | * by the global timer interrupt. | |
139 | */ | |
7d12e780 | 140 | void local_timer_interrupt(int irq, void *dev_id) |
1da177e4 | 141 | { |
937a8015 | 142 | profile_tick(CPU_PROFILING); |
7d12e780 | 143 | update_process_times(user_mode(get_irq_regs())); |
1da177e4 LT |
144 | } |
145 | ||
146 | /* | |
147 | * High-level timer interrupt service routines. This function | |
148 | * is set as irqaction->handler and is invoked through do_IRQ. | |
149 | */ | |
7d12e780 | 150 | irqreturn_t timer_interrupt(int irq, void *dev_id) |
1da177e4 | 151 | { |
d6bd0e6b RB |
152 | write_seqlock(&xtime_lock); |
153 | ||
1da177e4 LT |
154 | mips_timer_ack(); |
155 | ||
1da177e4 LT |
156 | /* |
157 | * call the generic timer interrupt handling | |
158 | */ | |
3171a030 | 159 | do_timer(1); |
1da177e4 LT |
160 | |
161 | /* | |
162 | * If we have an externally synchronized Linux clock, then update | |
d23ee8fe | 163 | * CMOS clock accordingly every ~11 minutes. rtc_mips_set_time() has to be |
1da177e4 LT |
164 | * called as close as possible to 500 ms before the new second starts. |
165 | */ | |
b149ee22 | 166 | if (ntp_synced() && |
1da177e4 LT |
167 | xtime.tv_sec > last_rtc_update + 660 && |
168 | (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && | |
169 | (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { | |
d23ee8fe | 170 | if (rtc_mips_set_mmss(xtime.tv_sec) == 0) { |
1da177e4 LT |
171 | last_rtc_update = xtime.tv_sec; |
172 | } else { | |
173 | /* do it again in 60 s */ | |
174 | last_rtc_update = xtime.tv_sec - 600; | |
175 | } | |
176 | } | |
1da177e4 | 177 | |
d6bd0e6b RB |
178 | write_sequnlock(&xtime_lock); |
179 | ||
1da177e4 LT |
180 | /* |
181 | * In UP mode, we call local_timer_interrupt() to do profiling | |
182 | * and process accouting. | |
183 | * | |
184 | * In SMP mode, local_timer_interrupt() is invoked by appropriate | |
185 | * low-level local timer interrupt handler. | |
186 | */ | |
7d12e780 | 187 | local_timer_interrupt(irq, dev_id); |
1da177e4 LT |
188 | |
189 | return IRQ_HANDLED; | |
190 | } | |
191 | ||
7d12e780 | 192 | int null_perf_irq(void) |
ba339c03 RB |
193 | { |
194 | return 0; | |
195 | } | |
196 | ||
7d12e780 | 197 | int (*perf_irq)(void) = null_perf_irq; |
ba339c03 RB |
198 | |
199 | EXPORT_SYMBOL(null_perf_irq); | |
200 | EXPORT_SYMBOL(perf_irq); | |
201 | ||
937a8015 | 202 | asmlinkage void ll_timer_interrupt(int irq) |
1da177e4 | 203 | { |
ba339c03 RB |
204 | int r2 = cpu_has_mips_r2; |
205 | ||
1da177e4 LT |
206 | irq_enter(); |
207 | kstat_this_cpu.irqs[irq]++; | |
208 | ||
ba339c03 RB |
209 | /* |
210 | * Suckage alert: | |
211 | * Before R2 of the architecture there was no way to see if a | |
212 | * performance counter interrupt was pending, so we have to run the | |
213 | * performance counter interrupt handler anyway. | |
214 | */ | |
215 | if (!r2 || (read_c0_cause() & (1 << 26))) | |
7d12e780 | 216 | if (perf_irq()) |
ba339c03 RB |
217 | goto out; |
218 | ||
1da177e4 | 219 | /* we keep interrupt disabled all the time */ |
ba339c03 | 220 | if (!r2 || (read_c0_cause() & (1 << 30))) |
7d12e780 | 221 | timer_interrupt(irq, NULL); |
1da177e4 | 222 | |
ba339c03 | 223 | out: |
1da177e4 LT |
224 | irq_exit(); |
225 | } | |
226 | ||
937a8015 | 227 | asmlinkage void ll_local_timer_interrupt(int irq) |
1da177e4 LT |
228 | { |
229 | irq_enter(); | |
230 | if (smp_processor_id() != 0) | |
231 | kstat_this_cpu.irqs[irq]++; | |
232 | ||
233 | /* we keep interrupt disabled all the time */ | |
7d12e780 | 234 | local_timer_interrupt(irq, NULL); |
1da177e4 LT |
235 | |
236 | irq_exit(); | |
237 | } | |
238 | ||
239 | /* | |
240 | * time_init() - it does the following things. | |
241 | * | |
242 | * 1) board_time_init() - | |
243 | * a) (optional) set up RTC routines, | |
244 | * b) (optional) calibrate and set the mips_hpt_frequency | |
16b7b2ac AN |
245 | * (only needed if you intended to use cpu counter as timer interrupt |
246 | * source) | |
d23ee8fe | 247 | * 2) setup xtime based on rtc_mips_get_time(). |
16b7b2ac AN |
248 | * 3) calculate a couple of cached variables for later usage |
249 | * 4) plat_timer_setup() - | |
1da177e4 LT |
250 | * a) (optional) over-write any choices made above by time_init(). |
251 | * b) machine specific code should setup the timer irqaction. | |
252 | * c) enable the timer interrupt | |
253 | */ | |
254 | ||
255 | void (*board_time_init)(void); | |
1da177e4 LT |
256 | |
257 | unsigned int mips_hpt_frequency; | |
258 | ||
259 | static struct irqaction timer_irqaction = { | |
260 | .handler = timer_interrupt, | |
f40298fd | 261 | .flags = IRQF_DISABLED, |
1da177e4 LT |
262 | .name = "timer", |
263 | }; | |
264 | ||
265 | static unsigned int __init calibrate_hpt(void) | |
266 | { | |
00598560 | 267 | cycle_t frequency, hpt_start, hpt_end, hpt_count, hz; |
1da177e4 LT |
268 | |
269 | const int loops = HZ / 10; | |
270 | int log_2_loops = 0; | |
271 | int i; | |
272 | ||
273 | /* | |
274 | * We want to calibrate for 0.1s, but to avoid a 64-bit | |
275 | * division we round the number of loops up to the nearest | |
276 | * power of 2. | |
277 | */ | |
278 | while (loops > 1 << log_2_loops) | |
279 | log_2_loops++; | |
280 | i = 1 << log_2_loops; | |
281 | ||
282 | /* | |
283 | * Wait for a rising edge of the timer interrupt. | |
284 | */ | |
285 | while (mips_timer_state()); | |
286 | while (!mips_timer_state()); | |
287 | ||
288 | /* | |
289 | * Now see how many high precision timer ticks happen | |
290 | * during the calculated number of periods between timer | |
291 | * interrupts. | |
292 | */ | |
00598560 | 293 | hpt_start = clocksource_mips.read(); |
1da177e4 LT |
294 | do { |
295 | while (mips_timer_state()); | |
296 | while (!mips_timer_state()); | |
297 | } while (--i); | |
00598560 | 298 | hpt_end = clocksource_mips.read(); |
1da177e4 | 299 | |
00598560 | 300 | hpt_count = (hpt_end - hpt_start) & clocksource_mips.mask; |
1da177e4 | 301 | hz = HZ; |
00598560 | 302 | frequency = hpt_count * hz; |
1da177e4 LT |
303 | |
304 | return frequency >> log_2_loops; | |
305 | } | |
306 | ||
00598560 | 307 | struct clocksource clocksource_mips = { |
16b7b2ac | 308 | .name = "MIPS", |
55d0b4e3 | 309 | .mask = CLOCKSOURCE_MASK(32), |
877fe380 | 310 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
16b7b2ac AN |
311 | }; |
312 | ||
313 | static void __init init_mips_clocksource(void) | |
314 | { | |
315 | u64 temp; | |
316 | u32 shift; | |
317 | ||
00598560 | 318 | if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read) |
16b7b2ac AN |
319 | return; |
320 | ||
321 | /* Calclate a somewhat reasonable rating value */ | |
322 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; | |
323 | /* Find a shift value */ | |
324 | for (shift = 32; shift > 0; shift--) { | |
325 | temp = (u64) NSEC_PER_SEC << shift; | |
326 | do_div(temp, mips_hpt_frequency); | |
327 | if ((temp >> 32) == 0) | |
328 | break; | |
329 | } | |
330 | clocksource_mips.shift = shift; | |
331 | clocksource_mips.mult = (u32)temp; | |
16b7b2ac AN |
332 | |
333 | clocksource_register(&clocksource_mips); | |
334 | } | |
335 | ||
1da177e4 LT |
336 | void __init time_init(void) |
337 | { | |
338 | if (board_time_init) | |
339 | board_time_init(); | |
340 | ||
d23ee8fe YY |
341 | if (!rtc_mips_set_mmss) |
342 | rtc_mips_set_mmss = rtc_mips_set_time; | |
1da177e4 | 343 | |
d23ee8fe | 344 | xtime.tv_sec = rtc_mips_get_time(); |
1da177e4 LT |
345 | xtime.tv_nsec = 0; |
346 | ||
347 | set_normalized_timespec(&wall_to_monotonic, | |
348 | -xtime.tv_sec, -xtime.tv_nsec); | |
349 | ||
350 | /* Choose appropriate high precision timer routines. */ | |
00598560 | 351 | if (!cpu_has_counter && !clocksource_mips.read) |
1da177e4 | 352 | /* No high precision timer -- sorry. */ |
00598560 | 353 | clocksource_mips.read = null_hpt_read; |
16b7b2ac | 354 | else if (!mips_hpt_frequency && !mips_timer_state) { |
1da177e4 | 355 | /* A high precision timer of unknown frequency. */ |
00598560 | 356 | if (!clocksource_mips.read) |
1da177e4 | 357 | /* No external high precision timer -- use R4k. */ |
00598560 | 358 | clocksource_mips.read = c0_hpt_read; |
1da177e4 LT |
359 | } else { |
360 | /* We know counter frequency. Or we can get it. */ | |
00598560 | 361 | if (!clocksource_mips.read) { |
1da177e4 | 362 | /* No external high precision timer -- use R4k. */ |
00598560 | 363 | clocksource_mips.read = c0_hpt_read; |
1da177e4 | 364 | |
16b7b2ac | 365 | if (!mips_timer_state) { |
1da177e4 | 366 | /* No external timer interrupt -- use R4k. */ |
1da177e4 | 367 | mips_timer_ack = c0_timer_ack; |
c87b6eba AN |
368 | /* Calculate cache parameters. */ |
369 | cycles_per_jiffy = | |
370 | (mips_hpt_frequency + HZ / 2) / HZ; | |
371 | /* | |
372 | * This sets up the high precision | |
373 | * timer for the first interrupt. | |
374 | */ | |
375 | c0_hpt_timer_init(); | |
1da177e4 LT |
376 | } |
377 | } | |
378 | if (!mips_hpt_frequency) | |
379 | mips_hpt_frequency = calibrate_hpt(); | |
380 | ||
1da177e4 LT |
381 | /* Report the high precision timer rate for a reference. */ |
382 | printk("Using %u.%03u MHz high precision timer.\n", | |
383 | ((mips_hpt_frequency + 500) / 1000) / 1000, | |
384 | ((mips_hpt_frequency + 500) / 1000) % 1000); | |
385 | } | |
386 | ||
387 | if (!mips_timer_ack) | |
388 | /* No timer interrupt ack (e.g. i8254). */ | |
389 | mips_timer_ack = null_timer_ack; | |
390 | ||
1da177e4 LT |
391 | /* |
392 | * Call board specific timer interrupt setup. | |
393 | * | |
394 | * this pointer must be setup in machine setup routine. | |
395 | * | |
396 | * Even if a machine chooses to use a low-level timer interrupt, | |
397 | * it still needs to setup the timer_irqaction. | |
398 | * In that case, it might be better to set timer_irqaction.handler | |
399 | * to be NULL function so that we are sure the high-level code | |
400 | * is not invoked accidentally. | |
401 | */ | |
54d0a216 | 402 | plat_timer_setup(&timer_irqaction); |
16b7b2ac AN |
403 | |
404 | init_mips_clocksource(); | |
1da177e4 LT |
405 | } |
406 | ||
407 | #define FEBRUARY 2 | |
408 | #define STARTOFTIME 1970 | |
409 | #define SECDAY 86400L | |
410 | #define SECYR (SECDAY * 365) | |
411 | #define leapyear(y) ((!((y) % 4) && ((y) % 100)) || !((y) % 400)) | |
412 | #define days_in_year(y) (leapyear(y) ? 366 : 365) | |
413 | #define days_in_month(m) (month_days[(m) - 1]) | |
414 | ||
415 | static int month_days[12] = { | |
416 | 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 | |
417 | }; | |
418 | ||
419 | void to_tm(unsigned long tim, struct rtc_time *tm) | |
420 | { | |
421 | long hms, day, gday; | |
422 | int i; | |
423 | ||
424 | gday = day = tim / SECDAY; | |
425 | hms = tim % SECDAY; | |
426 | ||
427 | /* Hours, minutes, seconds are easy */ | |
428 | tm->tm_hour = hms / 3600; | |
429 | tm->tm_min = (hms % 3600) / 60; | |
430 | tm->tm_sec = (hms % 3600) % 60; | |
431 | ||
432 | /* Number of years in days */ | |
433 | for (i = STARTOFTIME; day >= days_in_year(i); i++) | |
434 | day -= days_in_year(i); | |
435 | tm->tm_year = i; | |
436 | ||
437 | /* Number of months in days left */ | |
438 | if (leapyear(tm->tm_year)) | |
439 | days_in_month(FEBRUARY) = 29; | |
440 | for (i = 1; day >= days_in_month(i); i++) | |
441 | day -= days_in_month(i); | |
442 | days_in_month(FEBRUARY) = 28; | |
443 | tm->tm_mon = i - 1; /* tm_mon starts from 0 to 11 */ | |
444 | ||
445 | /* Days are what is left over (+1) from all that. */ | |
446 | tm->tm_mday = day + 1; | |
447 | ||
448 | /* | |
449 | * Determine the day of week | |
450 | */ | |
451 | tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */ | |
452 | } | |
453 | ||
454 | EXPORT_SYMBOL(rtc_lock); | |
455 | EXPORT_SYMBOL(to_tm); | |
d23ee8fe YY |
456 | EXPORT_SYMBOL(rtc_mips_set_time); |
457 | EXPORT_SYMBOL(rtc_mips_get_time); |