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1da177e4 LT |
1 | /* |
2 | * Copyright 2001 MontaVista Software Inc. | |
3 | * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net | |
4 | * Copyright (c) 2003, 2004 Maciej W. Rozycki | |
5 | * | |
d9eec1a5 | 6 | * Common time service routines for MIPS machines. |
1da177e4 | 7 | * |
70342287 RB |
8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms of the GNU General Public License as published by the | |
1da177e4 LT |
10 | * Free Software Foundation; either version 2 of the License, or (at your |
11 | * option) any later version. | |
12 | */ | |
656db506 | 13 | #include <linux/bug.h> |
7bcf7717 | 14 | #include <linux/clockchips.h> |
1da177e4 LT |
15 | #include <linux/types.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/param.h> | |
20 | #include <linux/time.h> | |
21 | #include <linux/timex.h> | |
22 | #include <linux/smp.h> | |
1da177e4 | 23 | #include <linux/spinlock.h> |
73bc256d | 24 | #include <linux/export.h> |
1da177e4 | 25 | |
1da177e4 | 26 | #include <asm/cpu-features.h> |
69f24d17 | 27 | #include <asm/cpu-type.h> |
1da177e4 | 28 | #include <asm/div64.h> |
1da177e4 LT |
29 | #include <asm/time.h> |
30 | ||
1da177e4 LT |
31 | /* |
32 | * forward reference | |
33 | */ | |
1da177e4 | 34 | DEFINE_SPINLOCK(rtc_lock); |
4b550488 | 35 | EXPORT_SYMBOL(rtc_lock); |
1da177e4 | 36 | |
4b550488 | 37 | int __weak rtc_mips_set_time(unsigned long sec) |
1da177e4 | 38 | { |
4b550488 | 39 | return 0; |
1da177e4 LT |
40 | } |
41 | ||
4b550488 | 42 | int __weak rtc_mips_set_mmss(unsigned long nowtime) |
1da177e4 | 43 | { |
4b550488 | 44 | return rtc_mips_set_time(nowtime); |
1da177e4 LT |
45 | } |
46 | ||
f5ff0a28 RB |
47 | int update_persistent_clock(struct timespec now) |
48 | { | |
49 | return rtc_mips_set_mmss(now.tv_sec); | |
50 | } | |
1da177e4 | 51 | |
46684734 | 52 | static int null_perf_irq(void) |
ba339c03 RB |
53 | { |
54 | return 0; | |
55 | } | |
56 | ||
7d12e780 | 57 | int (*perf_irq)(void) = null_perf_irq; |
ba339c03 | 58 | |
ba339c03 RB |
59 | EXPORT_SYMBOL(perf_irq); |
60 | ||
1da177e4 LT |
61 | /* |
62 | * time_init() - it does the following things. | |
63 | * | |
4b550488 | 64 | * 1) plat_time_init() - |
70342287 RB |
65 | * a) (optional) set up RTC routines, |
66 | * b) (optional) calibrate and set the mips_hpt_frequency | |
16b7b2ac AN |
67 | * (only needed if you intended to use cpu counter as timer interrupt |
68 | * source) | |
4b550488 | 69 | * 2) calculate a couple of cached variables for later usage |
1da177e4 LT |
70 | */ |
71 | ||
1da177e4 LT |
72 | unsigned int mips_hpt_frequency; |
73 | ||
656db506 RB |
74 | /* |
75 | * This function exists in order to cause an error due to a duplicate | |
76 | * definition if platform code should have its own implementation. The hook | |
77 | * to use instead is plat_time_init. plat_time_init does not receive the | |
70342287 | 78 | * irqaction pointer argument anymore. This is because any function which |
656db506 RB |
79 | * initializes an interrupt timer now takes care of its own request_irq rsp. |
80 | * setup_irq calls and each clock_event_device should use its own | |
81 | * struct irqrequest. | |
82 | */ | |
d9eec1a5 | 83 | void __init plat_timer_setup(void) |
7bcf7717 | 84 | { |
656db506 | 85 | BUG(); |
7bcf7717 RB |
86 | } |
87 | ||
5aa85c9f RB |
88 | static __init int cpu_has_mfc0_count_bug(void) |
89 | { | |
90 | switch (current_cpu_type()) { | |
91 | case CPU_R4000PC: | |
92 | case CPU_R4000SC: | |
93 | case CPU_R4000MC: | |
94 | /* | |
95 | * V3.0 is documented as suffering from the mfc0 from count bug. | |
70342287 | 96 | * Afaik this is the last version of the R4000. Later versions |
5aa85c9f RB |
97 | * were marketed as R4400. |
98 | */ | |
99 | return 1; | |
100 | ||
101 | case CPU_R4400PC: | |
102 | case CPU_R4400SC: | |
103 | case CPU_R4400MC: | |
104 | /* | |
25985edc | 105 | * The published errata for the R4400 up to 3.0 say the CPU |
5aa85c9f RB |
106 | * has the mfc0 from count bug. |
107 | */ | |
108 | if ((current_cpu_data.processor_id & 0xff) <= 0x30) | |
109 | return 1; | |
110 | ||
111 | /* | |
ce202cbb | 112 | * we assume newer revisions are ok |
5aa85c9f | 113 | */ |
ce202cbb | 114 | return 0; |
5aa85c9f RB |
115 | } |
116 | ||
117 | return 0; | |
118 | } | |
119 | ||
4b550488 RB |
120 | void __init time_init(void) |
121 | { | |
122 | plat_time_init(); | |
1da177e4 | 123 | |
afddce0c MR |
124 | /* |
125 | * The use of the R4k timer as a clock event takes precedence; | |
126 | * if reading the Count register might interfere with the timer | |
127 | * interrupt, then we don't use the timer as a clock source. | |
128 | * We may still use the timer as a clock source though if the | |
129 | * timer interrupt isn't reliable; the interference doesn't | |
130 | * matter then, because we don't use the interrupt. | |
131 | */ | |
132 | if (mips_clockevent_init() != 0 || !cpu_has_mfc0_count_bug()) | |
d9eec1a5 | 133 | init_mips_clocksource(); |
1da177e4 | 134 | } |