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MIPS: KVM: Quieten kvm_info() logging
[deliverable/linux.git] / arch / mips / kvm / kvm_mips.c
CommitLineData
669e846e
SL		 1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
10*/
11
12#include <linux/errno.h>
13#include <linux/err.h>
14#include <linux/module.h>
15#include <linux/vmalloc.h>
16#include <linux/fs.h>
17#include <linux/bootmem.h>
18#include <asm/page.h>
19#include <asm/cacheflush.h>
20#include <asm/mmu_context.h>
21
22#include <linux/kvm_host.h>
23
24#include "kvm_mips_int.h"
25#include "kvm_mips_comm.h"
26
27#define CREATE_TRACE_POINTS
28#include "trace.h"
29
30#ifndef VECTORSPACING
31#define VECTORSPACING 0x100 /* for EI/VI mode */
32#endif
33
34#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
35struct kvm_stats_debugfs_item debugfs_entries[] = {
36 { "wait", VCPU_STAT(wait_exits) },
37 { "cache", VCPU_STAT(cache_exits) },
38 { "signal", VCPU_STAT(signal_exits) },
39 { "interrupt", VCPU_STAT(int_exits) },
40 { "cop_unsuable", VCPU_STAT(cop_unusable_exits) },
41 { "tlbmod", VCPU_STAT(tlbmod_exits) },
42 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits) },
43 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits) },
44 { "addrerr_st", VCPU_STAT(addrerr_st_exits) },
45 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits) },
46 { "syscall", VCPU_STAT(syscall_exits) },
47 { "resvd_inst", VCPU_STAT(resvd_inst_exits) },
48 { "break_inst", VCPU_STAT(break_inst_exits) },
49 { "flush_dcache", VCPU_STAT(flush_dcache_exits) },
50 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
51 {NULL}
52};
53
54static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
55{
56 int i;
57 for_each_possible_cpu(i) {
58 vcpu->arch.guest_kernel_asid[i] = 0;
59 vcpu->arch.guest_user_asid[i] = 0;
60 }
61 return 0;
62}
63
669e846e
SL		 64/* XXXKYMA: We are simulatoring a processor that has the WII bit set in Config7, so we
65 * are "runnable" if interrupts are pending
66 */
67int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
68{
69 return !!(vcpu->arch.pending_exceptions);
70}
71
72int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
73{
74 return 1;
75}
76
77int kvm_arch_hardware_enable(void *garbage)
78{
79 return 0;
80}
81
82void kvm_arch_hardware_disable(void *garbage)
83{
84}
85
86int kvm_arch_hardware_setup(void)
87{
88 return 0;
89}
90
91void kvm_arch_hardware_unsetup(void)
92{
93}
94
95void kvm_arch_check_processor_compat(void *rtn)
96{
97 int *r = (int *)rtn;
98 *r = 0;
99 return;
100}
101
102static void kvm_mips_init_tlbs(struct kvm *kvm)
103{
104 unsigned long wired;
105
106 /* Add a wired entry to the TLB, it is used to map the commpage to the Guest kernel */
107 wired = read_c0_wired();
108 write_c0_wired(wired + 1);
109 mtc0_tlbw_hazard();
110 kvm->arch.commpage_tlb = wired;
111
112 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
113 kvm->arch.commpage_tlb);
114}
115
116static void kvm_mips_init_vm_percpu(void *arg)
117{
118 struct kvm *kvm = (struct kvm *)arg;
119
120 kvm_mips_init_tlbs(kvm);
121 kvm_mips_callbacks->vm_init(kvm);
122
123}
124
125int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
126{
127 if (atomic_inc_return(&kvm_mips_instance) == 1) {
6e95bfd2
JH		 128 kvm_debug("%s: 1st KVM instance, setup host TLB parameters\n",
129 __func__);
669e846e
SL		 130 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
131 }
132
133
134 return 0;
135}
136
137void kvm_mips_free_vcpus(struct kvm *kvm)
138{
139 unsigned int i;
140 struct kvm_vcpu *vcpu;
141
142 /* Put the pages we reserved for the guest pmap */
143 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
144 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
145 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
146 }
147
148 if (kvm->arch.guest_pmap)
149 kfree(kvm->arch.guest_pmap);
150
151 kvm_for_each_vcpu(i, vcpu, kvm) {
152 kvm_arch_vcpu_free(vcpu);
153 }
154
155 mutex_lock(&kvm->lock);
156
157 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
158 kvm->vcpus[i] = NULL;
159
160 atomic_set(&kvm->online_vcpus, 0);
161
162 mutex_unlock(&kvm->lock);
163}
164
165void kvm_arch_sync_events(struct kvm *kvm)
166{
167}
168
169static void kvm_mips_uninit_tlbs(void *arg)
170{
171 /* Restore wired count */
172 write_c0_wired(0);
173 mtc0_tlbw_hazard();
174 /* Clear out all the TLBs */
175 kvm_local_flush_tlb_all();
176}
177
178void kvm_arch_destroy_vm(struct kvm *kvm)
179{
180 kvm_mips_free_vcpus(kvm);
181
182 /* If this is the last instance, restore wired count */
183 if (atomic_dec_return(&kvm_mips_instance) == 0) {
6e95bfd2
JH		 184 kvm_debug("%s: last KVM instance, restoring TLB parameters\n",
185 __func__);
669e846e
SL		 186 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
187 }
188}
189
190long
191kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
192{
ed829857 193 return -ENOIOCTLCMD;
669e846e
SL		 194}
195
5587027c 196void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
669e846e
SL		 197 struct kvm_memory_slot *dont)
198{
199}
200
5587027c
AK		 201int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
202 unsigned long npages)
669e846e
SL		 203{
204 return 0;
205}
206
e59dbe09
TY		 207void kvm_arch_memslots_updated(struct kvm *kvm)
208{
209}
210
669e846e 211int kvm_arch_prepare_memory_region(struct kvm *kvm,
daf799cc
LT		 212 struct kvm_memory_slot *memslot,
213 struct kvm_userspace_memory_region *mem,
214 enum kvm_mr_change change)
669e846e
SL		 215{
216 return 0;
217}
218
219void kvm_arch_commit_memory_region(struct kvm *kvm,
daf799cc
LT		 220 struct kvm_userspace_memory_region *mem,
221 const struct kvm_memory_slot *old,
222 enum kvm_mr_change change)
669e846e
SL		 223{
224 unsigned long npages = 0;
225 int i, err = 0;
226
227 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
228 __func__, kvm, mem->slot, mem->guest_phys_addr,
229 mem->memory_size, mem->userspace_addr);
230
231 /* Setup Guest PMAP table */
232 if (!kvm->arch.guest_pmap) {
233 if (mem->slot == 0)
234 npages = mem->memory_size >> PAGE_SHIFT;
235
236 if (npages) {
237 kvm->arch.guest_pmap_npages = npages;
238 kvm->arch.guest_pmap =
239 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
240
241 if (!kvm->arch.guest_pmap) {
242 kvm_err("Failed to allocate guest PMAP");
243 err = -ENOMEM;
244 goto out;
245 }
246
6e95bfd2
JH		 247 kvm_debug("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
248 npages, kvm->arch.guest_pmap);
669e846e
SL		 249
250 /* Now setup the page table */
251 for (i = 0; i < npages; i++) {
252 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
253 }
254 }
255 }
256out:
257 return;
258}
259
260void kvm_arch_flush_shadow_all(struct kvm *kvm)
261{
262}
263
264void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
265 struct kvm_memory_slot *slot)
266{
267}
268
269void kvm_arch_flush_shadow(struct kvm *kvm)
270{
271}
272
273struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
274{
275 extern char mips32_exception[], mips32_exceptionEnd[];
276 extern char mips32_GuestException[], mips32_GuestExceptionEnd[];
277 int err, size, offset;
278 void *gebase;
279 int i;
280
281 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
282
283 if (!vcpu) {
284 err = -ENOMEM;
285 goto out;
286 }
287
288 err = kvm_vcpu_init(vcpu, kvm, id);
289
290 if (err)
291 goto out_free_cpu;
292
6e95bfd2 293 kvm_debug("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
669e846e
SL		 294
295 /* Allocate space for host mode exception handlers that handle
296 * guest mode exits
297 */
298 if (cpu_has_veic || cpu_has_vint) {
299 size = 0x200 + VECTORSPACING * 64;
300 } else {
7006e2df 301 size = 0x4000;
669e846e
SL		 302 }
303
304 /* Save Linux EBASE */
305 vcpu->arch.host_ebase = (void *)read_c0_ebase();
306
307 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
308
309 if (!gebase) {
310 err = -ENOMEM;
311 goto out_free_cpu;
312 }
6e95bfd2
JH		 313 kvm_debug("Allocated %d bytes for KVM Exception Handlers @ %p\n",
314 ALIGN(size, PAGE_SIZE), gebase);
669e846e
SL		 315
316 /* Save new ebase */
317 vcpu->arch.guest_ebase = gebase;
318
319 /* Copy L1 Guest Exception handler to correct offset */
320
321 /* TLB Refill, EXL = 0 */
322 memcpy(gebase, mips32_exception,
323 mips32_exceptionEnd - mips32_exception);
324
325 /* General Exception Entry point */
326 memcpy(gebase + 0x180, mips32_exception,
327 mips32_exceptionEnd - mips32_exception);
328
329 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
330 for (i = 0; i < 8; i++) {
331 kvm_debug("L1 Vectored handler @ %p\n",
332 gebase + 0x200 + (i * VECTORSPACING));
333 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
334 mips32_exceptionEnd - mips32_exception);
335 }
336
337 /* General handler, relocate to unmapped space for sanity's sake */
338 offset = 0x2000;
6e95bfd2
JH		 339 kvm_debug("Installing KVM Exception handlers @ %p, %#x bytes\n",
340 gebase + offset,
341 mips32_GuestExceptionEnd - mips32_GuestException);
669e846e
SL		 342
343 memcpy(gebase + offset, mips32_GuestException,
344 mips32_GuestExceptionEnd - mips32_GuestException);
345
346 /* Invalidate the icache for these ranges */
facaaec1
JH		 347 local_flush_icache_range((unsigned long)gebase,
348 (unsigned long)gebase + ALIGN(size, PAGE_SIZE));
669e846e
SL		 349
350 /* Allocate comm page for guest kernel, a TLB will be reserved for mapping GVA @ 0xFFFF8000 to this page */
351 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
352
353 if (!vcpu->arch.kseg0_commpage) {
354 err = -ENOMEM;
355 goto out_free_gebase;
356 }
357
6e95bfd2 358 kvm_debug("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
669e846e
SL		 359 kvm_mips_commpage_init(vcpu);
360
361 /* Init */
362 vcpu->arch.last_sched_cpu = -1;
363
364 /* Start off the timer */
e30492bb 365 kvm_mips_init_count(vcpu);
669e846e
SL		 366
367 return vcpu;
368
369out_free_gebase:
370 kfree(gebase);
371
372out_free_cpu:
373 kfree(vcpu);
374
375out:
376 return ERR_PTR(err);
377}
378
379void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
380{
381 hrtimer_cancel(&vcpu->arch.comparecount_timer);
382
383 kvm_vcpu_uninit(vcpu);
384
385 kvm_mips_dump_stats(vcpu);
386
387 if (vcpu->arch.guest_ebase)
388 kfree(vcpu->arch.guest_ebase);
389
390 if (vcpu->arch.kseg0_commpage)
391 kfree(vcpu->arch.kseg0_commpage);
392
393}
394
395void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
396{
397 kvm_arch_vcpu_free(vcpu);
398}
399
400int
401kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
402 struct kvm_guest_debug *dbg)
403{
ed829857 404 return -ENOIOCTLCMD;
669e846e
SL		 405}
406
407int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
408{
409 int r = 0;
410 sigset_t sigsaved;
411
412 if (vcpu->sigset_active)
413 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
414
415 if (vcpu->mmio_needed) {
416 if (!vcpu->mmio_is_write)
417 kvm_mips_complete_mmio_load(vcpu, run);
418 vcpu->mmio_needed = 0;
419 }
420
044f0f03 421 local_irq_disable();
669e846e
SL		 422 /* Check if we have any exceptions/interrupts pending */
423 kvm_mips_deliver_interrupts(vcpu,
424 kvm_read_c0_guest_cause(vcpu->arch.cop0));
425
669e846e
SL		 426 kvm_guest_enter();
427
428 r = __kvm_mips_vcpu_run(run, vcpu);
429
430 kvm_guest_exit();
431 local_irq_enable();
432
433 if (vcpu->sigset_active)
434 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
435
436 return r;
437}
438
439int
440kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_mips_interrupt *irq)
441{
442 int intr = (int)irq->irq;
443 struct kvm_vcpu *dvcpu = NULL;
444
445 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
446 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
447 (int)intr);
448
449 if (irq->cpu == -1)
450 dvcpu = vcpu;
451 else
452 dvcpu = vcpu->kvm->vcpus[irq->cpu];
453
454 if (intr == 2 || intr == 3 || intr == 4) {
455 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
456
457 } else if (intr == -2 || intr == -3 || intr == -4) {
458 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
459 } else {
460 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
461 irq->cpu, irq->irq);
462 return -EINVAL;
463 }
464
465 dvcpu->arch.wait = 0;
466
467 if (waitqueue_active(&dvcpu->wq)) {
468 wake_up_interruptible(&dvcpu->wq);
469 }
470
471 return 0;
472}
473
474int
475kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
476 struct kvm_mp_state *mp_state)
477{
ed829857 478 return -ENOIOCTLCMD;
669e846e
SL		 479}
480
481int
482kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
483 struct kvm_mp_state *mp_state)
484{
ed829857 485 return -ENOIOCTLCMD;
669e846e
SL		 486}
487
4c73fb2b
DD		 488static u64 kvm_mips_get_one_regs[] = {
489 KVM_REG_MIPS_R0,
490 KVM_REG_MIPS_R1,
491 KVM_REG_MIPS_R2,
492 KVM_REG_MIPS_R3,
493 KVM_REG_MIPS_R4,
494 KVM_REG_MIPS_R5,
495 KVM_REG_MIPS_R6,
496 KVM_REG_MIPS_R7,
497 KVM_REG_MIPS_R8,
498 KVM_REG_MIPS_R9,
499 KVM_REG_MIPS_R10,
500 KVM_REG_MIPS_R11,
501 KVM_REG_MIPS_R12,
502 KVM_REG_MIPS_R13,
503 KVM_REG_MIPS_R14,
504 KVM_REG_MIPS_R15,
505 KVM_REG_MIPS_R16,
506 KVM_REG_MIPS_R17,
507 KVM_REG_MIPS_R18,
508 KVM_REG_MIPS_R19,
509 KVM_REG_MIPS_R20,
510 KVM_REG_MIPS_R21,
511 KVM_REG_MIPS_R22,
512 KVM_REG_MIPS_R23,
513 KVM_REG_MIPS_R24,
514 KVM_REG_MIPS_R25,
515 KVM_REG_MIPS_R26,
516 KVM_REG_MIPS_R27,
517 KVM_REG_MIPS_R28,
518 KVM_REG_MIPS_R29,
519 KVM_REG_MIPS_R30,
520 KVM_REG_MIPS_R31,
521
522 KVM_REG_MIPS_HI,
523 KVM_REG_MIPS_LO,
524 KVM_REG_MIPS_PC,
525
526 KVM_REG_MIPS_CP0_INDEX,
527 KVM_REG_MIPS_CP0_CONTEXT,
7767b7d2 528 KVM_REG_MIPS_CP0_USERLOCAL,
4c73fb2b
DD		 529 KVM_REG_MIPS_CP0_PAGEMASK,
530 KVM_REG_MIPS_CP0_WIRED,
16fd5c1d 531 KVM_REG_MIPS_CP0_HWRENA,
4c73fb2b 532 KVM_REG_MIPS_CP0_BADVADDR,
f8be02da 533 KVM_REG_MIPS_CP0_COUNT,
4c73fb2b 534 KVM_REG_MIPS_CP0_ENTRYHI,
f8be02da 535 KVM_REG_MIPS_CP0_COMPARE,
4c73fb2b
DD		 536 KVM_REG_MIPS_CP0_STATUS,
537 KVM_REG_MIPS_CP0_CAUSE,
fb6df0cd 538 KVM_REG_MIPS_CP0_EPC,
4c73fb2b
DD		 539 KVM_REG_MIPS_CP0_CONFIG,
540 KVM_REG_MIPS_CP0_CONFIG1,
541 KVM_REG_MIPS_CP0_CONFIG2,
542 KVM_REG_MIPS_CP0_CONFIG3,
543 KVM_REG_MIPS_CP0_CONFIG7,
f8239342
JH		 544 KVM_REG_MIPS_CP0_ERROREPC,
545
546 KVM_REG_MIPS_COUNT_CTL,
547 KVM_REG_MIPS_COUNT_RESUME,
f74a8e22 548 KVM_REG_MIPS_COUNT_HZ,
4c73fb2b
DD		 549};
550
551static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
552 const struct kvm_one_reg *reg)
553{
4c73fb2b 554 struct mips_coproc *cop0 = vcpu->arch.cop0;
f8be02da 555 int ret;
4c73fb2b
DD		 556 s64 v;
557
558 switch (reg->id) {
559 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
560 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
561 break;
562 case KVM_REG_MIPS_HI:
563 v = (long)vcpu->arch.hi;
564 break;
565 case KVM_REG_MIPS_LO:
566 v = (long)vcpu->arch.lo;
567 break;
568 case KVM_REG_MIPS_PC:
569 v = (long)vcpu->arch.pc;
570 break;
571
572 case KVM_REG_MIPS_CP0_INDEX:
573 v = (long)kvm_read_c0_guest_index(cop0);
574 break;
575 case KVM_REG_MIPS_CP0_CONTEXT:
576 v = (long)kvm_read_c0_guest_context(cop0);
577 break;
7767b7d2
JH		 578 case KVM_REG_MIPS_CP0_USERLOCAL:
579 v = (long)kvm_read_c0_guest_userlocal(cop0);
580 break;
4c73fb2b
DD		 581 case KVM_REG_MIPS_CP0_PAGEMASK:
582 v = (long)kvm_read_c0_guest_pagemask(cop0);
583 break;
584 case KVM_REG_MIPS_CP0_WIRED:
585 v = (long)kvm_read_c0_guest_wired(cop0);
586 break;
16fd5c1d
JH		 587 case KVM_REG_MIPS_CP0_HWRENA:
588 v = (long)kvm_read_c0_guest_hwrena(cop0);
589 break;
4c73fb2b
DD		 590 case KVM_REG_MIPS_CP0_BADVADDR:
591 v = (long)kvm_read_c0_guest_badvaddr(cop0);
592 break;
593 case KVM_REG_MIPS_CP0_ENTRYHI:
594 v = (long)kvm_read_c0_guest_entryhi(cop0);
595 break;
f8be02da
JH		 596 case KVM_REG_MIPS_CP0_COMPARE:
597 v = (long)kvm_read_c0_guest_compare(cop0);
598 break;
4c73fb2b
DD		 599 case KVM_REG_MIPS_CP0_STATUS:
600 v = (long)kvm_read_c0_guest_status(cop0);
601 break;
602 case KVM_REG_MIPS_CP0_CAUSE:
603 v = (long)kvm_read_c0_guest_cause(cop0);
604 break;
fb6df0cd
JH		 605 case KVM_REG_MIPS_CP0_EPC:
606 v = (long)kvm_read_c0_guest_epc(cop0);
607 break;
4c73fb2b
DD		 608 case KVM_REG_MIPS_CP0_ERROREPC:
609 v = (long)kvm_read_c0_guest_errorepc(cop0);
610 break;
611 case KVM_REG_MIPS_CP0_CONFIG:
612 v = (long)kvm_read_c0_guest_config(cop0);
613 break;
614 case KVM_REG_MIPS_CP0_CONFIG1:
615 v = (long)kvm_read_c0_guest_config1(cop0);
616 break;
617 case KVM_REG_MIPS_CP0_CONFIG2:
618 v = (long)kvm_read_c0_guest_config2(cop0);
619 break;
620 case KVM_REG_MIPS_CP0_CONFIG3:
621 v = (long)kvm_read_c0_guest_config3(cop0);
622 break;
623 case KVM_REG_MIPS_CP0_CONFIG7:
624 v = (long)kvm_read_c0_guest_config7(cop0);
625 break;
f8be02da
JH		 626 /* registers to be handled specially */
627 case KVM_REG_MIPS_CP0_COUNT:
f8239342
JH		 628 case KVM_REG_MIPS_COUNT_CTL:
629 case KVM_REG_MIPS_COUNT_RESUME:
f74a8e22 630 case KVM_REG_MIPS_COUNT_HZ:
f8be02da
JH		 631 ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v);
632 if (ret)
633 return ret;
634 break;
4c73fb2b
DD		 635 default:
636 return -EINVAL;
637 }
681865d4
DD		 638 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
639 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
640 return put_user(v, uaddr64);
641 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
642 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
643 u32 v32 = (u32)v;
644 return put_user(v32, uaddr32);
645 } else {
646 return -EINVAL;
647 }
4c73fb2b
DD		 648}
649
650static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
651 const struct kvm_one_reg *reg)
652{
4c73fb2b
DD		 653 struct mips_coproc *cop0 = vcpu->arch.cop0;
654 u64 v;
655
681865d4
DD		 656 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
657 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
658
659 if (get_user(v, uaddr64) != 0)
660 return -EFAULT;
661 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
662 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
663 s32 v32;
664
665 if (get_user(v32, uaddr32) != 0)
666 return -EFAULT;
667 v = (s64)v32;
668 } else {
669 return -EINVAL;
670 }
4c73fb2b
DD		 671
672 switch (reg->id) {
673 case KVM_REG_MIPS_R0:
674 /* Silently ignore requests to set $0 */
675 break;
676 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
677 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
678 break;
679 case KVM_REG_MIPS_HI:
680 vcpu->arch.hi = v;
681 break;
682 case KVM_REG_MIPS_LO:
683 vcpu->arch.lo = v;
684 break;
685 case KVM_REG_MIPS_PC:
686 vcpu->arch.pc = v;
687 break;
688
689 case KVM_REG_MIPS_CP0_INDEX:
690 kvm_write_c0_guest_index(cop0, v);
691 break;
692 case KVM_REG_MIPS_CP0_CONTEXT:
693 kvm_write_c0_guest_context(cop0, v);
694 break;
7767b7d2
JH		 695 case KVM_REG_MIPS_CP0_USERLOCAL:
696 kvm_write_c0_guest_userlocal(cop0, v);
697 break;
4c73fb2b
DD		 698 case KVM_REG_MIPS_CP0_PAGEMASK:
699 kvm_write_c0_guest_pagemask(cop0, v);
700 break;
701 case KVM_REG_MIPS_CP0_WIRED:
702 kvm_write_c0_guest_wired(cop0, v);
703 break;
16fd5c1d
JH		 704 case KVM_REG_MIPS_CP0_HWRENA:
705 kvm_write_c0_guest_hwrena(cop0, v);
706 break;
4c73fb2b
DD		 707 case KVM_REG_MIPS_CP0_BADVADDR:
708 kvm_write_c0_guest_badvaddr(cop0, v);
709 break;
710 case KVM_REG_MIPS_CP0_ENTRYHI:
711 kvm_write_c0_guest_entryhi(cop0, v);
712 break;
713 case KVM_REG_MIPS_CP0_STATUS:
714 kvm_write_c0_guest_status(cop0, v);
715 break;
fb6df0cd
JH		 716 case KVM_REG_MIPS_CP0_EPC:
717 kvm_write_c0_guest_epc(cop0, v);
718 break;
4c73fb2b
DD		 719 case KVM_REG_MIPS_CP0_ERROREPC:
720 kvm_write_c0_guest_errorepc(cop0, v);
721 break;
f8be02da
JH		 722 /* registers to be handled specially */
723 case KVM_REG_MIPS_CP0_COUNT:
724 case KVM_REG_MIPS_CP0_COMPARE:
e30492bb 725 case KVM_REG_MIPS_CP0_CAUSE:
f8239342
JH		 726 case KVM_REG_MIPS_COUNT_CTL:
727 case KVM_REG_MIPS_COUNT_RESUME:
f74a8e22 728 case KVM_REG_MIPS_COUNT_HZ:
f8be02da 729 return kvm_mips_callbacks->set_one_reg(vcpu, reg, v);
4c73fb2b
DD		 730 default:
731 return -EINVAL;
732 }
733 return 0;
734}
735
669e846e
SL		 736long
737kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
738{
739 struct kvm_vcpu *vcpu = filp->private_data;
740 void __user *argp = (void __user *)arg;
741 long r;
669e846e
SL		 742
743 switch (ioctl) {
4c73fb2b
DD		 744 case KVM_SET_ONE_REG:
745 case KVM_GET_ONE_REG: {
746 struct kvm_one_reg reg;
747 if (copy_from_user(&reg, argp, sizeof(reg)))
748 return -EFAULT;
749 if (ioctl == KVM_SET_ONE_REG)
750 return kvm_mips_set_reg(vcpu, &reg);
751 else
752 return kvm_mips_get_reg(vcpu, &reg);
753 }
754 case KVM_GET_REG_LIST: {
755 struct kvm_reg_list __user *user_list = argp;
756 u64 __user *reg_dest;
757 struct kvm_reg_list reg_list;
758 unsigned n;
759
760 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
761 return -EFAULT;
762 n = reg_list.n;
763 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
764 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
765 return -EFAULT;
766 if (n < reg_list.n)
767 return -E2BIG;
768 reg_dest = user_list->reg;
769 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
770 sizeof(kvm_mips_get_one_regs)))
771 return -EFAULT;
772 return 0;
773 }
669e846e
SL		 774 case KVM_NMI:
775 /* Treat the NMI as a CPU reset */
776 r = kvm_mips_reset_vcpu(vcpu);
777 break;
778 case KVM_INTERRUPT:
779 {
780 struct kvm_mips_interrupt irq;
781 r = -EFAULT;
782 if (copy_from_user(&irq, argp, sizeof(irq)))
783 goto out;
784
669e846e
SL		 785 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
786 irq.irq);
787
788 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
789 break;
790 }
791 default:
4c73fb2b 792 r = -ENOIOCTLCMD;
669e846e
SL		 793 }
794
795out:
796 return r;
797}
798
799/*
800 * Get (and clear) the dirty memory log for a memory slot.
801 */
802int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
803{
804 struct kvm_memory_slot *memslot;
805 unsigned long ga, ga_end;
806 int is_dirty = 0;
807 int r;
808 unsigned long n;
809
810 mutex_lock(&kvm->slots_lock);
811
812 r = kvm_get_dirty_log(kvm, log, &is_dirty);
813 if (r)
814 goto out;
815
816 /* If nothing is dirty, don't bother messing with page tables. */
817 if (is_dirty) {
818 memslot = &kvm->memslots->memslots[log->slot];
819
820 ga = memslot->base_gfn << PAGE_SHIFT;
821 ga_end = ga + (memslot->npages << PAGE_SHIFT);
822
823 printk("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
824 ga_end);
825
826 n = kvm_dirty_bitmap_bytes(memslot);
827 memset(memslot->dirty_bitmap, 0, n);
828 }
829
830 r = 0;
831out:
832 mutex_unlock(&kvm->slots_lock);
833 return r;
834
835}
836
837long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
838{
839 long r;
840
841 switch (ioctl) {
842 default:
ed829857 843 r = -ENOIOCTLCMD;
669e846e
SL		 844 }
845
846 return r;
847}
848
849int kvm_arch_init(void *opaque)
850{
851 int ret;
852
853 if (kvm_mips_callbacks) {
854 kvm_err("kvm: module already exists\n");
855 return -EEXIST;
856 }
857
858 ret = kvm_mips_emulation_init(&kvm_mips_callbacks);
859
860 return ret;
861}
862
863void kvm_arch_exit(void)
864{
865 kvm_mips_callbacks = NULL;
866}
867
868int
869kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
870{
ed829857 871 return -ENOIOCTLCMD;
669e846e
SL		 872}
873
874int
875kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
876{
ed829857 877 return -ENOIOCTLCMD;
669e846e
SL		 878}
879
880int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
881{
882 return 0;
883}
884
885int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
886{
ed829857 887 return -ENOIOCTLCMD;
669e846e
SL		 888}
889
890int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
891{
ed829857 892 return -ENOIOCTLCMD;
669e846e
SL		 893}
894
895int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
896{
897 return VM_FAULT_SIGBUS;
898}
899
900int kvm_dev_ioctl_check_extension(long ext)
901{
902 int r;
903
904 switch (ext) {
4c73fb2b
DD		 905 case KVM_CAP_ONE_REG:
906 r = 1;
907 break;
669e846e
SL		 908 case KVM_CAP_COALESCED_MMIO:
909 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
910 break;
911 default:
912 r = 0;
913 break;
914 }
915 return r;
669e846e
SL		 916}
917
918int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
919{
920 return kvm_mips_pending_timer(vcpu);
921}
922
923int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
924{
925 int i;
926 struct mips_coproc *cop0;
927
928 if (!vcpu)
929 return -1;
930
931 printk("VCPU Register Dump:\n");
932 printk("\tpc = 0x%08lx\n", vcpu->arch.pc);;
933 printk("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
934
935 for (i = 0; i < 32; i += 4) {
936 printk("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
937 vcpu->arch.gprs[i],
938 vcpu->arch.gprs[i + 1],
939 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
940 }
941 printk("\thi: 0x%08lx\n", vcpu->arch.hi);
942 printk("\tlo: 0x%08lx\n", vcpu->arch.lo);
943
944 cop0 = vcpu->arch.cop0;
945 printk("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
946 kvm_read_c0_guest_status(cop0), kvm_read_c0_guest_cause(cop0));
947
948 printk("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
949
950 return 0;
951}
952
953int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
954{
955 int i;
956
8d17dd04 957 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 958 vcpu->arch.gprs[i] = regs->gpr[i];
8d17dd04 959 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
669e846e
SL		 960 vcpu->arch.hi = regs->hi;
961 vcpu->arch.lo = regs->lo;
962 vcpu->arch.pc = regs->pc;
963
4c73fb2b 964 return 0;
669e846e
SL		 965}
966
967int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
968{
969 int i;
970
8d17dd04 971 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 972 regs->gpr[i] = vcpu->arch.gprs[i];
669e846e
SL		 973
974 regs->hi = vcpu->arch.hi;
975 regs->lo = vcpu->arch.lo;
976 regs->pc = vcpu->arch.pc;
977
4c73fb2b 978 return 0;
669e846e
SL		 979}
980
0fae34f4 981static void kvm_mips_comparecount_func(unsigned long data)
669e846e
SL		 982{
983 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
984
985 kvm_mips_callbacks->queue_timer_int(vcpu);
986
987 vcpu->arch.wait = 0;
988 if (waitqueue_active(&vcpu->wq)) {
989 wake_up_interruptible(&vcpu->wq);
990 }
991}
992
993/*
994 * low level hrtimer wake routine.
995 */
0fae34f4 996static enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
669e846e
SL		 997{
998 struct kvm_vcpu *vcpu;
999
1000 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
1001 kvm_mips_comparecount_func((unsigned long) vcpu);
e30492bb 1002 return kvm_mips_count_timeout(vcpu);
669e846e
SL		 1003}
1004
1005int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
1006{
1007 kvm_mips_callbacks->vcpu_init(vcpu);
1008 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
1009 HRTIMER_MODE_REL);
1010 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
669e846e
SL		 1011 return 0;
1012}
1013
1014void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
1015{
1016 return;
1017}
1018
1019int
1020kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, struct kvm_translation *tr)
1021{
1022 return 0;
1023}
1024
1025/* Initial guest state */
1026int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1027{
1028 return kvm_mips_callbacks->vcpu_setup(vcpu);
1029}
1030
1031static
1032void kvm_mips_set_c0_status(void)
1033{
1034 uint32_t status = read_c0_status();
1035
1036 if (cpu_has_fpu)
1037 status |= (ST0_CU1);
1038
1039 if (cpu_has_dsp)
1040 status |= (ST0_MX);
1041
1042 write_c0_status(status);
1043 ehb();
1044}
1045
1046/*
1047 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1048 */
1049int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1050{
1051 uint32_t cause = vcpu->arch.host_cp0_cause;
1052 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1053 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1054 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1055 enum emulation_result er = EMULATE_DONE;
1056 int ret = RESUME_GUEST;
1057
1058 /* Set a default exit reason */
1059 run->exit_reason = KVM_EXIT_UNKNOWN;
1060 run->ready_for_interrupt_injection = 1;
1061
1062 /* Set the appropriate status bits based on host CPU features, before we hit the scheduler */
1063 kvm_mips_set_c0_status();
1064
1065 local_irq_enable();
1066
1067 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1068 cause, opc, run, vcpu);
1069
1070 /* Do a privilege check, if in UM most of these exit conditions end up
1071 * causing an exception to be delivered to the Guest Kernel
1072 */
1073 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1074 if (er == EMULATE_PRIV_FAIL) {
1075 goto skip_emul;
1076 } else if (er == EMULATE_FAIL) {
1077 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1078 ret = RESUME_HOST;
1079 goto skip_emul;
1080 }
1081
1082 switch (exccode) {
1083 case T_INT:
1084 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1085
1086 ++vcpu->stat.int_exits;
1087 trace_kvm_exit(vcpu, INT_EXITS);
1088
1089 if (need_resched()) {
1090 cond_resched();
1091 }
1092
1093 ret = RESUME_GUEST;
1094 break;
1095
1096 case T_COP_UNUSABLE:
1097 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1098
1099 ++vcpu->stat.cop_unusable_exits;
1100 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1101 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1102 /* XXXKYMA: Might need to return to user space */
1103 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN) {
1104 ret = RESUME_HOST;
1105 }
1106 break;
1107
1108 case T_TLB_MOD:
1109 ++vcpu->stat.tlbmod_exits;
1110 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1111 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1112 break;
1113
1114 case T_TLB_ST_MISS:
1115 kvm_debug
1116 ("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1117 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1118 badvaddr);
1119
1120 ++vcpu->stat.tlbmiss_st_exits;
1121 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1122 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1123 break;
1124
1125 case T_TLB_LD_MISS:
1126 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1127 cause, opc, badvaddr);
1128
1129 ++vcpu->stat.tlbmiss_ld_exits;
1130 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1131 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1132 break;
1133
1134 case T_ADDR_ERR_ST:
1135 ++vcpu->stat.addrerr_st_exits;
1136 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1137 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1138 break;
1139
1140 case T_ADDR_ERR_LD:
1141 ++vcpu->stat.addrerr_ld_exits;
1142 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1143 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1144 break;
1145
1146 case T_SYSCALL:
1147 ++vcpu->stat.syscall_exits;
1148 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1149 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1150 break;
1151
1152 case T_RES_INST:
1153 ++vcpu->stat.resvd_inst_exits;
1154 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1155 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1156 break;
1157
1158 case T_BREAK:
1159 ++vcpu->stat.break_inst_exits;
1160 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1161 ret = kvm_mips_callbacks->handle_break(vcpu);
1162 break;
1163
1164 default:
1165 kvm_err
1166 ("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1167 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1168 kvm_read_c0_guest_status(vcpu->arch.cop0));
1169 kvm_arch_vcpu_dump_regs(vcpu);
1170 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1171 ret = RESUME_HOST;
1172 break;
1173
1174 }
1175
1176skip_emul:
1177 local_irq_disable();
1178
1179 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1180 kvm_mips_deliver_interrupts(vcpu, cause);
1181
1182 if (!(ret & RESUME_HOST)) {
1183 /* Only check for signals if not already exiting to userspace */
1184 if (signal_pending(current)) {
1185 run->exit_reason = KVM_EXIT_INTR;
1186 ret = (-EINTR << 2) | RESUME_HOST;
1187 ++vcpu->stat.signal_exits;
1188 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1189 }
1190 }
1191
1192 return ret;
1193}
1194
1195int __init kvm_mips_init(void)
1196{
1197 int ret;
1198
1199 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1200
1201 if (ret)
1202 return ret;
1203
1204 /* On MIPS, kernel modules are executed from "mapped space", which requires TLBs.
1205 * The TLB handling code is statically linked with the rest of the kernel (kvm_tlb.c)
1206 * to avoid the possibility of double faulting. The issue is that the TLB code
1207 * references routines that are part of the the KVM module,
1208 * which are only available once the module is loaded.
1209 */
1210 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1211 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1212 kvm_mips_is_error_pfn = is_error_pfn;
1213
1214 pr_info("KVM/MIPS Initialized\n");
1215 return 0;
1216}
1217
1218void __exit kvm_mips_exit(void)
1219{
1220 kvm_exit();
1221
1222 kvm_mips_gfn_to_pfn = NULL;
1223 kvm_mips_release_pfn_clean = NULL;
1224 kvm_mips_is_error_pfn = NULL;
1225
1226 pr_info("KVM/MIPS unloaded\n");
1227}
1228
1229module_init(kvm_mips_init);
1230module_exit(kvm_mips_exit);
1231
1232EXPORT_TRACEPOINT_SYMBOL(kvm_exit);
Linux kernel - Deliverables
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