projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
MIPS: KVM: Override guest kernel timer frequency directly
[deliverable/linux.git] / arch / mips / kvm / kvm_mips.c
CommitLineData
669e846e
SL		 1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
10*/
11
12#include <linux/errno.h>
13#include <linux/err.h>
14#include <linux/module.h>
15#include <linux/vmalloc.h>
16#include <linux/fs.h>
17#include <linux/bootmem.h>
18#include <asm/page.h>
19#include <asm/cacheflush.h>
20#include <asm/mmu_context.h>
21
22#include <linux/kvm_host.h>
23
24#include "kvm_mips_int.h"
25#include "kvm_mips_comm.h"
26
27#define CREATE_TRACE_POINTS
28#include "trace.h"
29
30#ifndef VECTORSPACING
31#define VECTORSPACING 0x100 /* for EI/VI mode */
32#endif
33
34#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
35struct kvm_stats_debugfs_item debugfs_entries[] = {
36 { "wait", VCPU_STAT(wait_exits) },
37 { "cache", VCPU_STAT(cache_exits) },
38 { "signal", VCPU_STAT(signal_exits) },
39 { "interrupt", VCPU_STAT(int_exits) },
40 { "cop_unsuable", VCPU_STAT(cop_unusable_exits) },
41 { "tlbmod", VCPU_STAT(tlbmod_exits) },
42 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits) },
43 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits) },
44 { "addrerr_st", VCPU_STAT(addrerr_st_exits) },
45 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits) },
46 { "syscall", VCPU_STAT(syscall_exits) },
47 { "resvd_inst", VCPU_STAT(resvd_inst_exits) },
48 { "break_inst", VCPU_STAT(break_inst_exits) },
49 { "flush_dcache", VCPU_STAT(flush_dcache_exits) },
50 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
51 {NULL}
52};
53
54static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
55{
56 int i;
57 for_each_possible_cpu(i) {
58 vcpu->arch.guest_kernel_asid[i] = 0;
59 vcpu->arch.guest_user_asid[i] = 0;
60 }
61 return 0;
62}
63
669e846e
SL		 64/* XXXKYMA: We are simulatoring a processor that has the WII bit set in Config7, so we
65 * are "runnable" if interrupts are pending
66 */
67int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
68{
69 return !!(vcpu->arch.pending_exceptions);
70}
71
72int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
73{
74 return 1;
75}
76
77int kvm_arch_hardware_enable(void *garbage)
78{
79 return 0;
80}
81
82void kvm_arch_hardware_disable(void *garbage)
83{
84}
85
86int kvm_arch_hardware_setup(void)
87{
88 return 0;
89}
90
91void kvm_arch_hardware_unsetup(void)
92{
93}
94
95void kvm_arch_check_processor_compat(void *rtn)
96{
97 int *r = (int *)rtn;
98 *r = 0;
99 return;
100}
101
102static void kvm_mips_init_tlbs(struct kvm *kvm)
103{
104 unsigned long wired;
105
106 /* Add a wired entry to the TLB, it is used to map the commpage to the Guest kernel */
107 wired = read_c0_wired();
108 write_c0_wired(wired + 1);
109 mtc0_tlbw_hazard();
110 kvm->arch.commpage_tlb = wired;
111
112 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
113 kvm->arch.commpage_tlb);
114}
115
116static void kvm_mips_init_vm_percpu(void *arg)
117{
118 struct kvm *kvm = (struct kvm *)arg;
119
120 kvm_mips_init_tlbs(kvm);
121 kvm_mips_callbacks->vm_init(kvm);
122
123}
124
125int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
126{
127 if (atomic_inc_return(&kvm_mips_instance) == 1) {
128 kvm_info("%s: 1st KVM instance, setup host TLB parameters\n",
129 __func__);
130 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
131 }
132
133
134 return 0;
135}
136
137void kvm_mips_free_vcpus(struct kvm *kvm)
138{
139 unsigned int i;
140 struct kvm_vcpu *vcpu;
141
142 /* Put the pages we reserved for the guest pmap */
143 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
144 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
145 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
146 }
147
148 if (kvm->arch.guest_pmap)
149 kfree(kvm->arch.guest_pmap);
150
151 kvm_for_each_vcpu(i, vcpu, kvm) {
152 kvm_arch_vcpu_free(vcpu);
153 }
154
155 mutex_lock(&kvm->lock);
156
157 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
158 kvm->vcpus[i] = NULL;
159
160 atomic_set(&kvm->online_vcpus, 0);
161
162 mutex_unlock(&kvm->lock);
163}
164
165void kvm_arch_sync_events(struct kvm *kvm)
166{
167}
168
169static void kvm_mips_uninit_tlbs(void *arg)
170{
171 /* Restore wired count */
172 write_c0_wired(0);
173 mtc0_tlbw_hazard();
174 /* Clear out all the TLBs */
175 kvm_local_flush_tlb_all();
176}
177
178void kvm_arch_destroy_vm(struct kvm *kvm)
179{
180 kvm_mips_free_vcpus(kvm);
181
182 /* If this is the last instance, restore wired count */
183 if (atomic_dec_return(&kvm_mips_instance) == 0) {
184 kvm_info("%s: last KVM instance, restoring TLB parameters\n",
185 __func__);
186 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
187 }
188}
189
190long
191kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
192{
ed829857 193 return -ENOIOCTLCMD;
669e846e
SL		 194}
195
5587027c 196void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
669e846e
SL		 197 struct kvm_memory_slot *dont)
198{
199}
200
5587027c
AK		 201int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
202 unsigned long npages)
669e846e
SL		 203{
204 return 0;
205}
206
e59dbe09
TY		 207void kvm_arch_memslots_updated(struct kvm *kvm)
208{
209}
210
669e846e 211int kvm_arch_prepare_memory_region(struct kvm *kvm,
daf799cc
LT		 212 struct kvm_memory_slot *memslot,
213 struct kvm_userspace_memory_region *mem,
214 enum kvm_mr_change change)
669e846e
SL		 215{
216 return 0;
217}
218
219void kvm_arch_commit_memory_region(struct kvm *kvm,
daf799cc
LT		 220 struct kvm_userspace_memory_region *mem,
221 const struct kvm_memory_slot *old,
222 enum kvm_mr_change change)
669e846e
SL		 223{
224 unsigned long npages = 0;
225 int i, err = 0;
226
227 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
228 __func__, kvm, mem->slot, mem->guest_phys_addr,
229 mem->memory_size, mem->userspace_addr);
230
231 /* Setup Guest PMAP table */
232 if (!kvm->arch.guest_pmap) {
233 if (mem->slot == 0)
234 npages = mem->memory_size >> PAGE_SHIFT;
235
236 if (npages) {
237 kvm->arch.guest_pmap_npages = npages;
238 kvm->arch.guest_pmap =
239 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
240
241 if (!kvm->arch.guest_pmap) {
242 kvm_err("Failed to allocate guest PMAP");
243 err = -ENOMEM;
244 goto out;
245 }
246
247 kvm_info
248 ("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
249 npages, kvm->arch.guest_pmap);
250
251 /* Now setup the page table */
252 for (i = 0; i < npages; i++) {
253 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
254 }
255 }
256 }
257out:
258 return;
259}
260
261void kvm_arch_flush_shadow_all(struct kvm *kvm)
262{
263}
264
265void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
266 struct kvm_memory_slot *slot)
267{
268}
269
270void kvm_arch_flush_shadow(struct kvm *kvm)
271{
272}
273
274struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
275{
276 extern char mips32_exception[], mips32_exceptionEnd[];
277 extern char mips32_GuestException[], mips32_GuestExceptionEnd[];
278 int err, size, offset;
279 void *gebase;
280 int i;
281
282 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
283
284 if (!vcpu) {
285 err = -ENOMEM;
286 goto out;
287 }
288
289 err = kvm_vcpu_init(vcpu, kvm, id);
290
291 if (err)
292 goto out_free_cpu;
293
294 kvm_info("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
295
296 /* Allocate space for host mode exception handlers that handle
297 * guest mode exits
298 */
299 if (cpu_has_veic || cpu_has_vint) {
300 size = 0x200 + VECTORSPACING * 64;
301 } else {
7006e2df 302 size = 0x4000;
669e846e
SL		 303 }
304
305 /* Save Linux EBASE */
306 vcpu->arch.host_ebase = (void *)read_c0_ebase();
307
308 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
309
310 if (!gebase) {
311 err = -ENOMEM;
312 goto out_free_cpu;
313 }
314 kvm_info("Allocated %d bytes for KVM Exception Handlers @ %p\n",
315 ALIGN(size, PAGE_SIZE), gebase);
316
317 /* Save new ebase */
318 vcpu->arch.guest_ebase = gebase;
319
320 /* Copy L1 Guest Exception handler to correct offset */
321
322 /* TLB Refill, EXL = 0 */
323 memcpy(gebase, mips32_exception,
324 mips32_exceptionEnd - mips32_exception);
325
326 /* General Exception Entry point */
327 memcpy(gebase + 0x180, mips32_exception,
328 mips32_exceptionEnd - mips32_exception);
329
330 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
331 for (i = 0; i < 8; i++) {
332 kvm_debug("L1 Vectored handler @ %p\n",
333 gebase + 0x200 + (i * VECTORSPACING));
334 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
335 mips32_exceptionEnd - mips32_exception);
336 }
337
338 /* General handler, relocate to unmapped space for sanity's sake */
339 offset = 0x2000;
340 kvm_info("Installing KVM Exception handlers @ %p, %#x bytes\n",
341 gebase + offset,
342 mips32_GuestExceptionEnd - mips32_GuestException);
343
344 memcpy(gebase + offset, mips32_GuestException,
345 mips32_GuestExceptionEnd - mips32_GuestException);
346
347 /* Invalidate the icache for these ranges */
facaaec1
JH		 348 local_flush_icache_range((unsigned long)gebase,
349 (unsigned long)gebase + ALIGN(size, PAGE_SIZE));
669e846e
SL		 350
351 /* Allocate comm page for guest kernel, a TLB will be reserved for mapping GVA @ 0xFFFF8000 to this page */
352 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
353
354 if (!vcpu->arch.kseg0_commpage) {
355 err = -ENOMEM;
356 goto out_free_gebase;
357 }
358
359 kvm_info("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
360 kvm_mips_commpage_init(vcpu);
361
362 /* Init */
363 vcpu->arch.last_sched_cpu = -1;
364
365 /* Start off the timer */
e30492bb 366 kvm_mips_init_count(vcpu);
669e846e
SL		 367
368 return vcpu;
369
370out_free_gebase:
371 kfree(gebase);
372
373out_free_cpu:
374 kfree(vcpu);
375
376out:
377 return ERR_PTR(err);
378}
379
380void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
381{
382 hrtimer_cancel(&vcpu->arch.comparecount_timer);
383
384 kvm_vcpu_uninit(vcpu);
385
386 kvm_mips_dump_stats(vcpu);
387
388 if (vcpu->arch.guest_ebase)
389 kfree(vcpu->arch.guest_ebase);
390
391 if (vcpu->arch.kseg0_commpage)
392 kfree(vcpu->arch.kseg0_commpage);
393
394}
395
396void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
397{
398 kvm_arch_vcpu_free(vcpu);
399}
400
401int
402kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
403 struct kvm_guest_debug *dbg)
404{
ed829857 405 return -ENOIOCTLCMD;
669e846e
SL		 406}
407
408int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
409{
410 int r = 0;
411 sigset_t sigsaved;
412
413 if (vcpu->sigset_active)
414 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
415
416 if (vcpu->mmio_needed) {
417 if (!vcpu->mmio_is_write)
418 kvm_mips_complete_mmio_load(vcpu, run);
419 vcpu->mmio_needed = 0;
420 }
421
044f0f03 422 local_irq_disable();
669e846e
SL		 423 /* Check if we have any exceptions/interrupts pending */
424 kvm_mips_deliver_interrupts(vcpu,
425 kvm_read_c0_guest_cause(vcpu->arch.cop0));
426
669e846e
SL		 427 kvm_guest_enter();
428
429 r = __kvm_mips_vcpu_run(run, vcpu);
430
431 kvm_guest_exit();
432 local_irq_enable();
433
434 if (vcpu->sigset_active)
435 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
436
437 return r;
438}
439
440int
441kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_mips_interrupt *irq)
442{
443 int intr = (int)irq->irq;
444 struct kvm_vcpu *dvcpu = NULL;
445
446 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
447 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
448 (int)intr);
449
450 if (irq->cpu == -1)
451 dvcpu = vcpu;
452 else
453 dvcpu = vcpu->kvm->vcpus[irq->cpu];
454
455 if (intr == 2 || intr == 3 || intr == 4) {
456 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
457
458 } else if (intr == -2 || intr == -3 || intr == -4) {
459 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
460 } else {
461 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
462 irq->cpu, irq->irq);
463 return -EINVAL;
464 }
465
466 dvcpu->arch.wait = 0;
467
468 if (waitqueue_active(&dvcpu->wq)) {
469 wake_up_interruptible(&dvcpu->wq);
470 }
471
472 return 0;
473}
474
475int
476kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
477 struct kvm_mp_state *mp_state)
478{
ed829857 479 return -ENOIOCTLCMD;
669e846e
SL		 480}
481
482int
483kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
484 struct kvm_mp_state *mp_state)
485{
ed829857 486 return -ENOIOCTLCMD;
669e846e
SL		 487}
488
4c73fb2b
DD		 489static u64 kvm_mips_get_one_regs[] = {
490 KVM_REG_MIPS_R0,
491 KVM_REG_MIPS_R1,
492 KVM_REG_MIPS_R2,
493 KVM_REG_MIPS_R3,
494 KVM_REG_MIPS_R4,
495 KVM_REG_MIPS_R5,
496 KVM_REG_MIPS_R6,
497 KVM_REG_MIPS_R7,
498 KVM_REG_MIPS_R8,
499 KVM_REG_MIPS_R9,
500 KVM_REG_MIPS_R10,
501 KVM_REG_MIPS_R11,
502 KVM_REG_MIPS_R12,
503 KVM_REG_MIPS_R13,
504 KVM_REG_MIPS_R14,
505 KVM_REG_MIPS_R15,
506 KVM_REG_MIPS_R16,
507 KVM_REG_MIPS_R17,
508 KVM_REG_MIPS_R18,
509 KVM_REG_MIPS_R19,
510 KVM_REG_MIPS_R20,
511 KVM_REG_MIPS_R21,
512 KVM_REG_MIPS_R22,
513 KVM_REG_MIPS_R23,
514 KVM_REG_MIPS_R24,
515 KVM_REG_MIPS_R25,
516 KVM_REG_MIPS_R26,
517 KVM_REG_MIPS_R27,
518 KVM_REG_MIPS_R28,
519 KVM_REG_MIPS_R29,
520 KVM_REG_MIPS_R30,
521 KVM_REG_MIPS_R31,
522
523 KVM_REG_MIPS_HI,
524 KVM_REG_MIPS_LO,
525 KVM_REG_MIPS_PC,
526
527 KVM_REG_MIPS_CP0_INDEX,
528 KVM_REG_MIPS_CP0_CONTEXT,
7767b7d2 529 KVM_REG_MIPS_CP0_USERLOCAL,
4c73fb2b
DD		 530 KVM_REG_MIPS_CP0_PAGEMASK,
531 KVM_REG_MIPS_CP0_WIRED,
16fd5c1d 532 KVM_REG_MIPS_CP0_HWRENA,
4c73fb2b 533 KVM_REG_MIPS_CP0_BADVADDR,
f8be02da 534 KVM_REG_MIPS_CP0_COUNT,
4c73fb2b 535 KVM_REG_MIPS_CP0_ENTRYHI,
f8be02da 536 KVM_REG_MIPS_CP0_COMPARE,
4c73fb2b
DD		 537 KVM_REG_MIPS_CP0_STATUS,
538 KVM_REG_MIPS_CP0_CAUSE,
fb6df0cd 539 KVM_REG_MIPS_CP0_EPC,
4c73fb2b
DD		 540 KVM_REG_MIPS_CP0_CONFIG,
541 KVM_REG_MIPS_CP0_CONFIG1,
542 KVM_REG_MIPS_CP0_CONFIG2,
543 KVM_REG_MIPS_CP0_CONFIG3,
544 KVM_REG_MIPS_CP0_CONFIG7,
545 KVM_REG_MIPS_CP0_ERROREPC
546};
547
548static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
549 const struct kvm_one_reg *reg)
550{
4c73fb2b 551 struct mips_coproc *cop0 = vcpu->arch.cop0;
f8be02da 552 int ret;
4c73fb2b
DD		 553 s64 v;
554
555 switch (reg->id) {
556 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
557 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
558 break;
559 case KVM_REG_MIPS_HI:
560 v = (long)vcpu->arch.hi;
561 break;
562 case KVM_REG_MIPS_LO:
563 v = (long)vcpu->arch.lo;
564 break;
565 case KVM_REG_MIPS_PC:
566 v = (long)vcpu->arch.pc;
567 break;
568
569 case KVM_REG_MIPS_CP0_INDEX:
570 v = (long)kvm_read_c0_guest_index(cop0);
571 break;
572 case KVM_REG_MIPS_CP0_CONTEXT:
573 v = (long)kvm_read_c0_guest_context(cop0);
574 break;
7767b7d2
JH		 575 case KVM_REG_MIPS_CP0_USERLOCAL:
576 v = (long)kvm_read_c0_guest_userlocal(cop0);
577 break;
4c73fb2b
DD		 578 case KVM_REG_MIPS_CP0_PAGEMASK:
579 v = (long)kvm_read_c0_guest_pagemask(cop0);
580 break;
581 case KVM_REG_MIPS_CP0_WIRED:
582 v = (long)kvm_read_c0_guest_wired(cop0);
583 break;
16fd5c1d
JH		 584 case KVM_REG_MIPS_CP0_HWRENA:
585 v = (long)kvm_read_c0_guest_hwrena(cop0);
586 break;
4c73fb2b
DD		 587 case KVM_REG_MIPS_CP0_BADVADDR:
588 v = (long)kvm_read_c0_guest_badvaddr(cop0);
589 break;
590 case KVM_REG_MIPS_CP0_ENTRYHI:
591 v = (long)kvm_read_c0_guest_entryhi(cop0);
592 break;
f8be02da
JH		 593 case KVM_REG_MIPS_CP0_COMPARE:
594 v = (long)kvm_read_c0_guest_compare(cop0);
595 break;
4c73fb2b
DD		 596 case KVM_REG_MIPS_CP0_STATUS:
597 v = (long)kvm_read_c0_guest_status(cop0);
598 break;
599 case KVM_REG_MIPS_CP0_CAUSE:
600 v = (long)kvm_read_c0_guest_cause(cop0);
601 break;
fb6df0cd
JH		 602 case KVM_REG_MIPS_CP0_EPC:
603 v = (long)kvm_read_c0_guest_epc(cop0);
604 break;
4c73fb2b
DD		 605 case KVM_REG_MIPS_CP0_ERROREPC:
606 v = (long)kvm_read_c0_guest_errorepc(cop0);
607 break;
608 case KVM_REG_MIPS_CP0_CONFIG:
609 v = (long)kvm_read_c0_guest_config(cop0);
610 break;
611 case KVM_REG_MIPS_CP0_CONFIG1:
612 v = (long)kvm_read_c0_guest_config1(cop0);
613 break;
614 case KVM_REG_MIPS_CP0_CONFIG2:
615 v = (long)kvm_read_c0_guest_config2(cop0);
616 break;
617 case KVM_REG_MIPS_CP0_CONFIG3:
618 v = (long)kvm_read_c0_guest_config3(cop0);
619 break;
620 case KVM_REG_MIPS_CP0_CONFIG7:
621 v = (long)kvm_read_c0_guest_config7(cop0);
622 break;
f8be02da
JH		 623 /* registers to be handled specially */
624 case KVM_REG_MIPS_CP0_COUNT:
625 ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v);
626 if (ret)
627 return ret;
628 break;
4c73fb2b
DD		 629 default:
630 return -EINVAL;
631 }
681865d4
DD		 632 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
633 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
634 return put_user(v, uaddr64);
635 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
636 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
637 u32 v32 = (u32)v;
638 return put_user(v32, uaddr32);
639 } else {
640 return -EINVAL;
641 }
4c73fb2b
DD		 642}
643
644static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
645 const struct kvm_one_reg *reg)
646{
4c73fb2b
DD		 647 struct mips_coproc *cop0 = vcpu->arch.cop0;
648 u64 v;
649
681865d4
DD		 650 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
651 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
652
653 if (get_user(v, uaddr64) != 0)
654 return -EFAULT;
655 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
656 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
657 s32 v32;
658
659 if (get_user(v32, uaddr32) != 0)
660 return -EFAULT;
661 v = (s64)v32;
662 } else {
663 return -EINVAL;
664 }
4c73fb2b
DD		 665
666 switch (reg->id) {
667 case KVM_REG_MIPS_R0:
668 /* Silently ignore requests to set $0 */
669 break;
670 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
671 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
672 break;
673 case KVM_REG_MIPS_HI:
674 vcpu->arch.hi = v;
675 break;
676 case KVM_REG_MIPS_LO:
677 vcpu->arch.lo = v;
678 break;
679 case KVM_REG_MIPS_PC:
680 vcpu->arch.pc = v;
681 break;
682
683 case KVM_REG_MIPS_CP0_INDEX:
684 kvm_write_c0_guest_index(cop0, v);
685 break;
686 case KVM_REG_MIPS_CP0_CONTEXT:
687 kvm_write_c0_guest_context(cop0, v);
688 break;
7767b7d2
JH		 689 case KVM_REG_MIPS_CP0_USERLOCAL:
690 kvm_write_c0_guest_userlocal(cop0, v);
691 break;
4c73fb2b
DD		 692 case KVM_REG_MIPS_CP0_PAGEMASK:
693 kvm_write_c0_guest_pagemask(cop0, v);
694 break;
695 case KVM_REG_MIPS_CP0_WIRED:
696 kvm_write_c0_guest_wired(cop0, v);
697 break;
16fd5c1d
JH		 698 case KVM_REG_MIPS_CP0_HWRENA:
699 kvm_write_c0_guest_hwrena(cop0, v);
700 break;
4c73fb2b
DD		 701 case KVM_REG_MIPS_CP0_BADVADDR:
702 kvm_write_c0_guest_badvaddr(cop0, v);
703 break;
704 case KVM_REG_MIPS_CP0_ENTRYHI:
705 kvm_write_c0_guest_entryhi(cop0, v);
706 break;
707 case KVM_REG_MIPS_CP0_STATUS:
708 kvm_write_c0_guest_status(cop0, v);
709 break;
fb6df0cd
JH		 710 case KVM_REG_MIPS_CP0_EPC:
711 kvm_write_c0_guest_epc(cop0, v);
712 break;
4c73fb2b
DD		 713 case KVM_REG_MIPS_CP0_ERROREPC:
714 kvm_write_c0_guest_errorepc(cop0, v);
715 break;
f8be02da
JH		 716 /* registers to be handled specially */
717 case KVM_REG_MIPS_CP0_COUNT:
718 case KVM_REG_MIPS_CP0_COMPARE:
e30492bb 719 case KVM_REG_MIPS_CP0_CAUSE:
f8be02da 720 return kvm_mips_callbacks->set_one_reg(vcpu, reg, v);
4c73fb2b
DD		 721 default:
722 return -EINVAL;
723 }
724 return 0;
725}
726
669e846e
SL		 727long
728kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
729{
730 struct kvm_vcpu *vcpu = filp->private_data;
731 void __user *argp = (void __user *)arg;
732 long r;
669e846e
SL		 733
734 switch (ioctl) {
4c73fb2b
DD		 735 case KVM_SET_ONE_REG:
736 case KVM_GET_ONE_REG: {
737 struct kvm_one_reg reg;
738 if (copy_from_user(&reg, argp, sizeof(reg)))
739 return -EFAULT;
740 if (ioctl == KVM_SET_ONE_REG)
741 return kvm_mips_set_reg(vcpu, &reg);
742 else
743 return kvm_mips_get_reg(vcpu, &reg);
744 }
745 case KVM_GET_REG_LIST: {
746 struct kvm_reg_list __user *user_list = argp;
747 u64 __user *reg_dest;
748 struct kvm_reg_list reg_list;
749 unsigned n;
750
751 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
752 return -EFAULT;
753 n = reg_list.n;
754 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
755 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
756 return -EFAULT;
757 if (n < reg_list.n)
758 return -E2BIG;
759 reg_dest = user_list->reg;
760 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
761 sizeof(kvm_mips_get_one_regs)))
762 return -EFAULT;
763 return 0;
764 }
669e846e
SL		 765 case KVM_NMI:
766 /* Treat the NMI as a CPU reset */
767 r = kvm_mips_reset_vcpu(vcpu);
768 break;
769 case KVM_INTERRUPT:
770 {
771 struct kvm_mips_interrupt irq;
772 r = -EFAULT;
773 if (copy_from_user(&irq, argp, sizeof(irq)))
774 goto out;
775
669e846e
SL		 776 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
777 irq.irq);
778
779 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
780 break;
781 }
782 default:
4c73fb2b 783 r = -ENOIOCTLCMD;
669e846e
SL		 784 }
785
786out:
787 return r;
788}
789
790/*
791 * Get (and clear) the dirty memory log for a memory slot.
792 */
793int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
794{
795 struct kvm_memory_slot *memslot;
796 unsigned long ga, ga_end;
797 int is_dirty = 0;
798 int r;
799 unsigned long n;
800
801 mutex_lock(&kvm->slots_lock);
802
803 r = kvm_get_dirty_log(kvm, log, &is_dirty);
804 if (r)
805 goto out;
806
807 /* If nothing is dirty, don't bother messing with page tables. */
808 if (is_dirty) {
809 memslot = &kvm->memslots->memslots[log->slot];
810
811 ga = memslot->base_gfn << PAGE_SHIFT;
812 ga_end = ga + (memslot->npages << PAGE_SHIFT);
813
814 printk("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
815 ga_end);
816
817 n = kvm_dirty_bitmap_bytes(memslot);
818 memset(memslot->dirty_bitmap, 0, n);
819 }
820
821 r = 0;
822out:
823 mutex_unlock(&kvm->slots_lock);
824 return r;
825
826}
827
828long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
829{
830 long r;
831
832 switch (ioctl) {
833 default:
ed829857 834 r = -ENOIOCTLCMD;
669e846e
SL		 835 }
836
837 return r;
838}
839
840int kvm_arch_init(void *opaque)
841{
842 int ret;
843
844 if (kvm_mips_callbacks) {
845 kvm_err("kvm: module already exists\n");
846 return -EEXIST;
847 }
848
849 ret = kvm_mips_emulation_init(&kvm_mips_callbacks);
850
851 return ret;
852}
853
854void kvm_arch_exit(void)
855{
856 kvm_mips_callbacks = NULL;
857}
858
859int
860kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
861{
ed829857 862 return -ENOIOCTLCMD;
669e846e
SL		 863}
864
865int
866kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
867{
ed829857 868 return -ENOIOCTLCMD;
669e846e
SL		 869}
870
871int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
872{
873 return 0;
874}
875
876int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
877{
ed829857 878 return -ENOIOCTLCMD;
669e846e
SL		 879}
880
881int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
882{
ed829857 883 return -ENOIOCTLCMD;
669e846e
SL		 884}
885
886int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
887{
888 return VM_FAULT_SIGBUS;
889}
890
891int kvm_dev_ioctl_check_extension(long ext)
892{
893 int r;
894
895 switch (ext) {
4c73fb2b
DD		 896 case KVM_CAP_ONE_REG:
897 r = 1;
898 break;
669e846e
SL		 899 case KVM_CAP_COALESCED_MMIO:
900 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
901 break;
902 default:
903 r = 0;
904 break;
905 }
906 return r;
669e846e
SL		 907}
908
909int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
910{
911 return kvm_mips_pending_timer(vcpu);
912}
913
914int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
915{
916 int i;
917 struct mips_coproc *cop0;
918
919 if (!vcpu)
920 return -1;
921
922 printk("VCPU Register Dump:\n");
923 printk("\tpc = 0x%08lx\n", vcpu->arch.pc);;
924 printk("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
925
926 for (i = 0; i < 32; i += 4) {
927 printk("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
928 vcpu->arch.gprs[i],
929 vcpu->arch.gprs[i + 1],
930 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
931 }
932 printk("\thi: 0x%08lx\n", vcpu->arch.hi);
933 printk("\tlo: 0x%08lx\n", vcpu->arch.lo);
934
935 cop0 = vcpu->arch.cop0;
936 printk("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
937 kvm_read_c0_guest_status(cop0), kvm_read_c0_guest_cause(cop0));
938
939 printk("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
940
941 return 0;
942}
943
944int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
945{
946 int i;
947
8d17dd04 948 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 949 vcpu->arch.gprs[i] = regs->gpr[i];
8d17dd04 950 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
669e846e
SL		 951 vcpu->arch.hi = regs->hi;
952 vcpu->arch.lo = regs->lo;
953 vcpu->arch.pc = regs->pc;
954
4c73fb2b 955 return 0;
669e846e
SL		 956}
957
958int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
959{
960 int i;
961
8d17dd04 962 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 963 regs->gpr[i] = vcpu->arch.gprs[i];
669e846e
SL		 964
965 regs->hi = vcpu->arch.hi;
966 regs->lo = vcpu->arch.lo;
967 regs->pc = vcpu->arch.pc;
968
4c73fb2b 969 return 0;
669e846e
SL		 970}
971
972void kvm_mips_comparecount_func(unsigned long data)
973{
974 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
975
976 kvm_mips_callbacks->queue_timer_int(vcpu);
977
978 vcpu->arch.wait = 0;
979 if (waitqueue_active(&vcpu->wq)) {
980 wake_up_interruptible(&vcpu->wq);
981 }
982}
983
984/*
985 * low level hrtimer wake routine.
986 */
987enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
988{
989 struct kvm_vcpu *vcpu;
990
991 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
992 kvm_mips_comparecount_func((unsigned long) vcpu);
e30492bb 993 return kvm_mips_count_timeout(vcpu);
669e846e
SL		 994}
995
996int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
997{
998 kvm_mips_callbacks->vcpu_init(vcpu);
999 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
1000 HRTIMER_MODE_REL);
1001 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
669e846e
SL		 1002 return 0;
1003}
1004
1005void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
1006{
1007 return;
1008}
1009
1010int
1011kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, struct kvm_translation *tr)
1012{
1013 return 0;
1014}
1015
1016/* Initial guest state */
1017int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1018{
1019 return kvm_mips_callbacks->vcpu_setup(vcpu);
1020}
1021
1022static
1023void kvm_mips_set_c0_status(void)
1024{
1025 uint32_t status = read_c0_status();
1026
1027 if (cpu_has_fpu)
1028 status |= (ST0_CU1);
1029
1030 if (cpu_has_dsp)
1031 status |= (ST0_MX);
1032
1033 write_c0_status(status);
1034 ehb();
1035}
1036
1037/*
1038 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1039 */
1040int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1041{
1042 uint32_t cause = vcpu->arch.host_cp0_cause;
1043 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1044 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1045 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1046 enum emulation_result er = EMULATE_DONE;
1047 int ret = RESUME_GUEST;
1048
1049 /* Set a default exit reason */
1050 run->exit_reason = KVM_EXIT_UNKNOWN;
1051 run->ready_for_interrupt_injection = 1;
1052
1053 /* Set the appropriate status bits based on host CPU features, before we hit the scheduler */
1054 kvm_mips_set_c0_status();
1055
1056 local_irq_enable();
1057
1058 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1059 cause, opc, run, vcpu);
1060
1061 /* Do a privilege check, if in UM most of these exit conditions end up
1062 * causing an exception to be delivered to the Guest Kernel
1063 */
1064 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1065 if (er == EMULATE_PRIV_FAIL) {
1066 goto skip_emul;
1067 } else if (er == EMULATE_FAIL) {
1068 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1069 ret = RESUME_HOST;
1070 goto skip_emul;
1071 }
1072
1073 switch (exccode) {
1074 case T_INT:
1075 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1076
1077 ++vcpu->stat.int_exits;
1078 trace_kvm_exit(vcpu, INT_EXITS);
1079
1080 if (need_resched()) {
1081 cond_resched();
1082 }
1083
1084 ret = RESUME_GUEST;
1085 break;
1086
1087 case T_COP_UNUSABLE:
1088 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1089
1090 ++vcpu->stat.cop_unusable_exits;
1091 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1092 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1093 /* XXXKYMA: Might need to return to user space */
1094 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN) {
1095 ret = RESUME_HOST;
1096 }
1097 break;
1098
1099 case T_TLB_MOD:
1100 ++vcpu->stat.tlbmod_exits;
1101 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1102 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1103 break;
1104
1105 case T_TLB_ST_MISS:
1106 kvm_debug
1107 ("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1108 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1109 badvaddr);
1110
1111 ++vcpu->stat.tlbmiss_st_exits;
1112 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1113 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1114 break;
1115
1116 case T_TLB_LD_MISS:
1117 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1118 cause, opc, badvaddr);
1119
1120 ++vcpu->stat.tlbmiss_ld_exits;
1121 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1122 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1123 break;
1124
1125 case T_ADDR_ERR_ST:
1126 ++vcpu->stat.addrerr_st_exits;
1127 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1128 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1129 break;
1130
1131 case T_ADDR_ERR_LD:
1132 ++vcpu->stat.addrerr_ld_exits;
1133 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1134 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1135 break;
1136
1137 case T_SYSCALL:
1138 ++vcpu->stat.syscall_exits;
1139 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1140 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1141 break;
1142
1143 case T_RES_INST:
1144 ++vcpu->stat.resvd_inst_exits;
1145 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1146 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1147 break;
1148
1149 case T_BREAK:
1150 ++vcpu->stat.break_inst_exits;
1151 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1152 ret = kvm_mips_callbacks->handle_break(vcpu);
1153 break;
1154
1155 default:
1156 kvm_err
1157 ("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1158 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1159 kvm_read_c0_guest_status(vcpu->arch.cop0));
1160 kvm_arch_vcpu_dump_regs(vcpu);
1161 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1162 ret = RESUME_HOST;
1163 break;
1164
1165 }
1166
1167skip_emul:
1168 local_irq_disable();
1169
1170 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1171 kvm_mips_deliver_interrupts(vcpu, cause);
1172
1173 if (!(ret & RESUME_HOST)) {
1174 /* Only check for signals if not already exiting to userspace */
1175 if (signal_pending(current)) {
1176 run->exit_reason = KVM_EXIT_INTR;
1177 ret = (-EINTR << 2) | RESUME_HOST;
1178 ++vcpu->stat.signal_exits;
1179 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1180 }
1181 }
1182
1183 return ret;
1184}
1185
1186int __init kvm_mips_init(void)
1187{
1188 int ret;
1189
1190 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1191
1192 if (ret)
1193 return ret;
1194
1195 /* On MIPS, kernel modules are executed from "mapped space", which requires TLBs.
1196 * The TLB handling code is statically linked with the rest of the kernel (kvm_tlb.c)
1197 * to avoid the possibility of double faulting. The issue is that the TLB code
1198 * references routines that are part of the the KVM module,
1199 * which are only available once the module is loaded.
1200 */
1201 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1202 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1203 kvm_mips_is_error_pfn = is_error_pfn;
1204
1205 pr_info("KVM/MIPS Initialized\n");
1206 return 0;
1207}
1208
1209void __exit kvm_mips_exit(void)
1210{
1211 kvm_exit();
1212
1213 kvm_mips_gfn_to_pfn = NULL;
1214 kvm_mips_release_pfn_clean = NULL;
1215 kvm_mips_is_error_pfn = NULL;
1216
1217 pr_info("KVM/MIPS unloaded\n");
1218}
1219
1220module_init(kvm_mips_init);
1221module_exit(kvm_mips_exit);
1222
1223EXPORT_TRACEPOINT_SYMBOL(kvm_exit);
Linux kernel - Deliverables
This page took 0.109917 seconds and 5 git commands to generate.