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Merge tag 'kvm-s390-next-20150122' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / mips / kvm / mips.c
CommitLineData
669e846e
SL		 1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
d116e812 10 */
669e846e
SL		 11
12#include <linux/errno.h>
13#include <linux/err.h>
14#include <linux/module.h>
15#include <linux/vmalloc.h>
16#include <linux/fs.h>
17#include <linux/bootmem.h>
18#include <asm/page.h>
19#include <asm/cacheflush.h>
20#include <asm/mmu_context.h>
21
22#include <linux/kvm_host.h>
23
d7d5b05f
DCZ		 24#include "interrupt.h"
25#include "commpage.h"
669e846e
SL		 26
27#define CREATE_TRACE_POINTS
28#include "trace.h"
29
30#ifndef VECTORSPACING
31#define VECTORSPACING 0x100 /* for EI/VI mode */
32#endif
33
d116e812 34#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x)
669e846e 35struct kvm_stats_debugfs_item debugfs_entries[] = {
d116e812
DCZ		 36 { "wait", VCPU_STAT(wait_exits), KVM_STAT_VCPU },
37 { "cache", VCPU_STAT(cache_exits), KVM_STAT_VCPU },
38 { "signal", VCPU_STAT(signal_exits), KVM_STAT_VCPU },
39 { "interrupt", VCPU_STAT(int_exits), KVM_STAT_VCPU },
40 { "cop_unsuable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
41 { "tlbmod", VCPU_STAT(tlbmod_exits), KVM_STAT_VCPU },
42 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits), KVM_STAT_VCPU },
43 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits), KVM_STAT_VCPU },
44 { "addrerr_st", VCPU_STAT(addrerr_st_exits), KVM_STAT_VCPU },
45 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits), KVM_STAT_VCPU },
46 { "syscall", VCPU_STAT(syscall_exits), KVM_STAT_VCPU },
47 { "resvd_inst", VCPU_STAT(resvd_inst_exits), KVM_STAT_VCPU },
48 { "break_inst", VCPU_STAT(break_inst_exits), KVM_STAT_VCPU },
49 { "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU },
50 { "halt_wakeup", VCPU_STAT(halt_wakeup), KVM_STAT_VCPU },
669e846e
SL		 51 {NULL}
52};
53
54static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
55{
56 int i;
d116e812 57
669e846e
SL		 58 for_each_possible_cpu(i) {
59 vcpu->arch.guest_kernel_asid[i] = 0;
60 vcpu->arch.guest_user_asid[i] = 0;
61 }
d116e812 62
669e846e
SL		 63 return 0;
64}
65
d116e812
DCZ		 66/*
67 * XXXKYMA: We are simulatoring a processor that has the WII bit set in
68 * Config7, so we are "runnable" if interrupts are pending
669e846e
SL		 69 */
70int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
71{
72 return !!(vcpu->arch.pending_exceptions);
73}
74
75int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
76{
77 return 1;
78}
79
13a34e06 80int kvm_arch_hardware_enable(void)
669e846e
SL		 81{
82 return 0;
83}
84
669e846e
SL		 85int kvm_arch_hardware_setup(void)
86{
87 return 0;
88}
89
669e846e
SL		 90void kvm_arch_check_processor_compat(void *rtn)
91{
d98403a5 92 *(int *)rtn = 0;
669e846e
SL		 93}
94
95static void kvm_mips_init_tlbs(struct kvm *kvm)
96{
97 unsigned long wired;
98
d116e812
DCZ		 99 /*
100 * Add a wired entry to the TLB, it is used to map the commpage to
101 * the Guest kernel
102 */
669e846e
SL		 103 wired = read_c0_wired();
104 write_c0_wired(wired + 1);
105 mtc0_tlbw_hazard();
106 kvm->arch.commpage_tlb = wired;
107
108 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
109 kvm->arch.commpage_tlb);
110}
111
112static void kvm_mips_init_vm_percpu(void *arg)
113{
114 struct kvm *kvm = (struct kvm *)arg;
115
116 kvm_mips_init_tlbs(kvm);
117 kvm_mips_callbacks->vm_init(kvm);
118
119}
120
121int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
122{
123 if (atomic_inc_return(&kvm_mips_instance) == 1) {
6e95bfd2
JH		 124 kvm_debug("%s: 1st KVM instance, setup host TLB parameters\n",
125 __func__);
669e846e
SL		 126 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
127 }
128
669e846e
SL		 129 return 0;
130}
131
132void kvm_mips_free_vcpus(struct kvm *kvm)
133{
134 unsigned int i;
135 struct kvm_vcpu *vcpu;
136
137 /* Put the pages we reserved for the guest pmap */
138 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
139 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
140 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
141 }
c6c0a663 142 kfree(kvm->arch.guest_pmap);
669e846e
SL		 143
144 kvm_for_each_vcpu(i, vcpu, kvm) {
145 kvm_arch_vcpu_free(vcpu);
146 }
147
148 mutex_lock(&kvm->lock);
149
150 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
151 kvm->vcpus[i] = NULL;
152
153 atomic_set(&kvm->online_vcpus, 0);
154
155 mutex_unlock(&kvm->lock);
156}
157
669e846e
SL		 158static void kvm_mips_uninit_tlbs(void *arg)
159{
160 /* Restore wired count */
161 write_c0_wired(0);
162 mtc0_tlbw_hazard();
163 /* Clear out all the TLBs */
164 kvm_local_flush_tlb_all();
165}
166
167void kvm_arch_destroy_vm(struct kvm *kvm)
168{
169 kvm_mips_free_vcpus(kvm);
170
171 /* If this is the last instance, restore wired count */
172 if (atomic_dec_return(&kvm_mips_instance) == 0) {
6e95bfd2
JH		 173 kvm_debug("%s: last KVM instance, restoring TLB parameters\n",
174 __func__);
669e846e
SL		 175 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
176 }
177}
178
d116e812
DCZ		 179long kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl,
180 unsigned long arg)
669e846e 181{
ed829857 182 return -ENOIOCTLCMD;
669e846e
SL		 183}
184
5587027c
AK		 185int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
186 unsigned long npages)
669e846e
SL		 187{
188 return 0;
189}
190
191int kvm_arch_prepare_memory_region(struct kvm *kvm,
d116e812
DCZ		 192 struct kvm_memory_slot *memslot,
193 struct kvm_userspace_memory_region *mem,
194 enum kvm_mr_change change)
669e846e
SL		 195{
196 return 0;
197}
198
199void kvm_arch_commit_memory_region(struct kvm *kvm,
d116e812
DCZ		 200 struct kvm_userspace_memory_region *mem,
201 const struct kvm_memory_slot *old,
202 enum kvm_mr_change change)
669e846e
SL		 203{
204 unsigned long npages = 0;
d98403a5 205 int i;
669e846e
SL		 206
207 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
208 __func__, kvm, mem->slot, mem->guest_phys_addr,
209 mem->memory_size, mem->userspace_addr);
210
211 /* Setup Guest PMAP table */
212 if (!kvm->arch.guest_pmap) {
213 if (mem->slot == 0)
214 npages = mem->memory_size >> PAGE_SHIFT;
215
216 if (npages) {
217 kvm->arch.guest_pmap_npages = npages;
218 kvm->arch.guest_pmap =
219 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
220
221 if (!kvm->arch.guest_pmap) {
222 kvm_err("Failed to allocate guest PMAP");
d98403a5 223 return;
669e846e
SL		 224 }
225
6e95bfd2
JH		 226 kvm_debug("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
227 npages, kvm->arch.guest_pmap);
669e846e
SL		 228
229 /* Now setup the page table */
d116e812 230 for (i = 0; i < npages; i++)
669e846e 231 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
669e846e
SL		 232 }
233 }
669e846e
SL		 234}
235
669e846e
SL		 236struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
237{
669e846e
SL		 238 int err, size, offset;
239 void *gebase;
240 int i;
241
242 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
243
244 if (!vcpu) {
245 err = -ENOMEM;
246 goto out;
247 }
248
249 err = kvm_vcpu_init(vcpu, kvm, id);
250
251 if (err)
252 goto out_free_cpu;
253
6e95bfd2 254 kvm_debug("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
669e846e 255
d116e812
DCZ		 256 /*
257 * Allocate space for host mode exception handlers that handle
669e846e
SL		 258 * guest mode exits
259 */
d116e812 260 if (cpu_has_veic || cpu_has_vint)
669e846e 261 size = 0x200 + VECTORSPACING * 64;
d116e812 262 else
7006e2df 263 size = 0x4000;
669e846e
SL		 264
265 /* Save Linux EBASE */
266 vcpu->arch.host_ebase = (void *)read_c0_ebase();
267
268 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
269
270 if (!gebase) {
271 err = -ENOMEM;
272 goto out_free_cpu;
273 }
6e95bfd2
JH		 274 kvm_debug("Allocated %d bytes for KVM Exception Handlers @ %p\n",
275 ALIGN(size, PAGE_SIZE), gebase);
669e846e
SL		 276
277 /* Save new ebase */
278 vcpu->arch.guest_ebase = gebase;
279
280 /* Copy L1 Guest Exception handler to correct offset */
281
282 /* TLB Refill, EXL = 0 */
283 memcpy(gebase, mips32_exception,
284 mips32_exceptionEnd - mips32_exception);
285
286 /* General Exception Entry point */
287 memcpy(gebase + 0x180, mips32_exception,
288 mips32_exceptionEnd - mips32_exception);
289
290 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
291 for (i = 0; i < 8; i++) {
292 kvm_debug("L1 Vectored handler @ %p\n",
293 gebase + 0x200 + (i * VECTORSPACING));
294 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
295 mips32_exceptionEnd - mips32_exception);
296 }
297
298 /* General handler, relocate to unmapped space for sanity's sake */
299 offset = 0x2000;
6e95bfd2
JH		 300 kvm_debug("Installing KVM Exception handlers @ %p, %#x bytes\n",
301 gebase + offset,
302 mips32_GuestExceptionEnd - mips32_GuestException);
669e846e
SL		 303
304 memcpy(gebase + offset, mips32_GuestException,
305 mips32_GuestExceptionEnd - mips32_GuestException);
306
307 /* Invalidate the icache for these ranges */
facaaec1
JH		 308 local_flush_icache_range((unsigned long)gebase,
309 (unsigned long)gebase + ALIGN(size, PAGE_SIZE));
669e846e 310
d116e812
DCZ		 311 /*
312 * Allocate comm page for guest kernel, a TLB will be reserved for
313 * mapping GVA @ 0xFFFF8000 to this page
314 */
669e846e
SL		 315 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
316
317 if (!vcpu->arch.kseg0_commpage) {
318 err = -ENOMEM;
319 goto out_free_gebase;
320 }
321
6e95bfd2 322 kvm_debug("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
669e846e
SL		 323 kvm_mips_commpage_init(vcpu);
324
325 /* Init */
326 vcpu->arch.last_sched_cpu = -1;
327
328 /* Start off the timer */
e30492bb 329 kvm_mips_init_count(vcpu);
669e846e
SL		 330
331 return vcpu;
332
333out_free_gebase:
334 kfree(gebase);
335
336out_free_cpu:
337 kfree(vcpu);
338
339out:
340 return ERR_PTR(err);
341}
342
343void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
344{
345 hrtimer_cancel(&vcpu->arch.comparecount_timer);
346
347 kvm_vcpu_uninit(vcpu);
348
349 kvm_mips_dump_stats(vcpu);
350
c6c0a663
JH		 351 kfree(vcpu->arch.guest_ebase);
352 kfree(vcpu->arch.kseg0_commpage);
8c9eb041 353 kfree(vcpu);
669e846e
SL		 354}
355
356void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
357{
358 kvm_arch_vcpu_free(vcpu);
359}
360
d116e812
DCZ		 361int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
362 struct kvm_guest_debug *dbg)
669e846e 363{
ed829857 364 return -ENOIOCTLCMD;
669e846e
SL		 365}
366
367int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
368{
369 int r = 0;
370 sigset_t sigsaved;
371
372 if (vcpu->sigset_active)
373 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
374
375 if (vcpu->mmio_needed) {
376 if (!vcpu->mmio_is_write)
377 kvm_mips_complete_mmio_load(vcpu, run);
378 vcpu->mmio_needed = 0;
379 }
380
044f0f03 381 local_irq_disable();
669e846e
SL		 382 /* Check if we have any exceptions/interrupts pending */
383 kvm_mips_deliver_interrupts(vcpu,
384 kvm_read_c0_guest_cause(vcpu->arch.cop0));
385
669e846e
SL		 386 kvm_guest_enter();
387
388 r = __kvm_mips_vcpu_run(run, vcpu);
389
390 kvm_guest_exit();
391 local_irq_enable();
392
393 if (vcpu->sigset_active)
394 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
395
396 return r;
397}
398
d116e812
DCZ		 399int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
400 struct kvm_mips_interrupt *irq)
669e846e
SL		 401{
402 int intr = (int)irq->irq;
403 struct kvm_vcpu *dvcpu = NULL;
404
405 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
406 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
407 (int)intr);
408
409 if (irq->cpu == -1)
410 dvcpu = vcpu;
411 else
412 dvcpu = vcpu->kvm->vcpus[irq->cpu];
413
414 if (intr == 2 || intr == 3 || intr == 4) {
415 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
416
417 } else if (intr == -2 || intr == -3 || intr == -4) {
418 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
419 } else {
420 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
421 irq->cpu, irq->irq);
422 return -EINVAL;
423 }
424
425 dvcpu->arch.wait = 0;
426
d116e812 427 if (waitqueue_active(&dvcpu->wq))
669e846e 428 wake_up_interruptible(&dvcpu->wq);
669e846e
SL		 429
430 return 0;
431}
432
d116e812
DCZ		 433int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
434 struct kvm_mp_state *mp_state)
669e846e 435{
ed829857 436 return -ENOIOCTLCMD;
669e846e
SL		 437}
438
d116e812
DCZ		 439int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
440 struct kvm_mp_state *mp_state)
669e846e 441{
ed829857 442 return -ENOIOCTLCMD;
669e846e
SL		 443}
444
4c73fb2b
DD		 445static u64 kvm_mips_get_one_regs[] = {
446 KVM_REG_MIPS_R0,
447 KVM_REG_MIPS_R1,
448 KVM_REG_MIPS_R2,
449 KVM_REG_MIPS_R3,
450 KVM_REG_MIPS_R4,
451 KVM_REG_MIPS_R5,
452 KVM_REG_MIPS_R6,
453 KVM_REG_MIPS_R7,
454 KVM_REG_MIPS_R8,
455 KVM_REG_MIPS_R9,
456 KVM_REG_MIPS_R10,
457 KVM_REG_MIPS_R11,
458 KVM_REG_MIPS_R12,
459 KVM_REG_MIPS_R13,
460 KVM_REG_MIPS_R14,
461 KVM_REG_MIPS_R15,
462 KVM_REG_MIPS_R16,
463 KVM_REG_MIPS_R17,
464 KVM_REG_MIPS_R18,
465 KVM_REG_MIPS_R19,
466 KVM_REG_MIPS_R20,
467 KVM_REG_MIPS_R21,
468 KVM_REG_MIPS_R22,
469 KVM_REG_MIPS_R23,
470 KVM_REG_MIPS_R24,
471 KVM_REG_MIPS_R25,
472 KVM_REG_MIPS_R26,
473 KVM_REG_MIPS_R27,
474 KVM_REG_MIPS_R28,
475 KVM_REG_MIPS_R29,
476 KVM_REG_MIPS_R30,
477 KVM_REG_MIPS_R31,
478
479 KVM_REG_MIPS_HI,
480 KVM_REG_MIPS_LO,
481 KVM_REG_MIPS_PC,
482
483 KVM_REG_MIPS_CP0_INDEX,
484 KVM_REG_MIPS_CP0_CONTEXT,
7767b7d2 485 KVM_REG_MIPS_CP0_USERLOCAL,
4c73fb2b
DD		 486 KVM_REG_MIPS_CP0_PAGEMASK,
487 KVM_REG_MIPS_CP0_WIRED,
16fd5c1d 488 KVM_REG_MIPS_CP0_HWRENA,
4c73fb2b 489 KVM_REG_MIPS_CP0_BADVADDR,
f8be02da 490 KVM_REG_MIPS_CP0_COUNT,
4c73fb2b 491 KVM_REG_MIPS_CP0_ENTRYHI,
f8be02da 492 KVM_REG_MIPS_CP0_COMPARE,
4c73fb2b
DD		 493 KVM_REG_MIPS_CP0_STATUS,
494 KVM_REG_MIPS_CP0_CAUSE,
fb6df0cd 495 KVM_REG_MIPS_CP0_EPC,
4c73fb2b
DD		 496 KVM_REG_MIPS_CP0_CONFIG,
497 KVM_REG_MIPS_CP0_CONFIG1,
498 KVM_REG_MIPS_CP0_CONFIG2,
499 KVM_REG_MIPS_CP0_CONFIG3,
500 KVM_REG_MIPS_CP0_CONFIG7,
f8239342
JH		 501 KVM_REG_MIPS_CP0_ERROREPC,
502
503 KVM_REG_MIPS_COUNT_CTL,
504 KVM_REG_MIPS_COUNT_RESUME,
f74a8e22 505 KVM_REG_MIPS_COUNT_HZ,
4c73fb2b
DD		 506};
507
508static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
509 const struct kvm_one_reg *reg)
510{
4c73fb2b 511 struct mips_coproc *cop0 = vcpu->arch.cop0;
f8be02da 512 int ret;
4c73fb2b
DD		 513 s64 v;
514
515 switch (reg->id) {
516 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
517 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
518 break;
519 case KVM_REG_MIPS_HI:
520 v = (long)vcpu->arch.hi;
521 break;
522 case KVM_REG_MIPS_LO:
523 v = (long)vcpu->arch.lo;
524 break;
525 case KVM_REG_MIPS_PC:
526 v = (long)vcpu->arch.pc;
527 break;
528
529 case KVM_REG_MIPS_CP0_INDEX:
530 v = (long)kvm_read_c0_guest_index(cop0);
531 break;
532 case KVM_REG_MIPS_CP0_CONTEXT:
533 v = (long)kvm_read_c0_guest_context(cop0);
534 break;
7767b7d2
JH		 535 case KVM_REG_MIPS_CP0_USERLOCAL:
536 v = (long)kvm_read_c0_guest_userlocal(cop0);
537 break;
4c73fb2b
DD		 538 case KVM_REG_MIPS_CP0_PAGEMASK:
539 v = (long)kvm_read_c0_guest_pagemask(cop0);
540 break;
541 case KVM_REG_MIPS_CP0_WIRED:
542 v = (long)kvm_read_c0_guest_wired(cop0);
543 break;
16fd5c1d
JH		 544 case KVM_REG_MIPS_CP0_HWRENA:
545 v = (long)kvm_read_c0_guest_hwrena(cop0);
546 break;
4c73fb2b
DD		 547 case KVM_REG_MIPS_CP0_BADVADDR:
548 v = (long)kvm_read_c0_guest_badvaddr(cop0);
549 break;
550 case KVM_REG_MIPS_CP0_ENTRYHI:
551 v = (long)kvm_read_c0_guest_entryhi(cop0);
552 break;
f8be02da
JH		 553 case KVM_REG_MIPS_CP0_COMPARE:
554 v = (long)kvm_read_c0_guest_compare(cop0);
555 break;
4c73fb2b
DD		 556 case KVM_REG_MIPS_CP0_STATUS:
557 v = (long)kvm_read_c0_guest_status(cop0);
558 break;
559 case KVM_REG_MIPS_CP0_CAUSE:
560 v = (long)kvm_read_c0_guest_cause(cop0);
561 break;
fb6df0cd
JH		 562 case KVM_REG_MIPS_CP0_EPC:
563 v = (long)kvm_read_c0_guest_epc(cop0);
564 break;
4c73fb2b
DD		 565 case KVM_REG_MIPS_CP0_ERROREPC:
566 v = (long)kvm_read_c0_guest_errorepc(cop0);
567 break;
568 case KVM_REG_MIPS_CP0_CONFIG:
569 v = (long)kvm_read_c0_guest_config(cop0);
570 break;
571 case KVM_REG_MIPS_CP0_CONFIG1:
572 v = (long)kvm_read_c0_guest_config1(cop0);
573 break;
574 case KVM_REG_MIPS_CP0_CONFIG2:
575 v = (long)kvm_read_c0_guest_config2(cop0);
576 break;
577 case KVM_REG_MIPS_CP0_CONFIG3:
578 v = (long)kvm_read_c0_guest_config3(cop0);
579 break;
580 case KVM_REG_MIPS_CP0_CONFIG7:
581 v = (long)kvm_read_c0_guest_config7(cop0);
582 break;
f8be02da
JH		 583 /* registers to be handled specially */
584 case KVM_REG_MIPS_CP0_COUNT:
f8239342
JH		 585 case KVM_REG_MIPS_COUNT_CTL:
586 case KVM_REG_MIPS_COUNT_RESUME:
f74a8e22 587 case KVM_REG_MIPS_COUNT_HZ:
f8be02da
JH		 588 ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v);
589 if (ret)
590 return ret;
591 break;
4c73fb2b
DD		 592 default:
593 return -EINVAL;
594 }
681865d4
DD		 595 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
596 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
d116e812 597
681865d4
DD		 598 return put_user(v, uaddr64);
599 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
600 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
601 u32 v32 = (u32)v;
d116e812 602
681865d4
DD		 603 return put_user(v32, uaddr32);
604 } else {
605 return -EINVAL;
606 }
4c73fb2b
DD		 607}
608
609static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
610 const struct kvm_one_reg *reg)
611{
4c73fb2b
DD		 612 struct mips_coproc *cop0 = vcpu->arch.cop0;
613 u64 v;
614
681865d4
DD		 615 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
616 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
617
618 if (get_user(v, uaddr64) != 0)
619 return -EFAULT;
620 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
621 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
622 s32 v32;
623
624 if (get_user(v32, uaddr32) != 0)
625 return -EFAULT;
626 v = (s64)v32;
627 } else {
628 return -EINVAL;
629 }
4c73fb2b
DD		 630
631 switch (reg->id) {
632 case KVM_REG_MIPS_R0:
633 /* Silently ignore requests to set $0 */
634 break;
635 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
636 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
637 break;
638 case KVM_REG_MIPS_HI:
639 vcpu->arch.hi = v;
640 break;
641 case KVM_REG_MIPS_LO:
642 vcpu->arch.lo = v;
643 break;
644 case KVM_REG_MIPS_PC:
645 vcpu->arch.pc = v;
646 break;
647
648 case KVM_REG_MIPS_CP0_INDEX:
649 kvm_write_c0_guest_index(cop0, v);
650 break;
651 case KVM_REG_MIPS_CP0_CONTEXT:
652 kvm_write_c0_guest_context(cop0, v);
653 break;
7767b7d2
JH		 654 case KVM_REG_MIPS_CP0_USERLOCAL:
655 kvm_write_c0_guest_userlocal(cop0, v);
656 break;
4c73fb2b
DD		 657 case KVM_REG_MIPS_CP0_PAGEMASK:
658 kvm_write_c0_guest_pagemask(cop0, v);
659 break;
660 case KVM_REG_MIPS_CP0_WIRED:
661 kvm_write_c0_guest_wired(cop0, v);
662 break;
16fd5c1d
JH		 663 case KVM_REG_MIPS_CP0_HWRENA:
664 kvm_write_c0_guest_hwrena(cop0, v);
665 break;
4c73fb2b
DD		 666 case KVM_REG_MIPS_CP0_BADVADDR:
667 kvm_write_c0_guest_badvaddr(cop0, v);
668 break;
669 case KVM_REG_MIPS_CP0_ENTRYHI:
670 kvm_write_c0_guest_entryhi(cop0, v);
671 break;
672 case KVM_REG_MIPS_CP0_STATUS:
673 kvm_write_c0_guest_status(cop0, v);
674 break;
fb6df0cd
JH		 675 case KVM_REG_MIPS_CP0_EPC:
676 kvm_write_c0_guest_epc(cop0, v);
677 break;
4c73fb2b
DD		 678 case KVM_REG_MIPS_CP0_ERROREPC:
679 kvm_write_c0_guest_errorepc(cop0, v);
680 break;
f8be02da
JH		 681 /* registers to be handled specially */
682 case KVM_REG_MIPS_CP0_COUNT:
683 case KVM_REG_MIPS_CP0_COMPARE:
e30492bb 684 case KVM_REG_MIPS_CP0_CAUSE:
f8239342
JH		 685 case KVM_REG_MIPS_COUNT_CTL:
686 case KVM_REG_MIPS_COUNT_RESUME:
f74a8e22 687 case KVM_REG_MIPS_COUNT_HZ:
f8be02da 688 return kvm_mips_callbacks->set_one_reg(vcpu, reg, v);
4c73fb2b
DD		 689 default:
690 return -EINVAL;
691 }
692 return 0;
693}
694
d116e812
DCZ		 695long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl,
696 unsigned long arg)
669e846e
SL		 697{
698 struct kvm_vcpu *vcpu = filp->private_data;
699 void __user *argp = (void __user *)arg;
700 long r;
669e846e
SL		 701
702 switch (ioctl) {
4c73fb2b
DD		 703 case KVM_SET_ONE_REG:
704 case KVM_GET_ONE_REG: {
705 struct kvm_one_reg reg;
d116e812 706
4c73fb2b
DD		 707 if (copy_from_user(&reg, argp, sizeof(reg)))
708 return -EFAULT;
709 if (ioctl == KVM_SET_ONE_REG)
710 return kvm_mips_set_reg(vcpu, &reg);
711 else
712 return kvm_mips_get_reg(vcpu, &reg);
713 }
714 case KVM_GET_REG_LIST: {
715 struct kvm_reg_list __user *user_list = argp;
716 u64 __user *reg_dest;
717 struct kvm_reg_list reg_list;
718 unsigned n;
719
720 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
721 return -EFAULT;
722 n = reg_list.n;
723 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
724 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
725 return -EFAULT;
726 if (n < reg_list.n)
727 return -E2BIG;
728 reg_dest = user_list->reg;
729 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
730 sizeof(kvm_mips_get_one_regs)))
731 return -EFAULT;
732 return 0;
733 }
669e846e
SL		 734 case KVM_NMI:
735 /* Treat the NMI as a CPU reset */
736 r = kvm_mips_reset_vcpu(vcpu);
737 break;
738 case KVM_INTERRUPT:
739 {
740 struct kvm_mips_interrupt irq;
d116e812 741
669e846e
SL		 742 r = -EFAULT;
743 if (copy_from_user(&irq, argp, sizeof(irq)))
744 goto out;
745
669e846e
SL		 746 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
747 irq.irq);
748
749 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
750 break;
751 }
752 default:
4c73fb2b 753 r = -ENOIOCTLCMD;
669e846e
SL		 754 }
755
756out:
757 return r;
758}
759
d116e812 760/* Get (and clear) the dirty memory log for a memory slot. */
669e846e
SL		 761int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
762{
763 struct kvm_memory_slot *memslot;
764 unsigned long ga, ga_end;
765 int is_dirty = 0;
766 int r;
767 unsigned long n;
768
769 mutex_lock(&kvm->slots_lock);
770
771 r = kvm_get_dirty_log(kvm, log, &is_dirty);
772 if (r)
773 goto out;
774
775 /* If nothing is dirty, don't bother messing with page tables. */
776 if (is_dirty) {
777 memslot = &kvm->memslots->memslots[log->slot];
778
779 ga = memslot->base_gfn << PAGE_SHIFT;
780 ga_end = ga + (memslot->npages << PAGE_SHIFT);
781
6ad78a5c
DCZ		 782 kvm_info("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
783 ga_end);
669e846e
SL		 784
785 n = kvm_dirty_bitmap_bytes(memslot);
786 memset(memslot->dirty_bitmap, 0, n);
787 }
788
789 r = 0;
790out:
791 mutex_unlock(&kvm->slots_lock);
792 return r;
793
794}
795
796long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
797{
798 long r;
799
800 switch (ioctl) {
801 default:
ed829857 802 r = -ENOIOCTLCMD;
669e846e
SL		 803 }
804
805 return r;
806}
807
808int kvm_arch_init(void *opaque)
809{
669e846e
SL		 810 if (kvm_mips_callbacks) {
811 kvm_err("kvm: module already exists\n");
812 return -EEXIST;
813 }
814
d98403a5 815 return kvm_mips_emulation_init(&kvm_mips_callbacks);
669e846e
SL		 816}
817
818void kvm_arch_exit(void)
819{
820 kvm_mips_callbacks = NULL;
821}
822
d116e812
DCZ		 823int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
824 struct kvm_sregs *sregs)
669e846e 825{
ed829857 826 return -ENOIOCTLCMD;
669e846e
SL		 827}
828
d116e812
DCZ		 829int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
830 struct kvm_sregs *sregs)
669e846e 831{
ed829857 832 return -ENOIOCTLCMD;
669e846e
SL		 833}
834
31928aa5 835void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
669e846e 836{
669e846e
SL		 837}
838
839int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
840{
ed829857 841 return -ENOIOCTLCMD;
669e846e
SL		 842}
843
844int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
845{
ed829857 846 return -ENOIOCTLCMD;
669e846e
SL		 847}
848
849int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
850{
851 return VM_FAULT_SIGBUS;
852}
853
784aa3d7 854int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
669e846e
SL		 855{
856 int r;
857
858 switch (ext) {
4c73fb2b
DD		 859 case KVM_CAP_ONE_REG:
860 r = 1;
861 break;
669e846e
SL		 862 case KVM_CAP_COALESCED_MMIO:
863 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
864 break;
865 default:
866 r = 0;
867 break;
868 }
869 return r;
669e846e
SL		 870}
871
872int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
873{
874 return kvm_mips_pending_timer(vcpu);
875}
876
877int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
878{
879 int i;
880 struct mips_coproc *cop0;
881
882 if (!vcpu)
883 return -1;
884
6ad78a5c
DCZ		 885 kvm_debug("VCPU Register Dump:\n");
886 kvm_debug("\tpc = 0x%08lx\n", vcpu->arch.pc);
887 kvm_debug("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
669e846e
SL		 888
889 for (i = 0; i < 32; i += 4) {
6ad78a5c 890 kvm_debug("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
669e846e
SL		 891 vcpu->arch.gprs[i],
892 vcpu->arch.gprs[i + 1],
893 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
894 }
6ad78a5c
DCZ		 895 kvm_debug("\thi: 0x%08lx\n", vcpu->arch.hi);
896 kvm_debug("\tlo: 0x%08lx\n", vcpu->arch.lo);
669e846e
SL		 897
898 cop0 = vcpu->arch.cop0;
6ad78a5c
DCZ		 899 kvm_debug("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
900 kvm_read_c0_guest_status(cop0),
901 kvm_read_c0_guest_cause(cop0));
669e846e 902
6ad78a5c 903 kvm_debug("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
669e846e
SL		 904
905 return 0;
906}
907
908int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
909{
910 int i;
911
8d17dd04 912 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 913 vcpu->arch.gprs[i] = regs->gpr[i];
8d17dd04 914 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
669e846e
SL		 915 vcpu->arch.hi = regs->hi;
916 vcpu->arch.lo = regs->lo;
917 vcpu->arch.pc = regs->pc;
918
4c73fb2b 919 return 0;
669e846e
SL		 920}
921
922int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
923{
924 int i;
925
8d17dd04 926 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 927 regs->gpr[i] = vcpu->arch.gprs[i];
669e846e
SL		 928
929 regs->hi = vcpu->arch.hi;
930 regs->lo = vcpu->arch.lo;
931 regs->pc = vcpu->arch.pc;
932
4c73fb2b 933 return 0;
669e846e
SL		 934}
935
0fae34f4 936static void kvm_mips_comparecount_func(unsigned long data)
669e846e
SL		 937{
938 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
939
940 kvm_mips_callbacks->queue_timer_int(vcpu);
941
942 vcpu->arch.wait = 0;
d116e812 943 if (waitqueue_active(&vcpu->wq))
669e846e 944 wake_up_interruptible(&vcpu->wq);
669e846e
SL		 945}
946
d116e812 947/* low level hrtimer wake routine */
0fae34f4 948static enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
669e846e
SL		 949{
950 struct kvm_vcpu *vcpu;
951
952 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
953 kvm_mips_comparecount_func((unsigned long) vcpu);
e30492bb 954 return kvm_mips_count_timeout(vcpu);
669e846e
SL		 955}
956
957int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
958{
959 kvm_mips_callbacks->vcpu_init(vcpu);
960 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
961 HRTIMER_MODE_REL);
962 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
669e846e
SL		 963 return 0;
964}
965
d116e812
DCZ		 966int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
967 struct kvm_translation *tr)
669e846e
SL		 968{
969 return 0;
970}
971
972/* Initial guest state */
973int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
974{
975 return kvm_mips_callbacks->vcpu_setup(vcpu);
976}
977
d116e812 978static void kvm_mips_set_c0_status(void)
669e846e
SL		 979{
980 uint32_t status = read_c0_status();
981
982 if (cpu_has_fpu)
983 status |= (ST0_CU1);
984
985 if (cpu_has_dsp)
986 status |= (ST0_MX);
987
988 write_c0_status(status);
989 ehb();
990}
991
992/*
993 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
994 */
995int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
996{
997 uint32_t cause = vcpu->arch.host_cp0_cause;
998 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
999 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1000 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1001 enum emulation_result er = EMULATE_DONE;
1002 int ret = RESUME_GUEST;
1003
1004 /* Set a default exit reason */
1005 run->exit_reason = KVM_EXIT_UNKNOWN;
1006 run->ready_for_interrupt_injection = 1;
1007
d116e812
DCZ		 1008 /*
1009 * Set the appropriate status bits based on host CPU features,
1010 * before we hit the scheduler
1011 */
669e846e
SL		 1012 kvm_mips_set_c0_status();
1013
1014 local_irq_enable();
1015
1016 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1017 cause, opc, run, vcpu);
1018
d116e812
DCZ		 1019 /*
1020 * Do a privilege check, if in UM most of these exit conditions end up
669e846e
SL		 1021 * causing an exception to be delivered to the Guest Kernel
1022 */
1023 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1024 if (er == EMULATE_PRIV_FAIL) {
1025 goto skip_emul;
1026 } else if (er == EMULATE_FAIL) {
1027 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1028 ret = RESUME_HOST;
1029 goto skip_emul;
1030 }
1031
1032 switch (exccode) {
1033 case T_INT:
1034 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1035
1036 ++vcpu->stat.int_exits;
1037 trace_kvm_exit(vcpu, INT_EXITS);
1038
d116e812 1039 if (need_resched())
669e846e 1040 cond_resched();
669e846e
SL		 1041
1042 ret = RESUME_GUEST;
1043 break;
1044
1045 case T_COP_UNUSABLE:
1046 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1047
1048 ++vcpu->stat.cop_unusable_exits;
1049 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1050 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1051 /* XXXKYMA: Might need to return to user space */
d116e812 1052 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN)
669e846e 1053 ret = RESUME_HOST;
669e846e
SL		 1054 break;
1055
1056 case T_TLB_MOD:
1057 ++vcpu->stat.tlbmod_exits;
1058 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1059 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1060 break;
1061
1062 case T_TLB_ST_MISS:
d116e812
DCZ		 1063 kvm_debug("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1064 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1065 badvaddr);
669e846e
SL		 1066
1067 ++vcpu->stat.tlbmiss_st_exits;
1068 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1069 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1070 break;
1071
1072 case T_TLB_LD_MISS:
1073 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1074 cause, opc, badvaddr);
1075
1076 ++vcpu->stat.tlbmiss_ld_exits;
1077 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1078 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1079 break;
1080
1081 case T_ADDR_ERR_ST:
1082 ++vcpu->stat.addrerr_st_exits;
1083 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1084 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1085 break;
1086
1087 case T_ADDR_ERR_LD:
1088 ++vcpu->stat.addrerr_ld_exits;
1089 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1090 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1091 break;
1092
1093 case T_SYSCALL:
1094 ++vcpu->stat.syscall_exits;
1095 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1096 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1097 break;
1098
1099 case T_RES_INST:
1100 ++vcpu->stat.resvd_inst_exits;
1101 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1102 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1103 break;
1104
1105 case T_BREAK:
1106 ++vcpu->stat.break_inst_exits;
1107 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1108 ret = kvm_mips_callbacks->handle_break(vcpu);
1109 break;
1110
1111 default:
d116e812
DCZ		 1112 kvm_err("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1113 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1114 kvm_read_c0_guest_status(vcpu->arch.cop0));
669e846e
SL		 1115 kvm_arch_vcpu_dump_regs(vcpu);
1116 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1117 ret = RESUME_HOST;
1118 break;
1119
1120 }
1121
1122skip_emul:
1123 local_irq_disable();
1124
1125 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1126 kvm_mips_deliver_interrupts(vcpu, cause);
1127
1128 if (!(ret & RESUME_HOST)) {
d116e812 1129 /* Only check for signals if not already exiting to userspace */
669e846e
SL		 1130 if (signal_pending(current)) {
1131 run->exit_reason = KVM_EXIT_INTR;
1132 ret = (-EINTR << 2) | RESUME_HOST;
1133 ++vcpu->stat.signal_exits;
1134 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1135 }
1136 }
1137
1138 return ret;
1139}
1140
1141int __init kvm_mips_init(void)
1142{
1143 int ret;
1144
1145 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1146
1147 if (ret)
1148 return ret;
1149
d116e812
DCZ		 1150 /*
1151 * On MIPS, kernel modules are executed from "mapped space", which
1152 * requires TLBs. The TLB handling code is statically linked with
d7d5b05f 1153 * the rest of the kernel (tlb.c) to avoid the possibility of
d116e812
DCZ		 1154 * double faulting. The issue is that the TLB code references
1155 * routines that are part of the the KVM module, which are only
1156 * available once the module is loaded.
669e846e
SL		 1157 */
1158 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1159 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1160 kvm_mips_is_error_pfn = is_error_pfn;
1161
1162 pr_info("KVM/MIPS Initialized\n");
1163 return 0;
1164}
1165
1166void __exit kvm_mips_exit(void)
1167{
1168 kvm_exit();
1169
1170 kvm_mips_gfn_to_pfn = NULL;
1171 kvm_mips_release_pfn_clean = NULL;
1172 kvm_mips_is_error_pfn = NULL;
1173
1174 pr_info("KVM/MIPS unloaded\n");
1175}
1176
1177module_init(kvm_mips_init);
1178module_exit(kvm_mips_exit);
1179
1180EXPORT_TRACEPOINT_SYMBOL(kvm_exit);
Linux kernel - Deliverables
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