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935c500c JC |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify it | |
3 | * under the terms of the GNU General Public License version 2 as published | |
4 | * by the Free Software Foundation. | |
5 | * | |
6 | * Copyright (C) 2007 John Crispin <blogic@openwrt.org> | |
7 | * | |
8 | */ | |
9 | ||
10 | #include <linux/slab.h> | |
11 | #include <linux/init.h> | |
4af92e7a | 12 | #include <linux/export.h> |
935c500c JC |
13 | #include <linux/types.h> |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/mutex.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/gpio.h> | |
18 | ||
19 | #include <lantiq_soc.h> | |
20 | ||
21 | #define LTQ_STP_CON0 0x00 | |
22 | #define LTQ_STP_CON1 0x04 | |
23 | #define LTQ_STP_CPU0 0x08 | |
24 | #define LTQ_STP_CPU1 0x0C | |
25 | #define LTQ_STP_AR 0x10 | |
26 | ||
27 | #define LTQ_STP_CON_SWU (1 << 31) | |
28 | #define LTQ_STP_2HZ 0 | |
29 | #define LTQ_STP_4HZ (1 << 23) | |
30 | #define LTQ_STP_8HZ (2 << 23) | |
31 | #define LTQ_STP_10HZ (3 << 23) | |
32 | #define LTQ_STP_SPEED_MASK (0xf << 23) | |
33 | #define LTQ_STP_UPD_FPI (1 << 31) | |
34 | #define LTQ_STP_UPD_MASK (3 << 30) | |
35 | #define LTQ_STP_ADSL_SRC (3 << 24) | |
36 | ||
37 | #define LTQ_STP_GROUP0 (1 << 0) | |
38 | ||
39 | #define LTQ_STP_RISING 0 | |
40 | #define LTQ_STP_FALLING (1 << 26) | |
41 | #define LTQ_STP_EDGE_MASK (1 << 26) | |
42 | ||
43 | #define ltq_stp_r32(reg) __raw_readl(ltq_stp_membase + reg) | |
44 | #define ltq_stp_w32(val, reg) __raw_writel(val, ltq_stp_membase + reg) | |
45 | #define ltq_stp_w32_mask(clear, set, reg) \ | |
46 | ltq_w32((ltq_r32(ltq_stp_membase + reg) & ~(clear)) | (set), \ | |
47 | ltq_stp_membase + (reg)) | |
48 | ||
49 | static int ltq_stp_shadow = 0xffff; | |
50 | static void __iomem *ltq_stp_membase; | |
51 | ||
52 | static void ltq_stp_set(struct gpio_chip *chip, unsigned offset, int value) | |
53 | { | |
54 | if (value) | |
55 | ltq_stp_shadow |= (1 << offset); | |
56 | else | |
57 | ltq_stp_shadow &= ~(1 << offset); | |
58 | ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0); | |
59 | } | |
60 | ||
61 | static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset, | |
62 | int value) | |
63 | { | |
64 | ltq_stp_set(chip, offset, value); | |
65 | ||
66 | return 0; | |
67 | } | |
68 | ||
69 | static struct gpio_chip ltq_stp_chip = { | |
70 | .label = "ltq_stp", | |
71 | .direction_output = ltq_stp_direction_output, | |
72 | .set = ltq_stp_set, | |
73 | .base = 48, | |
74 | .ngpio = 24, | |
75 | .can_sleep = 1, | |
76 | .owner = THIS_MODULE, | |
77 | }; | |
78 | ||
79 | static int ltq_stp_hw_init(void) | |
80 | { | |
935c500c JC |
81 | /* sane defaults */ |
82 | ltq_stp_w32(0, LTQ_STP_AR); | |
83 | ltq_stp_w32(0, LTQ_STP_CPU0); | |
84 | ltq_stp_w32(0, LTQ_STP_CPU1); | |
85 | ltq_stp_w32(LTQ_STP_CON_SWU, LTQ_STP_CON0); | |
86 | ltq_stp_w32(0, LTQ_STP_CON1); | |
87 | ||
88 | /* rising or falling edge */ | |
89 | ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0); | |
90 | ||
91 | /* per default stp 15-0 are set */ | |
92 | ltq_stp_w32_mask(0, LTQ_STP_GROUP0, LTQ_STP_CON1); | |
93 | ||
94 | /* stp are update periodically by the FPI bus */ | |
95 | ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1); | |
96 | ||
97 | /* set stp update speed */ | |
98 | ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1); | |
99 | ||
100 | /* tell the hardware that pin (led) 0 and 1 are controlled | |
101 | * by the dsl arc | |
102 | */ | |
103 | ltq_stp_w32_mask(0, LTQ_STP_ADSL_SRC, LTQ_STP_CON0); | |
104 | ||
105 | ltq_pmu_enable(PMU_LED); | |
106 | return 0; | |
107 | } | |
108 | ||
109 | static int __devinit ltq_stp_probe(struct platform_device *pdev) | |
110 | { | |
111 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
112 | int ret = 0; | |
113 | ||
114 | if (!res) | |
115 | return -ENOENT; | |
116 | res = devm_request_mem_region(&pdev->dev, res->start, | |
117 | resource_size(res), dev_name(&pdev->dev)); | |
118 | if (!res) { | |
119 | dev_err(&pdev->dev, "failed to request STP memory\n"); | |
120 | return -EBUSY; | |
121 | } | |
122 | ltq_stp_membase = devm_ioremap_nocache(&pdev->dev, res->start, | |
123 | resource_size(res)); | |
124 | if (!ltq_stp_membase) { | |
125 | dev_err(&pdev->dev, "failed to remap STP memory\n"); | |
126 | return -ENOMEM; | |
127 | } | |
128 | ret = gpiochip_add(<q_stp_chip); | |
129 | if (!ret) | |
130 | ret = ltq_stp_hw_init(); | |
131 | ||
132 | return ret; | |
133 | } | |
134 | ||
135 | static struct platform_driver ltq_stp_driver = { | |
136 | .probe = ltq_stp_probe, | |
137 | .driver = { | |
138 | .name = "ltq_stp", | |
139 | .owner = THIS_MODULE, | |
140 | }, | |
141 | }; | |
142 | ||
143 | int __init ltq_stp_init(void) | |
144 | { | |
145 | int ret = platform_driver_register(<q_stp_driver); | |
146 | ||
147 | if (ret) | |
148 | pr_info("ltq_stp: error registering platfom driver"); | |
149 | return ret; | |
150 | } | |
151 | ||
152 | postcore_initcall(ltq_stp_init); |