MIPS: math-emu: Rename get_rounding() functions.
[deliverable/linux.git] / arch / mips / math-emu / ieee754sp.c
CommitLineData
1da177e4
LT
1/* IEEE754 floating point arithmetic
2 * single precision
3 */
4/*
5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd.
1da177e4
LT
7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
22 *
23 * ########################################################################
24 */
25
cae55066 26#include <linux/compiler.h>
1da177e4
LT
27
28#include "ieee754sp.h"
29
2209bcb1 30int ieee754sp_class(union ieee754sp x)
1da177e4
LT
31{
32 COMPXSP;
33 EXPLODEXSP;
34 return xc;
35}
36
2209bcb1 37int ieee754sp_isnan(union ieee754sp x)
1da177e4
LT
38{
39 return ieee754sp_class(x) >= IEEE754_CLASS_SNAN;
40}
41
f71baa11 42static inline int ieee754sp_issnan(union ieee754sp x)
1da177e4
LT
43{
44 assert(ieee754sp_isnan(x));
ad8fb553 45 return (SPMANT(x) & SP_MBIT(SP_FBITS-1));
1da177e4
LT
46}
47
48
90efba36 49union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r)
1da177e4 50{
1da177e4
LT
51 assert(ieee754sp_isnan(r));
52
53 if (!ieee754sp_issnan(r)) /* QNAN does not cause invalid op !! */
54 return r;
55
9e8bad1f 56 if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) {
1da177e4 57 /* not enabled convert to a quiet NaN */
ad8fb553 58 SPMANT(r) &= (~SP_MBIT(SP_FBITS-1));
1da177e4
LT
59 if (ieee754sp_isnan(r))
60 return r;
61 else
62 return ieee754sp_indef();
63 }
64
90efba36 65 return r;
1da177e4
LT
66}
67
de2fc342 68static unsigned ieee754sp_get_rounding(int sn, unsigned xm)
1da177e4
LT
69{
70 /* inexact must round of 3 bits
71 */
72 if (xm & (SP_MBIT(3) - 1)) {
73 switch (ieee754_csr.rm) {
74 case IEEE754_RZ:
75 break;
76 case IEEE754_RN:
77 xm += 0x3 + ((xm >> 3) & 1);
78 /* xm += (xm&0x8)?0x4:0x3 */
79 break;
80 case IEEE754_RU: /* toward +Infinity */
81 if (!sn) /* ?? */
82 xm += 0x8;
83 break;
84 case IEEE754_RD: /* toward -Infinity */
70342287 85 if (sn) /* ?? */
1da177e4
LT
86 xm += 0x8;
87 break;
88 }
89 }
90 return xm;
91}
92
93
94/* generate a normal/denormal number with over,under handling
95 * sn is sign
96 * xe is an unbiased exponent
97 * xm is 3bit extended precision value.
98 */
2209bcb1 99union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
1da177e4
LT
100{
101 assert(xm); /* we don't gen exact zeros (probably should) */
102
ad8fb553 103 assert((xm >> (SP_FBITS + 1 + 3)) == 0); /* no execess */
1da177e4
LT
104 assert(xm & (SP_HIDDEN_BIT << 3));
105
106 if (xe < SP_EMIN) {
107 /* strip lower bits */
108 int es = SP_EMIN - xe;
109
110 if (ieee754_csr.nod) {
9e8bad1f
RB
111 ieee754_setcx(IEEE754_UNDERFLOW);
112 ieee754_setcx(IEEE754_INEXACT);
1da177e4
LT
113
114 switch(ieee754_csr.rm) {
115 case IEEE754_RN:
1da177e4
LT
116 case IEEE754_RZ:
117 return ieee754sp_zero(sn);
118 case IEEE754_RU: /* toward +Infinity */
47fa0c02 119 if (sn == 0)
1da177e4
LT
120 return ieee754sp_min(0);
121 else
122 return ieee754sp_zero(1);
123 case IEEE754_RD: /* toward -Infinity */
47fa0c02 124 if (sn == 0)
1da177e4
LT
125 return ieee754sp_zero(0);
126 else
127 return ieee754sp_min(1);
128 }
129 }
130
de2fc342
RB
131 if (xe == SP_EMIN - 1 &&
132 ieee754sp_get_rounding(sn, xm) >> (SP_FBITS + 1 + 3))
1da177e4
LT
133 {
134 /* Not tiny after rounding */
9e8bad1f 135 ieee754_setcx(IEEE754_INEXACT);
de2fc342 136 xm = ieee754sp_get_rounding(sn, xm);
1da177e4
LT
137 xm >>= 1;
138 /* Clear grs bits */
139 xm &= ~(SP_MBIT(3) - 1);
140 xe++;
47fa0c02 141 } else {
1da177e4
LT
142 /* sticky right shift es bits
143 */
144 SPXSRSXn(es);
145 assert((xm & (SP_HIDDEN_BIT << 3)) == 0);
146 assert(xe == SP_EMIN);
147 }
148 }
149 if (xm & (SP_MBIT(3) - 1)) {
9e8bad1f 150 ieee754_setcx(IEEE754_INEXACT);
1da177e4 151 if ((xm & (SP_HIDDEN_BIT << 3)) == 0) {
9e8bad1f 152 ieee754_setcx(IEEE754_UNDERFLOW);
1da177e4
LT
153 }
154
155 /* inexact must round of 3 bits
156 */
de2fc342 157 xm = ieee754sp_get_rounding(sn, xm);
1da177e4
LT
158 /* adjust exponent for rounding add overflowing
159 */
ad8fb553 160 if (xm >> (SP_FBITS + 1 + 3)) {
1da177e4
LT
161 /* add causes mantissa overflow */
162 xm >>= 1;
163 xe++;
164 }
165 }
166 /* strip grs bits */
167 xm >>= 3;
168
ad8fb553 169 assert((xm >> (SP_FBITS + 1)) == 0); /* no execess */
1da177e4
LT
170 assert(xe >= SP_EMIN);
171
172 if (xe > SP_EMAX) {
9e8bad1f
RB
173 ieee754_setcx(IEEE754_OVERFLOW);
174 ieee754_setcx(IEEE754_INEXACT);
1da177e4
LT
175 /* -O can be table indexed by (rm,sn) */
176 switch (ieee754_csr.rm) {
177 case IEEE754_RN:
178 return ieee754sp_inf(sn);
179 case IEEE754_RZ:
180 return ieee754sp_max(sn);
181 case IEEE754_RU: /* toward +Infinity */
182 if (sn == 0)
183 return ieee754sp_inf(0);
184 else
185 return ieee754sp_max(1);
186 case IEEE754_RD: /* toward -Infinity */
187 if (sn == 0)
188 return ieee754sp_max(0);
189 else
190 return ieee754sp_inf(1);
191 }
192 }
193 /* gen norm/denorm/zero */
194
195 if ((xm & SP_HIDDEN_BIT) == 0) {
196 /* we underflow (tiny/zero) */
197 assert(xe == SP_EMIN);
198 if (ieee754_csr.mx & IEEE754_UNDERFLOW)
9e8bad1f 199 ieee754_setcx(IEEE754_UNDERFLOW);
1da177e4
LT
200 return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm);
201 } else {
ad8fb553 202 assert((xm >> (SP_FBITS + 1)) == 0); /* no execess */
1da177e4
LT
203 assert(xm & SP_HIDDEN_BIT);
204
205 return buildsp(sn, xe + SP_EBIAS, xm & ~SP_HIDDEN_BIT);
206 }
207}
This page took 0.630732 seconds and 5 git commands to generate.