Merge tag 'mmc-v3.17-1' of git://git.linaro.org/people/ulf.hansson/mmc
[deliverable/linux.git] / arch / mips / math-emu / sp_fdp.c
CommitLineData
1da177e4
LT
1/* IEEE754 floating point arithmetic
2 * single precision
3 */
4/*
5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd.
1da177e4 7 *
1da177e4
LT
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
3f7cac41 19 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1da177e4
LT
20 */
21
1da177e4 22#include "ieee754sp.h"
b3a7ad2b 23#include "ieee754dp.h"
1da177e4 24
2209bcb1 25union ieee754sp ieee754sp_fdp(union ieee754dp x)
1da177e4 26{
3f7cac41
RB
27 u32 rm;
28
1da177e4 29 COMPXDP;
2209bcb1 30 union ieee754sp nan;
1da177e4
LT
31
32 EXPLODEXDP;
33
9e8bad1f 34 ieee754_clearcx();
1da177e4
LT
35
36 FLUSHXDP;
37
38 switch (xc) {
39 case IEEE754_CLASS_SNAN:
9e8bad1f 40 ieee754_setcx(IEEE754_INVALID_OPERATION);
90efba36 41 return ieee754sp_nanxcpt(ieee754sp_indef());
3f7cac41 42
1da177e4
LT
43 case IEEE754_CLASS_QNAN:
44 nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32)
ad8fb553 45 (xm >> (DP_FBITS - SP_FBITS)));
1da177e4
LT
46 if (!ieee754sp_isnan(nan))
47 nan = ieee754sp_indef();
90efba36 48 return ieee754sp_nanxcpt(nan);
3f7cac41 49
1da177e4
LT
50 case IEEE754_CLASS_INF:
51 return ieee754sp_inf(xs);
3f7cac41 52
1da177e4
LT
53 case IEEE754_CLASS_ZERO:
54 return ieee754sp_zero(xs);
3f7cac41 55
1da177e4
LT
56 case IEEE754_CLASS_DNORM:
57 /* can't possibly be sp representable */
9e8bad1f
RB
58 ieee754_setcx(IEEE754_UNDERFLOW);
59 ieee754_setcx(IEEE754_INEXACT);
56a64733
RB
60 if ((ieee754_csr.rm == FPU_CSR_RU && !xs) ||
61 (ieee754_csr.rm == FPU_CSR_RD && xs))
90efba36
RB
62 return ieee754sp_mind(xs);
63 return ieee754sp_zero(xs);
3f7cac41 64
1da177e4
LT
65 case IEEE754_CLASS_NORM:
66 break;
67 }
68
3f7cac41
RB
69 /*
70 * Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
71 */
72 rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
73 ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
1da177e4 74
3f7cac41 75 return ieee754sp_format(xs, xe, rm);
1da177e4 76}
This page took 0.68506 seconds and 5 git commands to generate.