[deliverable/linux.git] / arch / mips / math-emu / sp_fdp.c

/* IEEE754 floating point arithmetic
 * single precision
 */
/*
 * MIPS floating point support
 * Copyright (C) 1994-2000 Algorithmics Ltd.
 *
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA.
 */

#include "ieee754sp.h"
#include "ieee754dp.h"

static inline union ieee754sp ieee754sp_nan_fdp(int xs, u64 xm)
{
	return buildsp(xs, SP_EMAX + 1 + SP_EBIAS,
		       xm >> (DP_FBITS - SP_FBITS));
}

union ieee754sp ieee754sp_fdp(union ieee754dp x)
{
	u32 rm;

	COMPXDP;
	union ieee754sp nan;

	EXPLODEXDP;

	ieee754_clearcx();

	FLUSHXDP;

	switch (xc) {
	case IEEE754_CLASS_SNAN:
		return ieee754sp_nanxcpt(ieee754sp_nan_fdp(xs, xm));

	case IEEE754_CLASS_QNAN:
		nan = ieee754sp_nan_fdp(xs, xm);
		if (!ieee754sp_isnan(nan))
			nan = ieee754sp_indef();
		return nan;

	case IEEE754_CLASS_INF:
		return ieee754sp_inf(xs);

	case IEEE754_CLASS_ZERO:
		return ieee754sp_zero(xs);

	case IEEE754_CLASS_DNORM:
		/* can't possibly be sp representable */
		ieee754_setcx(IEEE754_UNDERFLOW);
		ieee754_setcx(IEEE754_INEXACT);
		if ((ieee754_csr.rm == FPU_CSR_RU && !xs) ||
				(ieee754_csr.rm == FPU_CSR_RD && xs))
			return ieee754sp_mind(xs);
		return ieee754sp_zero(xs);

	case IEEE754_CLASS_NORM:
		break;
	}

	/*
	 * Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
	 */
	rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
	     ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);

	return ieee754sp_format(xs, xe, rm);
}
Commit	Line	Data
1da177e4 LT	1	/* IEEE754 floating point arithmetic
	2	* single precision
	3	*/
	4	/*
	5	* MIPS floating point support
	6	* Copyright (C) 1994-2000 Algorithmics Ltd.
1da177e4	7	*
1da177e4 LT	8	* This program is free software; you can distribute it and/or modify it
	9	* under the terms of the GNU General Public License (Version 2) as
	10	* published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope it will be useful, but WITHOUT
	13	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	14	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	15	* for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License along
	18	* with this program; if not, write to the Free Software Foundation, Inc.,
3f7cac41	19	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1da177e4 LT	20	*/
1da177e4 LT	21
1da177e4	22	#include "ieee754sp.h"
b3a7ad2b	23	#include "ieee754dp.h"
1da177e4	24
d19cf86e MR	25	static inline union ieee754sp ieee754sp_nan_fdp(int xs, u64 xm)
	26	{
	27	return buildsp(xs, SP_EMAX + 1 + SP_EBIAS,
	28	xm >> (DP_FBITS - SP_FBITS));
	29	}
	30
2209bcb1	31	union ieee754sp ieee754sp_fdp(union ieee754dp x)
1da177e4	32	{
3f7cac41 RB	33	u32 rm;
3f7cac41 RB	34
1da177e4	35	COMPXDP;
2209bcb1	36	union ieee754sp nan;
1da177e4 LT	37
	38	EXPLODEXDP;
	39
9e8bad1f	40	ieee754_clearcx();
1da177e4 LT	41
	42	FLUSHXDP;
	43
	44	switch (xc) {
	45	case IEEE754_CLASS_SNAN:
d5afa7e9	46	return ieee754sp_nanxcpt(ieee754sp_nan_fdp(xs, xm));
3f7cac41	47
1da177e4	48	case IEEE754_CLASS_QNAN:
d19cf86e	49	nan = ieee754sp_nan_fdp(xs, xm);
1da177e4 LT	50	if (!ieee754sp_isnan(nan))
1da177e4 LT	51	nan = ieee754sp_indef();
539bfb57	52	return nan;
3f7cac41	53
1da177e4 LT	54	case IEEE754_CLASS_INF:
1da177e4 LT	55	return ieee754sp_inf(xs);
3f7cac41	56
1da177e4 LT	57	case IEEE754_CLASS_ZERO:
1da177e4 LT	58	return ieee754sp_zero(xs);
3f7cac41	59
1da177e4 LT	60	case IEEE754_CLASS_DNORM:
1da177e4 LT	61	/* can't possibly be sp representable */
9e8bad1f RB	62	ieee754_setcx(IEEE754_UNDERFLOW);
9e8bad1f RB	63	ieee754_setcx(IEEE754_INEXACT);
56a64733 RB	64	if ((ieee754_csr.rm == FPU_CSR_RU && !xs) \|\|
56a64733 RB	65	(ieee754_csr.rm == FPU_CSR_RD && xs))
90efba36 RB	66	return ieee754sp_mind(xs);
90efba36 RB	67	return ieee754sp_zero(xs);
3f7cac41	68
1da177e4 LT	69	case IEEE754_CLASS_NORM:
	70	break;
	71	}
	72
3f7cac41 RB	73	/*
	74	* Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
	75	*/
	76	rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) \|
	77	((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
1da177e4	78
3f7cac41	79	return ieee754sp_format(xs, xe, rm);
1da177e4	80	}