[deliverable/linux.git] / arch / mips / mm / cache.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
 * Copyright (C) 2007 MIPS Technologies, Inc.
 */
#include <linux/fs.h>
#include <linux/fcntl.h>
#include <linux/kernel.h>
#include <linux/linkage.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/syscalls.h>
#include <linux/mm.h>

#include <asm/cacheflush.h>
#include <asm/highmem.h>
#include <asm/processor.h>
#include <asm/cpu.h>
#include <asm/cpu-features.h>

/* Cache operations. */
void (*flush_cache_all)(void);
void (*__flush_cache_all)(void);
void (*flush_cache_mm)(struct mm_struct *mm);
void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
	unsigned long end);
void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
	unsigned long pfn);
void (*flush_icache_range)(unsigned long start, unsigned long end);
EXPORT_SYMBOL_GPL(flush_icache_range);
void (*local_flush_icache_range)(unsigned long start, unsigned long end);
EXPORT_SYMBOL_GPL(local_flush_icache_range);

void (*__flush_cache_vmap)(void);
void (*__flush_cache_vunmap)(void);

void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);

/* MIPS specific cache operations */
void (*flush_cache_sigtramp)(unsigned long addr);
void (*local_flush_data_cache_page)(void * addr);
void (*flush_data_cache_page)(unsigned long addr);
void (*flush_icache_all)(void);

EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
EXPORT_SYMBOL(flush_data_cache_page);
EXPORT_SYMBOL(flush_icache_all);

#if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_DMA_MAYBE_COHERENT)

/* DMA cache operations. */
void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
void (*_dma_cache_wback)(unsigned long start, unsigned long size);
void (*_dma_cache_inv)(unsigned long start, unsigned long size);

EXPORT_SYMBOL(_dma_cache_wback_inv);

#endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */

/*
 * We could optimize the case where the cache argument is not BCACHE but
 * that seems very atypical use ...
 */
SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
	unsigned int, cache)
{
	if (bytes == 0)
		return 0;
	if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
		return -EFAULT;

	flush_icache_range(addr, addr + bytes);

	return 0;
}

void __flush_dcache_page(struct page *page)
{
	struct address_space *mapping = page_mapping(page);
	unsigned long addr;

	if (mapping && !mapping_mapped(mapping)) {
		SetPageDcacheDirty(page);
		return;
	}

	/*
	 * We could delay the flush for the !page_mapping case too.  But that
	 * case is for exec env/arg pages and those are %99 certainly going to
	 * get faulted into the tlb (and thus flushed) anyways.
	 */
	if (PageHighMem(page))
		addr = (unsigned long)kmap_atomic(page);
	else
		addr = (unsigned long)page_address(page);

	flush_data_cache_page(addr);

	if (PageHighMem(page))
		__kunmap_atomic((void *)addr);
}

EXPORT_SYMBOL(__flush_dcache_page);

void __flush_anon_page(struct page *page, unsigned long vmaddr)
{
	unsigned long addr = (unsigned long) page_address(page);

	if (pages_do_alias(addr, vmaddr)) {
		if (page_mapcount(page) && !Page_dcache_dirty(page)) {
			void *kaddr;

			kaddr = kmap_coherent(page, vmaddr);
			flush_data_cache_page((unsigned long)kaddr);
			kunmap_coherent();
		} else
			flush_data_cache_page(addr);
	}
}

EXPORT_SYMBOL(__flush_anon_page);

void __update_cache(unsigned long address, pte_t pte)
{
	struct page *page;
	unsigned long pfn, addr;
	int exec = !pte_no_exec(pte) && !cpu_has_ic_fills_f_dc;

	pfn = pte_pfn(pte);
	if (unlikely(!pfn_valid(pfn)))
		return;
	page = pfn_to_page(pfn);
	if (Page_dcache_dirty(page)) {
		if (PageHighMem(page))
			addr = (unsigned long)kmap_atomic(page);
		else
			addr = (unsigned long)page_address(page);

		if (exec || pages_do_alias(addr, address & PAGE_MASK))
			flush_data_cache_page(addr);

		if (PageHighMem(page))
			__kunmap_atomic((void *)addr);

		ClearPageDcacheDirty(page);
	}
}

unsigned long _page_cachable_default;
EXPORT_SYMBOL(_page_cachable_default);

static inline void setup_protection_map(void)
{
	if (cpu_has_rixi) {
		protection_map[0]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
		protection_map[1]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
		protection_map[2]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
		protection_map[3]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
		protection_map[4]  = __pgprot(_page_cachable_default | _PAGE_PRESENT);
		protection_map[5]  = __pgprot(_page_cachable_default | _PAGE_PRESENT);
		protection_map[6]  = __pgprot(_page_cachable_default | _PAGE_PRESENT);
		protection_map[7]  = __pgprot(_page_cachable_default | _PAGE_PRESENT);

		protection_map[8]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
		protection_map[9]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
		protection_map[10] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE | _PAGE_NO_READ);
		protection_map[11] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE);
		protection_map[12] = __pgprot(_page_cachable_default | _PAGE_PRESENT);
		protection_map[13] = __pgprot(_page_cachable_default | _PAGE_PRESENT);
		protection_map[14] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE);
		protection_map[15] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE);

	} else {
		protection_map[0] = PAGE_NONE;
		protection_map[1] = PAGE_READONLY;
		protection_map[2] = PAGE_COPY;
		protection_map[3] = PAGE_COPY;
		protection_map[4] = PAGE_READONLY;
		protection_map[5] = PAGE_READONLY;
		protection_map[6] = PAGE_COPY;
		protection_map[7] = PAGE_COPY;
		protection_map[8] = PAGE_NONE;
		protection_map[9] = PAGE_READONLY;
		protection_map[10] = PAGE_SHARED;
		protection_map[11] = PAGE_SHARED;
		protection_map[12] = PAGE_READONLY;
		protection_map[13] = PAGE_READONLY;
		protection_map[14] = PAGE_SHARED;
		protection_map[15] = PAGE_SHARED;
	}
}

void cpu_cache_init(void)
{
	if (cpu_has_3k_cache) {
		extern void __weak r3k_cache_init(void);

		r3k_cache_init();
	}
	if (cpu_has_6k_cache) {
		extern void __weak r6k_cache_init(void);

		r6k_cache_init();
	}
	if (cpu_has_4k_cache) {
		extern void __weak r4k_cache_init(void);

		r4k_cache_init();
	}
	if (cpu_has_8k_cache) {
		extern void __weak r8k_cache_init(void);

		r8k_cache_init();
	}
	if (cpu_has_tx39_cache) {
		extern void __weak tx39_cache_init(void);

		tx39_cache_init();
	}

	if (cpu_has_octeon_cache) {
		extern void __weak octeon_cache_init(void);

		octeon_cache_init();
	}

	setup_protection_map();
}

int __weak __uncached_access(struct file *file, unsigned long addr)
{
	if (file->f_flags & O_DSYNC)
		return 1;

	return addr >= __pa(high_memory);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
641e97f3	6	* Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
7575a49f	7	* Copyright (C) 2007 MIPS Technologies, Inc.
1da177e4	8	*/
24e9d0b9 RB	9	#include <linux/fs.h>
24e9d0b9 RB	10	#include <linux/fcntl.h>
1da177e4	11	#include <linux/kernel.h>
641e97f3	12	#include <linux/linkage.h>
1da177e4 LT	13	#include <linux/module.h>
1da177e4 LT	14	#include <linux/sched.h>
dbda6ac0	15	#include <linux/syscalls.h>
1da177e4 LT	16	#include <linux/mm.h>
	17
	18	#include <asm/cacheflush.h>
234859e4	19	#include <asm/highmem.h>
1da177e4 LT	20	#include <asm/processor.h>
	21	#include <asm/cpu.h>
	22	#include <asm/cpu-features.h>
	23
	24	/* Cache operations. */
	25	void (*flush_cache_all)(void);
	26	void (*__flush_cache_all)(void);
	27	void (flush_cache_mm)(struct mm_struct mm);
	28	void (flush_cache_range)(struct vm_area_struct vma, unsigned long start,
	29	unsigned long end);
53de0d47 RB	30	void (flush_cache_page)(struct vm_area_struct vma, unsigned long page,
53de0d47 RB	31	unsigned long pfn);
d4264f18	32	void (*flush_icache_range)(unsigned long start, unsigned long end);
8229f1a0	33	EXPORT_SYMBOL_GPL(flush_icache_range);
e0cee3ee	34	void (*local_flush_icache_range)(unsigned long start, unsigned long end);
90f91356	35	EXPORT_SYMBOL_GPL(local_flush_icache_range);
1da177e4	36
9c5a3d72 RB	37	void (*__flush_cache_vmap)(void);
	38	void (*__flush_cache_vunmap)(void);
	39
d9cdc901	40	void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
d9cdc901	41	EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
8229f1a0	42	void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);
d9cdc901	43
1da177e4 LT	44	/* MIPS specific cache operations */
1da177e4 LT	45	void (*flush_cache_sigtramp)(unsigned long addr);
7e3bfc7c	46	void (local_flush_data_cache_page)(void addr);
1da177e4 LT	47	void (*flush_data_cache_page)(unsigned long addr);
	48	void (*flush_icache_all)(void);
	49
9202f325	50	EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
9ff77c46	51	EXPORT_SYMBOL(flush_data_cache_page);
f2e3656d	52	EXPORT_SYMBOL(flush_icache_all);
9ff77c46	53
8005711c	54	#if defined(CONFIG_DMA_NONCOHERENT) \|\| defined(CONFIG_DMA_MAYBE_COHERENT)
1da177e4 LT	55
	56	/* DMA cache operations. */
	57	void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
	58	void (*_dma_cache_wback)(unsigned long start, unsigned long size);
	59	void (*_dma_cache_inv)(unsigned long start, unsigned long size);
	60
	61	EXPORT_SYMBOL(_dma_cache_wback_inv);
1da177e4	62
8005711c	63	#endif /* CONFIG_DMA_NONCOHERENT \|\| CONFIG_DMA_MAYBE_COHERENT */
1da177e4 LT	64
	65	/*
	66	* We could optimize the case where the cache argument is not BCACHE but
	67	* that seems very atypical use ...
	68	*/
dbda6ac0 RB	69	SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
dbda6ac0 RB	70	unsigned int, cache)
1da177e4	71	{
750ccf68 AN	72	if (bytes == 0)
750ccf68 AN	73	return 0;
fe00f943	74	if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
1da177e4 LT	75	return -EFAULT;
	76
	77	flush_icache_range(addr, addr + bytes);
	78
	79	return 0;
	80	}
	81
	82	void __flush_dcache_page(struct page *page)
	83	{
	84	struct address_space *mapping = page_mapping(page);
	85	unsigned long addr;
	86
	87	if (mapping && !mapping_mapped(mapping)) {
	88	SetPageDcacheDirty(page);
	89	return;
	90	}
	91
	92	/*
	93	* We could delay the flush for the !page_mapping case too. But that
	94	* case is for exec env/arg pages and those are %99 certainly going to
	95	* get faulted into the tlb (and thus flushed) anyways.
	96	*/
234859e4 PB	97	if (PageHighMem(page))
	98	addr = (unsigned long)kmap_atomic(page);
	99	else
	100	addr = (unsigned long)page_address(page);
	101
1da177e4	102	flush_data_cache_page(addr);
234859e4 PB	103
	104	if (PageHighMem(page))
	105	__kunmap_atomic((void *)addr);
1da177e4 LT	106	}
	107
	108	EXPORT_SYMBOL(__flush_dcache_page);
	109
7575a49f RB	110	void __flush_anon_page(struct page *page, unsigned long vmaddr)
7575a49f RB	111	{
9a74b3eb	112	unsigned long addr = (unsigned long) page_address(page);
7575a49f	113
9a74b3eb	114	if (pages_do_alias(addr, vmaddr)) {
e1534ae9	115	if (page_mapcount(page) && !Page_dcache_dirty(page)) {
9a74b3eb RB	116	void *kaddr;
	117
	118	kaddr = kmap_coherent(page, vmaddr);
	119	flush_data_cache_page((unsigned long)kaddr);
	120	kunmap_coherent();
	121	} else
	122	flush_data_cache_page(addr);
7575a49f RB	123	}
	124	}
	125
	126	EXPORT_SYMBOL(__flush_anon_page);
	127
37d22a0d	128	void __update_cache(unsigned long address, pte_t pte)
1da177e4 LT	129	{
1da177e4 LT	130	struct page *page;
5b9593f3	131	unsigned long pfn, addr;
37d22a0d	132	int exec = !pte_no_exec(pte) && !cpu_has_ic_fills_f_dc;
1da177e4	133
5b9593f3	134	pfn = pte_pfn(pte);
585fa724 RB	135	if (unlikely(!pfn_valid(pfn)))
	136	return;
	137	page = pfn_to_page(pfn);
37d22a0d	138	if (Page_dcache_dirty(page)) {
f4281bba PB	139	if (PageHighMem(page))
	140	addr = (unsigned long)kmap_atomic(page);
	141	else
	142	addr = (unsigned long)page_address(page);
	143
5b9593f3 LP	144	if (exec \|\| pages_do_alias(addr, address & PAGE_MASK))
5b9593f3 LP	145	flush_data_cache_page(addr);
f4281bba PB	146
	147	if (PageHighMem(page))
	148	__kunmap_atomic((void *)addr);
	149
1da177e4 LT	150	ClearPageDcacheDirty(page);
	151	}
	152	}
	153
35133692	154	unsigned long _page_cachable_default;
7b3e543d	155	EXPORT_SYMBOL(_page_cachable_default);
35133692 CD	156
	157	static inline void setup_protection_map(void)
	158	{
05857c64	159	if (cpu_has_rixi) {
6dd9344c DD	160	protection_map[0] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
	161	protection_map[1] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
	162	protection_map[2] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
	163	protection_map[3] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
55fdcb2d	164	protection_map[4] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
6dd9344c	165	protection_map[5] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
55fdcb2d	166	protection_map[6] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
6dd9344c DD	167	protection_map[7] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
	168
	169	protection_map[8] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
	170	protection_map[9] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
	171	protection_map[10] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE \| _PAGE_NO_READ);
	172	protection_map[11] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE);
55fdcb2d	173	protection_map[12] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
6dd9344c	174	protection_map[13] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
55fdcb2d	175	protection_map[14] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);
6dd9344c DD	176	protection_map[15] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);
	177
	178	} else {
	179	protection_map[0] = PAGE_NONE;
	180	protection_map[1] = PAGE_READONLY;
	181	protection_map[2] = PAGE_COPY;
	182	protection_map[3] = PAGE_COPY;
	183	protection_map[4] = PAGE_READONLY;
	184	protection_map[5] = PAGE_READONLY;
	185	protection_map[6] = PAGE_COPY;
	186	protection_map[7] = PAGE_COPY;
	187	protection_map[8] = PAGE_NONE;
	188	protection_map[9] = PAGE_READONLY;
	189	protection_map[10] = PAGE_SHARED;
	190	protection_map[11] = PAGE_SHARED;
	191	protection_map[12] = PAGE_READONLY;
	192	protection_map[13] = PAGE_READONLY;
	193	protection_map[14] = PAGE_SHARED;
	194	protection_map[15] = PAGE_SHARED;
	195	}
35133692	196	}
1da177e4	197
078a55fc	198	void cpu_cache_init(void)
1da177e4	199	{
02cf2119 RB	200	if (cpu_has_3k_cache) {
	201	extern void __weak r3k_cache_init(void);
	202
	203	r3k_cache_init();
02cf2119 RB	204	}
	205	if (cpu_has_6k_cache) {
	206	extern void __weak r6k_cache_init(void);
	207
	208	r6k_cache_init();
1da177e4	209	}
02cf2119 RB	210	if (cpu_has_4k_cache) {
	211	extern void __weak r4k_cache_init(void);
	212
	213	r4k_cache_init();
02cf2119 RB	214	}
	215	if (cpu_has_8k_cache) {
	216	extern void __weak r8k_cache_init(void);
	217
	218	r8k_cache_init();
02cf2119 RB	219	}
	220	if (cpu_has_tx39_cache) {
	221	extern void __weak tx39_cache_init(void);
	222
	223	tx39_cache_init();
02cf2119	224	}
02cf2119	225
47d979ec DD	226	if (cpu_has_octeon_cache) {
	227	extern void __weak octeon_cache_init(void);
	228
	229	octeon_cache_init();
	230	}
	231
35133692	232	setup_protection_map();
1da177e4	233	}
24e9d0b9 RB	234
	235	int __weak __uncached_access(struct file *file, unsigned long addr)
	236	{
6b2f3d1f	237	if (file->f_flags & O_DSYNC)
24e9d0b9 RB	238	return 1;
	239
	240	return addr >= __pa(high_memory);
	241	}