[deliverable/linux.git] / arch / mips / sibyte / Kconfig

config SIBYTE_SB1250
	bool
	select CEVT_SB1250
	select CSRC_SB1250
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_ENABLE_LDT_IF_PCI
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC
	select SYS_SUPPORTS_SMP

config SIBYTE_BCM1120
	bool
	select CEVT_SB1250
	select CSRC_SB1250
	select IRQ_CPU
	select SIBYTE_BCM112X
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC

config SIBYTE_BCM1125
	bool
	select CEVT_SB1250
	select CSRC_SB1250
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_BCM112X
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC

config SIBYTE_BCM1125H
	bool
	select CEVT_SB1250
	select CSRC_SB1250
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_BCM112X
	select SIBYTE_ENABLE_LDT_IF_PCI
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC

config SIBYTE_BCM112X
	bool
	select CEVT_SB1250
	select CSRC_SB1250
	select IRQ_CPU
	select SIBYTE_SB1xxx_SOC
	select SIBYTE_HAS_ZBUS_PROFILING

config SIBYTE_BCM1x80
	bool
	select CEVT_BCM1480
	select CSRC_BCM1480
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC
	select SYS_SUPPORTS_SMP

config SIBYTE_BCM1x55
	bool
	select CEVT_BCM1480
	select CSRC_BCM1480
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_SB1xxx_SOC
	select SIBYTE_HAS_ZBUS_PROFILING
	select SYS_SUPPORTS_SMP

config SIBYTE_SB1xxx_SOC
	bool
	select DMA_COHERENT
	select IRQ_CPU
	select SIBYTE_CFE
	select SWAP_IO_SPACE
	select SYS_SUPPORTS_32BIT_KERNEL
	select SYS_SUPPORTS_64BIT_KERNEL
	select CFE
	select SYS_HAS_EARLY_PRINTK

choice
	prompt "SiByte SOC Stepping"
	depends on SIBYTE_SB1xxx_SOC

config CPU_SB1_PASS_1
	bool "1250 Pass1"
	depends on SIBYTE_SB1250
	select CPU_HAS_PREFETCH

config CPU_SB1_PASS_2_1250
	bool "1250 An"
	depends on SIBYTE_SB1250
	select CPU_SB1_PASS_2
	help
	  Also called BCM1250 Pass 2

config CPU_SB1_PASS_2_2
	bool "1250 Bn"
	depends on SIBYTE_SB1250
	select CPU_HAS_PREFETCH
	help
	  Also called BCM1250 Pass 2.2

config CPU_SB1_PASS_4
	bool "1250 Cn"
	depends on SIBYTE_SB1250
	select CPU_HAS_PREFETCH
	help
	  Also called BCM1250 Pass 3

config CPU_SB1_PASS_2_112x
	bool "112x Hybrid"
	depends on SIBYTE_BCM112X
	select CPU_SB1_PASS_2

config CPU_SB1_PASS_3
	bool "112x An"
	depends on SIBYTE_BCM112X
	select CPU_HAS_PREFETCH

endchoice

config CPU_SB1_PASS_2
	bool

config SIBYTE_HAS_LDT
	bool

config SIBYTE_ENABLE_LDT_IF_PCI
	bool
	select SIBYTE_HAS_LDT if PCI

config SB1_CEX_ALWAYS_FATAL
	bool "All cache exceptions considered fatal (no recovery attempted)"
	depends on SIBYTE_SB1xxx_SOC

config SB1_CERR_STALL
	bool "Stall (rather than panic) on fatal cache error"
	depends on SIBYTE_SB1xxx_SOC

config SIBYTE_CFE_CONSOLE
	bool "Use firmware console"
	depends on SIBYTE_SB1xxx_SOC
	help
	  Use the CFE API's console write routines during boot.  Other console
	  options (VT console, sb1250 duart console, etc.) should not be
	  configured.

config SIBYTE_BUS_WATCHER
	bool "Support for Bus Watcher statistics"
	depends on SIBYTE_SB1xxx_SOC
	help
	  Handle and keep statistics on the bus error interrupts (COR_ECC,
	  BAD_ECC, IO_BUS).

config SIBYTE_BW_TRACE
	bool "Capture bus trace before bus error"
	depends on SIBYTE_BUS_WATCHER
	help
	  Run a continuous bus trace, dumping the raw data as soon as
	  a ZBbus error is detected.  Cannot work if ZBbus profiling
	  is turned on, and also will interfere with JTAG-based trace
	  buffer activity.  Raw buffer data is dumped to console, and
	  must be processed off-line.

config SIBYTE_TBPROF
	tristate "Support for ZBbus profiling"
	depends on SIBYTE_HAS_ZBUS_PROFILING

config SIBYTE_HAS_ZBUS_PROFILING
	bool
Commit	Line	Data
38b18f72 RB	1	config SIBYTE_SB1250
38b18f72 RB	2	bool
217dd11e RB	3	select CEVT_SB1250
217dd11e RB	4	select CSRC_SB1250
38b18f72	5	select HW_HAS_PCI
7bcf7717	6	select IRQ_CPU
ca6f5494	7	select SIBYTE_ENABLE_LDT_IF_PCI
d619f38f	8	select SIBYTE_HAS_ZBUS_PROFILING
38b18f72	9	select SIBYTE_SB1xxx_SOC
e73ea273	10	select SYS_SUPPORTS_SMP
38b18f72 RB	11
	12	config SIBYTE_BCM1120
	13	bool
217dd11e RB	14	select CEVT_SB1250
217dd11e RB	15	select CSRC_SB1250
7bcf7717	16	select IRQ_CPU
38b18f72	17	select SIBYTE_BCM112X
bb9b813b	18	select SIBYTE_HAS_ZBUS_PROFILING
38b18f72 RB	19	select SIBYTE_SB1xxx_SOC
	20
	21	config SIBYTE_BCM1125
	22	bool
217dd11e RB	23	select CEVT_SB1250
217dd11e RB	24	select CSRC_SB1250
38b18f72	25	select HW_HAS_PCI
7bcf7717	26	select IRQ_CPU
38b18f72	27	select SIBYTE_BCM112X
bb9b813b	28	select SIBYTE_HAS_ZBUS_PROFILING
38b18f72 RB	29	select SIBYTE_SB1xxx_SOC
	30
	31	config SIBYTE_BCM1125H
	32	bool
217dd11e RB	33	select CEVT_SB1250
217dd11e RB	34	select CSRC_SB1250
38b18f72	35	select HW_HAS_PCI
7bcf7717	36	select IRQ_CPU
38b18f72	37	select SIBYTE_BCM112X
ca6f5494	38	select SIBYTE_ENABLE_LDT_IF_PCI
bb9b813b	39	select SIBYTE_HAS_ZBUS_PROFILING
38b18f72 RB	40	select SIBYTE_SB1xxx_SOC
	41
	42	config SIBYTE_BCM112X
	43	bool
217dd11e RB	44	select CEVT_SB1250
217dd11e RB	45	select CSRC_SB1250
7bcf7717	46	select IRQ_CPU
38b18f72	47	select SIBYTE_SB1xxx_SOC
bb9b813b	48	select SIBYTE_HAS_ZBUS_PROFILING
38b18f72	49
f137e463 AI	50	config SIBYTE_BCM1x80
f137e463 AI	51	bool
217dd11e RB	52	select CEVT_BCM1480
217dd11e RB	53	select CSRC_BCM1480
f137e463	54	select HW_HAS_PCI
7bcf7717	55	select IRQ_CPU
d619f38f	56	select SIBYTE_HAS_ZBUS_PROFILING
f137e463	57	select SIBYTE_SB1xxx_SOC
e73ea273	58	select SYS_SUPPORTS_SMP
f137e463 AI	59
	60	config SIBYTE_BCM1x55
	61	bool
217dd11e RB	62	select CEVT_BCM1480
217dd11e RB	63	select CSRC_BCM1480
f137e463	64	select HW_HAS_PCI
7bcf7717	65	select IRQ_CPU
f137e463	66	select SIBYTE_SB1xxx_SOC
bb9b813b	67	select SIBYTE_HAS_ZBUS_PROFILING
e73ea273	68	select SYS_SUPPORTS_SMP
f137e463	69
38b18f72 RB	70	config SIBYTE_SB1xxx_SOC
38b18f72 RB	71	bool
38b18f72	72	select DMA_COHERENT
7bcf7717	73	select IRQ_CPU
38b18f72 RB	74	select SIBYTE_CFE
	75	select SWAP_IO_SPACE
	76	select SYS_SUPPORTS_32BIT_KERNEL
	77	select SYS_SUPPORTS_64BIT_KERNEL
05f94eeb IK	78	select CFE
05f94eeb IK	79	select SYS_HAS_EARLY_PRINTK
38b18f72 RB	80
	81	choice
	82	prompt "SiByte SOC Stepping"
	83	depends on SIBYTE_SB1xxx_SOC
	84
	85	config CPU_SB1_PASS_1
	86	bool "1250 Pass1"
	87	depends on SIBYTE_SB1250
	88	select CPU_HAS_PREFETCH
	89
	90	config CPU_SB1_PASS_2_1250
	91	bool "1250 An"
	92	depends on SIBYTE_SB1250
	93	select CPU_SB1_PASS_2
	94	help
	95	Also called BCM1250 Pass 2
	96
	97	config CPU_SB1_PASS_2_2
	98	bool "1250 Bn"
	99	depends on SIBYTE_SB1250
	100	select CPU_HAS_PREFETCH
	101	help
	102	Also called BCM1250 Pass 2.2
	103
	104	config CPU_SB1_PASS_4
	105	bool "1250 Cn"
	106	depends on SIBYTE_SB1250
	107	select CPU_HAS_PREFETCH
	108	help
	109	Also called BCM1250 Pass 3
	110
	111	config CPU_SB1_PASS_2_112x
	112	bool "112x Hybrid"
	113	depends on SIBYTE_BCM112X
	114	select CPU_SB1_PASS_2
	115
	116	config CPU_SB1_PASS_3
	117	bool "112x An"
	118	depends on SIBYTE_BCM112X
	119	select CPU_HAS_PREFETCH
	120
	121	endchoice
	122
	123	config CPU_SB1_PASS_2
	124	bool
	125
	126	config SIBYTE_HAS_LDT
	127	bool
ca6f5494 RB	128
	129	config SIBYTE_ENABLE_LDT_IF_PCI
	130	bool
	131	select SIBYTE_HAS_LDT if PCI
38b18f72	132
77607635	133	config SB1_CEX_ALWAYS_FATAL
a4b5bd9a AI	134	bool "All cache exceptions considered fatal (no recovery attempted)"
	135	depends on SIBYTE_SB1xxx_SOC
	136
77607635	137	config SB1_CERR_STALL
a4b5bd9a AI	138	bool "Stall (rather than panic) on fatal cache error"
	139	depends on SIBYTE_SB1xxx_SOC
	140
38b18f72 RB	141	config SIBYTE_CFE_CONSOLE
38b18f72 RB	142	bool "Use firmware console"
05f94eeb	143	depends on SIBYTE_SB1xxx_SOC
38b18f72 RB	144	help
	145	Use the CFE API's console write routines during boot. Other console
	146	options (VT console, sb1250 duart console, etc.) should not be
	147	configured.
	148
38b18f72 RB	149	config SIBYTE_BUS_WATCHER
	150	bool "Support for Bus Watcher statistics"
	151	depends on SIBYTE_SB1xxx_SOC
	152	help
	153	Handle and keep statistics on the bus error interrupts (COR_ECC,
	154	BAD_ECC, IO_BUS).
	155
	156	config SIBYTE_BW_TRACE
	157	bool "Capture bus trace before bus error"
	158	depends on SIBYTE_BUS_WATCHER
	159	help
	160	Run a continuous bus trace, dumping the raw data as soon as
	161	a ZBbus error is detected. Cannot work if ZBbus profiling
	162	is turned on, and also will interfere with JTAG-based trace
	163	buffer activity. Raw buffer data is dumped to console, and
	164	must be processed off-line.
	165
38b18f72	166	config SIBYTE_TBPROF
bb9b813b RB	167	tristate "Support for ZBbus profiling"
	168	depends on SIBYTE_HAS_ZBUS_PROFILING
	169
	170	config SIBYTE_HAS_ZBUS_PROFILING
	171	bool