[deliverable/linux.git] / arch / mips / sibyte / sb1250 / time.c

/*
 * Copyright (C) 2000, 2001 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */

/*
 * These are routines to set up and handle interrupts from the
 * sb1250 general purpose timer 0.  We're using the timer as a
 * system clock, so we set it up to run at 100 Hz.  On every
 * interrupt, we update our idea of what the time of day is,
 * then call do_timer() in the architecture-independent kernel
 * code to do general bookkeeping (e.g. update jiffies, run
 * bottom halves, etc.)
 */
#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/kernel_stat.h>

#include <asm/irq.h>
#include <asm/ptrace.h>
#include <asm/addrspace.h>
#include <asm/time.h>
#include <asm/io.h>

#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_int.h>
#include <asm/sibyte/sb1250_scd.h>


#define IMR_IP2_VAL	K_INT_MAP_I0
#define IMR_IP3_VAL	K_INT_MAP_I1
#define IMR_IP4_VAL	K_INT_MAP_I2

extern int sb1250_steal_irq(int irq);

void sb1250_time_init(void)
{
	int cpu = smp_processor_id();
	int irq = K_INT_TIMER_0+cpu;

	/* Only have 4 general purpose timers */
	if (cpu > 3) {
		BUG();
	}

	if (!cpu) {
		/* Use our own gettimeoffset() routine */
		do_gettimeoffset = sb1250_gettimeoffset;
	}

	sb1250_mask_irq(cpu, irq);

	/* Map the timer interrupt to ip[4] of this cpu */
	__raw_writeq(IMR_IP4_VAL,
		     IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
			    (irq << 3)));

	/* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
	/* Disable the timer and set up the count */
	__raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
#ifdef CONFIG_SIMULATION
	__raw_writeq((50000 / HZ) - 1,
		     IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
#else
	__raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1,
		     IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
#endif

	/* Set the timer running */
	__raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
		     IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));

	sb1250_unmask_irq(cpu, irq);
	sb1250_steal_irq(irq);
	/*
	 * This interrupt is "special" in that it doesn't use the request_irq
	 * way to hook the irq line.  The timer interrupt is initialized early
	 * enough to make this a major pain, and it's also firing enough to
	 * warrant a bit of special case code.  sb1250_timer_interrupt is
	 * called directly from irq_handler.S when IP[4] is set during an
	 * interrupt
	 */
}

void sb1250_timer_interrupt(struct pt_regs *regs)
{
	int cpu = smp_processor_id();
	int irq = K_INT_TIMER_0 + cpu;

	/* Reset the timer */
	____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
		       IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));

	if (cpu == 0) {
		/*
		 * CPU 0 handles the global timer interrupt job
		 */
		ll_timer_interrupt(irq, regs);
	}
	else {
		/*
		 * other CPUs should just do profiling and process accounting
		 */
		ll_local_timer_interrupt(irq, regs);
	}
}

/*
 * We use our own do_gettimeoffset() instead of the generic one,
 * because the generic one does not work for SMP case.
 * In addition, since we use general timer 0 for system time,
 * we can get accurate intra-jiffy offset without calibration.
 */
unsigned long sb1250_gettimeoffset(void)
{
	unsigned long count =
		__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));

	return 1000000/HZ - count;
 }
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 2000, 2001 Broadcom Corporation
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version 2
	7	* of the License, or (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	17	*/
	18
	19	/*
	20	* These are routines to set up and handle interrupts from the
	21	* sb1250 general purpose timer 0. We're using the timer as a
	22	* system clock, so we set it up to run at 100 Hz. On every
	23	* interrupt, we update our idea of what the time of day is,
	24	* then call do_timer() in the architecture-independent kernel
	25	* code to do general bookkeeping (e.g. update jiffies, run
	26	* bottom halves, etc.)
	27	*/
	28	#include <linux/config.h>
	29	#include <linux/interrupt.h>
	30	#include <linux/sched.h>
	31	#include <linux/spinlock.h>
	32	#include <linux/kernel_stat.h>
	33
	34	#include <asm/irq.h>
	35	#include <asm/ptrace.h>
	36	#include <asm/addrspace.h>
	37	#include <asm/time.h>
	38	#include <asm/io.h>
	39
	40	#include <asm/sibyte/sb1250.h>
	41	#include <asm/sibyte/sb1250_regs.h>
	42	#include <asm/sibyte/sb1250_int.h>
	43	#include <asm/sibyte/sb1250_scd.h>
	44
	45
	46	#define IMR_IP2_VAL K_INT_MAP_I0
	47	#define IMR_IP3_VAL K_INT_MAP_I1
	48	#define IMR_IP4_VAL K_INT_MAP_I2
	49
	50	extern int sb1250_steal_irq(int irq);
	51
	52	void sb1250_time_init(void)
	53	{
	54	int cpu = smp_processor_id();
	55	int irq = K_INT_TIMER_0+cpu;
	56
	57	/* Only have 4 general purpose timers */
	58	if (cpu > 3) {
	59	BUG();
	60	}
	61
	62	if (!cpu) {
	63	/* Use our own gettimeoffset() routine */
	64	do_gettimeoffset = sb1250_gettimeoffset;
65	}
66
67	sb1250_mask_irq(cpu, irq);
68
69	/* Map the timer interrupt to ip[4] of this cpu */
65bda1a9 MR	70	__raw_writeq(IMR_IP4_VAL,
	71	IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
	72	(irq << 3)));
1da177e4 LT	73
	74	/* the general purpose timer ticks at 1 Mhz independent if the rest of the system */
	75	/* Disable the timer and set up the count */
65bda1a9	76	__raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
1da177e4	77	#ifdef CONFIG_SIMULATION
4308cb16	78	__raw_writeq((50000 / HZ) - 1,
65bda1a9	79	IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
1da177e4	80	#else
4308cb16	81	__raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1,
65bda1a9	82	IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
1da177e4 LT	83	#endif
	84
	85	/* Set the timer running */
65bda1a9 MR	86	__raw_writeq(M_SCD_TIMER_ENABLE \| M_SCD_TIMER_MODE_CONTINUOUS,
65bda1a9 MR	87	IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
1da177e4 LT	88
	89	sb1250_unmask_irq(cpu, irq);
	90	sb1250_steal_irq(irq);
	91	/*
	92	* This interrupt is "special" in that it doesn't use the request_irq
	93	* way to hook the irq line. The timer interrupt is initialized early
	94	* enough to make this a major pain, and it's also firing enough to
	95	* warrant a bit of special case code. sb1250_timer_interrupt is
	96	* called directly from irq_handler.S when IP[4] is set during an
	97	* interrupt
	98	*/
	99	}
	100
	101	void sb1250_timer_interrupt(struct pt_regs *regs)
	102	{
1da177e4 LT	103	int cpu = smp_processor_id();
	104	int irq = K_INT_TIMER_0 + cpu;
	105
	106	/* Reset the timer */
65bda1a9 MR	107	____raw_writeq(M_SCD_TIMER_ENABLE \| M_SCD_TIMER_MODE_CONTINUOUS,
65bda1a9 MR	108	IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
1da177e4	109
1da177e4	110	if (cpu == 0) {
a50b3e27 RB	111	/*
	112	* CPU 0 handles the global timer interrupt job
	113	*/
1da177e4 LT	114	ll_timer_interrupt(irq, regs);
1da177e4 LT	115	}
a50b3e27 RB	116	else {
	117	/*
	118	* other CPUs should just do profiling and process accounting
	119	*/
	120	ll_local_timer_interrupt(irq, regs);
	121	}
1da177e4 LT	122	}
	123
	124	/*
	125	* We use our own do_gettimeoffset() instead of the generic one,
	126	* because the generic one does not work for SMP case.
	127	* In addition, since we use general timer 0 for system time,
	128	* we can get accurate intra-jiffy offset without calibration.
	129	*/
	130	unsigned long sb1250_gettimeoffset(void)
	131	{
	132	unsigned long count =
65bda1a9	133	__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
1da177e4 LT	134
	135	return 1000000/HZ - count;
	136	}