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b27311e1 AN |
1 | /* |
2 | * Toshiba RBTX4939 setup routines. | |
3 | * Based on linux/arch/mips/txx9/rbtx4938/setup.c, | |
4 | * and RBTX49xx patch from CELF patch archive. | |
5 | * | |
6 | * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation | |
7 | * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the | |
8 | * terms of the GNU General Public License version 2. This program is | |
9 | * licensed "as is" without any warranty of any kind, whether express | |
10 | * or implied. | |
11 | */ | |
12 | #include <linux/init.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/leds.h> | |
1ba5a176 AN |
17 | #include <linux/interrupt.h> |
18 | #include <linux/smc91x.h> | |
b27311e1 AN |
19 | #include <asm/reboot.h> |
20 | #include <asm/txx9/generic.h> | |
21 | #include <asm/txx9/pci.h> | |
22 | #include <asm/txx9/rbtx4939.h> | |
23 | ||
24 | static void rbtx4939_machine_restart(char *command) | |
25 | { | |
26 | local_irq_disable(); | |
27 | writeb(1, rbtx4939_reseten_addr); | |
28 | writeb(1, rbtx4939_softreset_addr); | |
29 | while (1) | |
30 | ; | |
31 | } | |
32 | ||
33 | static void __init rbtx4939_time_init(void) | |
34 | { | |
35 | tx4939_time_init(0); | |
36 | } | |
37 | ||
1ba5a176 AN |
38 | #if defined(__BIG_ENDIAN) && \ |
39 | (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)) | |
40 | #define HAVE_RBTX4939_IOSWAB | |
41 | #define IS_CE1_ADDR(addr) \ | |
42 | ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1)) | |
43 | static u16 rbtx4939_ioswabw(volatile u16 *a, u16 x) | |
44 | { | |
45 | return IS_CE1_ADDR(a) ? x : le16_to_cpu(x); | |
46 | } | |
47 | static u16 rbtx4939_mem_ioswabw(volatile u16 *a, u16 x) | |
48 | { | |
49 | return !IS_CE1_ADDR(a) ? x : le16_to_cpu(x); | |
50 | } | |
51 | #endif /* __BIG_ENDIAN && CONFIG_SMC91X */ | |
52 | ||
b27311e1 AN |
53 | static void __init rbtx4939_pci_setup(void) |
54 | { | |
55 | #ifdef CONFIG_PCI | |
56 | int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB); | |
57 | struct pci_controller *c = &txx9_primary_pcic; | |
58 | ||
59 | register_pci_controller(c); | |
60 | ||
61 | tx4939_report_pciclk(); | |
62 | tx4927_pcic_setup(tx4939_pcicptr, c, extarb); | |
63 | if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) && | |
64 | (__raw_readq(&tx4939_ccfgptr->pcfg) & | |
65 | (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) { | |
66 | tx4939_report_pci1clk(); | |
67 | ||
68 | /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */ | |
69 | c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000); | |
70 | register_pci_controller(c); | |
71 | tx4927_pcic_setup(tx4939_pcic1ptr, c, 0); | |
72 | } | |
73 | ||
74 | tx4939_setup_pcierr_irq(); | |
75 | #endif /* CONFIG_PCI */ | |
76 | } | |
77 | ||
78 | static unsigned long long default_ebccr[] __initdata = { | |
79 | 0x01c0000000007608ULL, /* 64M ROM */ | |
80 | 0x017f000000007049ULL, /* 1M IOC */ | |
81 | 0x0180000000408608ULL, /* ISA */ | |
82 | 0, | |
83 | }; | |
84 | ||
85 | static void __init rbtx4939_ebusc_setup(void) | |
86 | { | |
87 | int i; | |
88 | unsigned int sp; | |
89 | ||
90 | /* use user-configured speed */ | |
91 | sp = TX4939_EBUSC_CR(0) & 0x30; | |
92 | default_ebccr[0] |= sp; | |
93 | default_ebccr[1] |= sp; | |
94 | default_ebccr[2] |= sp; | |
95 | /* initialise by myself */ | |
96 | for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) { | |
97 | if (default_ebccr[i]) | |
98 | ____raw_writeq(default_ebccr[i], | |
99 | &tx4939_ebuscptr->cr[i]); | |
100 | else | |
101 | ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i]) | |
102 | & ~8, | |
103 | &tx4939_ebuscptr->cr[i]); | |
104 | } | |
105 | } | |
106 | ||
107 | static void __init rbtx4939_update_ioc_pen(void) | |
108 | { | |
109 | __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg); | |
110 | __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg); | |
111 | __u8 pe1 = readb(rbtx4939_pe1_addr); | |
112 | __u8 pe2 = readb(rbtx4939_pe2_addr); | |
113 | __u8 pe3 = readb(rbtx4939_pe3_addr); | |
114 | if (pcfg & TX4939_PCFG_ATA0MODE) | |
115 | pe1 |= RBTX4939_PE1_ATA(0); | |
116 | else | |
117 | pe1 &= ~RBTX4939_PE1_ATA(0); | |
118 | if (pcfg & TX4939_PCFG_ATA1MODE) { | |
119 | pe1 |= RBTX4939_PE1_ATA(1); | |
120 | pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1)); | |
121 | } else { | |
122 | pe1 &= ~RBTX4939_PE1_ATA(1); | |
123 | if (pcfg & TX4939_PCFG_ET0MODE) | |
124 | pe1 |= RBTX4939_PE1_RMII(0); | |
125 | else | |
126 | pe1 &= ~RBTX4939_PE1_RMII(0); | |
127 | if (pcfg & TX4939_PCFG_ET1MODE) | |
128 | pe1 |= RBTX4939_PE1_RMII(1); | |
129 | else | |
130 | pe1 &= ~RBTX4939_PE1_RMII(1); | |
131 | } | |
132 | if (ccfg & TX4939_CCFG_PTSEL) | |
133 | pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P | | |
134 | RBTX4939_PE3_VP_S); | |
135 | else { | |
136 | __u64 vmode = pcfg & | |
137 | (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE); | |
138 | if (vmode == 0) | |
139 | pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P | | |
140 | RBTX4939_PE3_VP_S); | |
141 | else if (vmode == TX4939_PCFG_VPSMODE) { | |
142 | pe3 |= RBTX4939_PE3_VP_P; | |
143 | pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S); | |
144 | } else if (vmode == TX4939_PCFG_VSSMODE) { | |
145 | pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S; | |
146 | pe3 &= ~RBTX4939_PE3_VP_P; | |
147 | } else { | |
148 | pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P; | |
149 | pe3 &= ~RBTX4939_PE3_VP_S; | |
150 | } | |
151 | } | |
152 | if (pcfg & TX4939_PCFG_SPIMODE) { | |
153 | if (pcfg & TX4939_PCFG_SIO2MODE_GPIO) | |
154 | pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0); | |
155 | else { | |
156 | if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) { | |
157 | pe2 |= RBTX4939_PE2_SIO2; | |
158 | pe2 &= ~RBTX4939_PE2_SIO0; | |
159 | } else { | |
160 | pe2 |= RBTX4939_PE2_SIO0; | |
161 | pe2 &= ~RBTX4939_PE2_SIO2; | |
162 | } | |
163 | } | |
164 | if (pcfg & TX4939_PCFG_SIO3MODE) | |
165 | pe2 |= RBTX4939_PE2_SIO3; | |
166 | else | |
167 | pe2 &= ~RBTX4939_PE2_SIO3; | |
168 | pe2 &= ~RBTX4939_PE2_SPI; | |
169 | } else { | |
170 | pe2 |= RBTX4939_PE2_SPI; | |
171 | pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 | | |
172 | RBTX4939_PE2_SIO0); | |
173 | } | |
174 | if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO) | |
175 | pe2 |= RBTX4939_PE2_GPIO; | |
176 | else | |
177 | pe2 &= ~RBTX4939_PE2_GPIO; | |
178 | writeb(pe1, rbtx4939_pe1_addr); | |
179 | writeb(pe2, rbtx4939_pe2_addr); | |
180 | writeb(pe3, rbtx4939_pe3_addr); | |
181 | } | |
182 | ||
183 | #define RBTX4939_MAX_7SEGLEDS 8 | |
184 | ||
185 | #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) | |
186 | static u8 led_val[RBTX4939_MAX_7SEGLEDS]; | |
187 | struct rbtx4939_led_data { | |
188 | struct led_classdev cdev; | |
189 | char name[32]; | |
190 | unsigned int num; | |
191 | }; | |
192 | ||
193 | /* Use "dot" in 7seg LEDs */ | |
194 | static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev, | |
195 | enum led_brightness value) | |
196 | { | |
197 | struct rbtx4939_led_data *led_dat = | |
198 | container_of(led_cdev, struct rbtx4939_led_data, cdev); | |
199 | unsigned int num = led_dat->num; | |
200 | unsigned long flags; | |
201 | ||
202 | local_irq_save(flags); | |
203 | led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0); | |
204 | writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4)); | |
205 | local_irq_restore(flags); | |
206 | } | |
207 | ||
208 | static int __init rbtx4939_led_probe(struct platform_device *pdev) | |
209 | { | |
210 | struct rbtx4939_led_data *leds_data; | |
211 | int i; | |
212 | static char *default_triggers[] __initdata = { | |
213 | "heartbeat", | |
214 | "ide-disk", | |
215 | "nand-disk", | |
216 | }; | |
217 | ||
218 | leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS, | |
219 | GFP_KERNEL); | |
220 | if (!leds_data) | |
221 | return -ENOMEM; | |
222 | for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) { | |
223 | int rc; | |
224 | struct rbtx4939_led_data *led_dat = &leds_data[i]; | |
225 | ||
226 | led_dat->num = i; | |
227 | led_dat->cdev.brightness_set = rbtx4939_led_brightness_set; | |
228 | sprintf(led_dat->name, "rbtx4939:amber:%u", i); | |
229 | led_dat->cdev.name = led_dat->name; | |
230 | if (i < ARRAY_SIZE(default_triggers)) | |
231 | led_dat->cdev.default_trigger = default_triggers[i]; | |
232 | rc = led_classdev_register(&pdev->dev, &led_dat->cdev); | |
233 | if (rc < 0) | |
234 | return rc; | |
235 | led_dat->cdev.brightness_set(&led_dat->cdev, 0); | |
236 | } | |
237 | return 0; | |
238 | ||
239 | } | |
240 | ||
241 | static struct platform_driver rbtx4939_led_driver = { | |
242 | .driver = { | |
243 | .name = "rbtx4939-led", | |
244 | .owner = THIS_MODULE, | |
245 | }, | |
246 | }; | |
247 | ||
248 | static void __init rbtx4939_led_setup(void) | |
249 | { | |
250 | platform_device_register_simple("rbtx4939-led", -1, NULL, 0); | |
251 | platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe); | |
252 | } | |
253 | #else | |
254 | static inline void rbtx4939_led_setup(void) | |
255 | { | |
256 | } | |
257 | #endif | |
258 | ||
bc89b2bd AN |
259 | static void __rbtx4939_7segled_putc(unsigned int pos, unsigned char val) |
260 | { | |
261 | #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) | |
262 | unsigned long flags; | |
263 | local_irq_save(flags); | |
264 | /* bit7: reserved for LED class */ | |
265 | led_val[pos] = (led_val[pos] & 0x80) | (val & 0x7f); | |
266 | val = led_val[pos]; | |
267 | local_irq_restore(flags); | |
268 | #endif | |
269 | writeb(val, rbtx4939_7seg_addr(pos / 4, pos % 4)); | |
270 | } | |
271 | ||
272 | static void rbtx4939_7segled_putc(unsigned int pos, unsigned char val) | |
273 | { | |
274 | /* convert from map_to_seg7() notation */ | |
275 | val = (val & 0x88) | | |
276 | ((val & 0x40) >> 6) | | |
277 | ((val & 0x20) >> 4) | | |
278 | ((val & 0x10) >> 2) | | |
279 | ((val & 0x04) << 2) | | |
280 | ((val & 0x02) << 4) | | |
281 | ((val & 0x01) << 6); | |
282 | __rbtx4939_7segled_putc(pos, val); | |
283 | } | |
284 | ||
b27311e1 AN |
285 | static void __init rbtx4939_arch_init(void) |
286 | { | |
287 | rbtx4939_pci_setup(); | |
288 | } | |
289 | ||
290 | static void __init rbtx4939_device_init(void) | |
291 | { | |
1ba5a176 AN |
292 | unsigned long smc_addr = RBTX4939_ETHER_ADDR - IO_BASE; |
293 | struct resource smc_res[] = { | |
294 | { | |
295 | .start = smc_addr, | |
296 | .end = smc_addr + 0x10 - 1, | |
297 | .flags = IORESOURCE_MEM, | |
298 | }, { | |
299 | .start = RBTX4939_IRQ_ETHER, | |
300 | /* override default irq flag defined in smc91x.h */ | |
301 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
302 | }, | |
303 | }; | |
304 | struct smc91x_platdata smc_pdata = { | |
305 | .flags = SMC91X_USE_16BIT, | |
306 | }; | |
307 | struct platform_device *pdev; | |
b27311e1 AN |
308 | #if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE) |
309 | int i, j; | |
310 | unsigned char ethaddr[2][6]; | |
9cc45815 AN |
311 | u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f; |
312 | ||
b27311e1 AN |
313 | for (i = 0; i < 2; i++) { |
314 | unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10); | |
9cc45815 AN |
315 | if (bdipsw == 0) |
316 | memcpy(ethaddr[i], (void *)area, 6); | |
317 | else { | |
b27311e1 | 318 | u16 buf[3]; |
9cc45815 AN |
319 | if (bdipsw & 8) |
320 | area -= 0x03000000; | |
321 | else | |
322 | area -= 0x01000000; | |
b27311e1 AN |
323 | for (j = 0; j < 3; j++) |
324 | buf[j] = le16_to_cpup((u16 *)(area + j * 2)); | |
325 | memcpy(ethaddr[i], buf, 6); | |
9cc45815 | 326 | } |
b27311e1 AN |
327 | } |
328 | tx4939_ethaddr_init(ethaddr[0], ethaddr[1]); | |
329 | #endif | |
1ba5a176 AN |
330 | pdev = platform_device_alloc("smc91x", -1); |
331 | if (!pdev || | |
332 | platform_device_add_resources(pdev, smc_res, ARRAY_SIZE(smc_res)) || | |
333 | platform_device_add_data(pdev, &smc_pdata, sizeof(smc_pdata)) || | |
334 | platform_device_add(pdev)) | |
335 | platform_device_put(pdev); | |
b27311e1 AN |
336 | rbtx4939_led_setup(); |
337 | tx4939_wdt_init(); | |
4bacc687 | 338 | tx4939_ata_init(); |
b27311e1 AN |
339 | } |
340 | ||
341 | static void __init rbtx4939_setup(void) | |
342 | { | |
bc89b2bd AN |
343 | int i; |
344 | ||
b27311e1 AN |
345 | rbtx4939_ebusc_setup(); |
346 | /* always enable ATA0 */ | |
347 | txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE); | |
348 | rbtx4939_update_ioc_pen(); | |
349 | if (txx9_master_clock == 0) | |
350 | txx9_master_clock = 20000000; | |
351 | tx4939_setup(); | |
1ba5a176 AN |
352 | #ifdef HAVE_RBTX4939_IOSWAB |
353 | ioswabw = rbtx4939_ioswabw; | |
354 | __mem_ioswabw = rbtx4939_mem_ioswabw; | |
355 | #endif | |
b27311e1 AN |
356 | |
357 | _machine_restart = rbtx4939_machine_restart; | |
358 | ||
bc89b2bd AN |
359 | txx9_7segled_init(RBTX4939_MAX_7SEGLEDS, rbtx4939_7segled_putc); |
360 | for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) | |
361 | txx9_7segled_putc(i, '-'); | |
b27311e1 AN |
362 | pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n", |
363 | readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr), | |
364 | readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr)); | |
365 | ||
366 | #ifdef CONFIG_PCI | |
367 | txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0); | |
368 | txx9_board_pcibios_setup = tx4927_pcibios_setup; | |
369 | #else | |
370 | set_io_port_base(RBTX4939_ETHER_BASE); | |
371 | #endif | |
372 | ||
373 | tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0); | |
374 | } | |
375 | ||
376 | struct txx9_board_vec rbtx4939_vec __initdata = { | |
377 | .system = "Tothiba RBTX4939", | |
378 | .prom_init = rbtx4939_prom_init, | |
379 | .mem_setup = rbtx4939_setup, | |
380 | .irq_setup = rbtx4939_irq_setup, | |
381 | .time_init = rbtx4939_time_init, | |
382 | .device_init = rbtx4939_device_init, | |
383 | .arch_init = rbtx4939_arch_init, | |
384 | #ifdef CONFIG_PCI | |
385 | .pci_map_irq = tx4939_pci_map_irq, | |
386 | #endif | |
387 | }; |