[deliverable/linux.git] / arch / mips / vr41xx / common / pmu.c

/*
 *  pmu.c, Power Management Unit routines for NEC VR4100 series.
 *
 *  Copyright (C) 2003-2007  Yoichi Yuasa <yuasa@linux-mips.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/pm.h>
#include <linux/sched.h>
#include <linux/types.h>

#include <asm/cacheflush.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/reboot.h>

#define PMU_TYPE1_BASE	0x0b0000a0UL
#define PMU_TYPE1_SIZE	0x0eUL

#define PMU_TYPE2_BASE	0x0f0000c0UL
#define PMU_TYPE2_SIZE	0x10UL

#define PMUCNT2REG	0x06
 #define SOFTRST	0x0010

static void __iomem *pmu_base;

#define pmu_read(offset)		readw(pmu_base + (offset))
#define pmu_write(offset, value)	writew((value), pmu_base + (offset))

static void vr41xx_cpu_wait(void)
{
	local_irq_disable();
	if (!need_resched())
		/*
		 * "standby" sets IE bit of the CP0_STATUS to 1.
		 */
		__asm__("standby;\n");
	else
		local_irq_enable();
}

static inline void software_reset(void)
{
	uint16_t pmucnt2;

	switch (current_cpu_type()) {
	case CPU_VR4122:
	case CPU_VR4131:
	case CPU_VR4133:
		pmucnt2 = pmu_read(PMUCNT2REG);
		pmucnt2 |= SOFTRST;
		pmu_write(PMUCNT2REG, pmucnt2);
		break;
	default:
		set_c0_status(ST0_BEV | ST0_ERL);
		change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
		flush_cache_all();
		write_c0_wired(0);
		__asm__("jr     %0"::"r"(0xbfc00000));
		break;
	}
}

static void vr41xx_restart(char *command)
{
	local_irq_disable();
	software_reset();
	while (1) ;
}

static void vr41xx_halt(void)
{
	local_irq_disable();
	printk(KERN_NOTICE "\nYou can turn off the power supply\n");
	__asm__("hibernate;\n");
}

static int __init vr41xx_pmu_init(void)
{
	unsigned long start, size;

	switch (current_cpu_type()) {
	case CPU_VR4111:
	case CPU_VR4121:
		start = PMU_TYPE1_BASE;
		size = PMU_TYPE1_SIZE;
		break;
	case CPU_VR4122:
	case CPU_VR4131:
	case CPU_VR4133:
		start = PMU_TYPE2_BASE;
		size = PMU_TYPE2_SIZE;
		break;
	default:
		printk("Unexpected CPU of NEC VR4100 series\n");
		return -ENODEV;
	}

	if (request_mem_region(start, size, "PMU") == NULL)
		return -EBUSY;

	pmu_base = ioremap(start, size);
	if (pmu_base == NULL) {
		release_mem_region(start, size);
		return -EBUSY;
	}

	cpu_wait = vr41xx_cpu_wait;
	_machine_restart = vr41xx_restart;
	_machine_halt = vr41xx_halt;
	pm_power_off = vr41xx_halt;

	return 0;
}

core_initcall(vr41xx_pmu_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* pmu.c, Power Management Unit routines for NEC VR4100 series.
	3	*
ada8e951	4	* Copyright (C) 2003-2007 Yoichi Yuasa <yuasa@linux-mips.org>
1da177e4 LT	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
3407c0fe	20	#include <linux/errno.h>
1da177e4	21	#include <linux/init.h>
3407c0fe	22	#include <linux/ioport.h>
1da177e4	23	#include <linux/kernel.h>
fcdb27ad	24	#include <linux/pm.h>
61a33168	25	#include <linux/sched.h>
1da177e4 LT	26	#include <linux/types.h>
1da177e4 LT	27
2f2a2d99	28	#include <asm/cacheflush.h>
1da177e4 LT	29	#include <asm/cpu.h>
1da177e4 LT	30	#include <asm/io.h>
61a33168	31	#include <asm/processor.h>
1da177e4	32	#include <asm/reboot.h>
1da177e4	33
3407c0fe YY	34	#define PMU_TYPE1_BASE 0x0b0000a0UL
	35	#define PMU_TYPE1_SIZE 0x0eUL
	36
	37	#define PMU_TYPE2_BASE 0x0f0000c0UL
	38	#define PMU_TYPE2_SIZE 0x10UL
	39
	40	#define PMUCNT2REG 0x06
1da177e4 LT	41	#define SOFTRST 0x0010
1da177e4 LT	42
3407c0fe YY	43	static void __iomem *pmu_base;
	44
	45	#define pmu_read(offset) readw(pmu_base + (offset))
	46	#define pmu_write(offset, value) writew((value), pmu_base + (offset))
	47
61a33168 YY	48	static void vr41xx_cpu_wait(void)
	49	{
	50	local_irq_disable();
	51	if (!need_resched())
	52	/*
	53	* "standby" sets IE bit of the CP0_STATUS to 1.
	54	*/
	55	__asm__("standby;\n");
	56	else
	57	local_irq_enable();
	58	}
	59
1da177e4 LT	60	static inline void software_reset(void)
1da177e4 LT	61	{
3407c0fe	62	uint16_t pmucnt2;
1da177e4	63
10cc3529	64	switch (current_cpu_type()) {
1da177e4 LT	65	case CPU_VR4122:
	66	case CPU_VR4131:
	67	case CPU_VR4133:
3407c0fe YY	68	pmucnt2 = pmu_read(PMUCNT2REG);
	69	pmucnt2 \|= SOFTRST;
	70	pmu_write(PMUCNT2REG, pmucnt2);
1da177e4 LT	71	break;
1da177e4 LT	72	default:
2f2a2d99 YY	73	set_c0_status(ST0_BEV \| ST0_ERL);
	74	change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
	75	flush_cache_all();
	76	write_c0_wired(0);
	77	__asm__("jr %0"::"r"(0xbfc00000));
1da177e4 LT	78	break;
	79	}
	80	}
	81
	82	static void vr41xx_restart(char *command)
	83	{
	84	local_irq_disable();
	85	software_reset();
1da177e4 LT	86	while (1) ;
	87	}
	88
	89	static void vr41xx_halt(void)
	90	{
	91	local_irq_disable();
	92	printk(KERN_NOTICE "\nYou can turn off the power supply\n");
fa417806	93	__asm__("hibernate;\n");
1da177e4 LT	94	}
	95
	96	static int __init vr41xx_pmu_init(void)
	97	{
3407c0fe YY	98	unsigned long start, size;
3407c0fe YY	99
10cc3529	100	switch (current_cpu_type()) {
3407c0fe YY	101	case CPU_VR4111:
	102	case CPU_VR4121:
	103	start = PMU_TYPE1_BASE;
	104	size = PMU_TYPE1_SIZE;
	105	break;
	106	case CPU_VR4122:
	107	case CPU_VR4131:
	108	case CPU_VR4133:
	109	start = PMU_TYPE2_BASE;
	110	size = PMU_TYPE2_SIZE;
	111	break;
	112	default:
	113	printk("Unexpected CPU of NEC VR4100 series\n");
	114	return -ENODEV;
	115	}
	116
	117	if (request_mem_region(start, size, "PMU") == NULL)
	118	return -EBUSY;
	119
	120	pmu_base = ioremap(start, size);
	121	if (pmu_base == NULL) {
	122	release_mem_region(start, size);
	123	return -EBUSY;
	124	}
	125
61a33168	126	cpu_wait = vr41xx_cpu_wait;
1da177e4 LT	127	_machine_restart = vr41xx_restart;
1da177e4 LT	128	_machine_halt = vr41xx_halt;
fa417806	129	pm_power_off = vr41xx_halt;
1da177e4 LT	130
	131	return 0;
	132	}
	133
3407c0fe	134	core_initcall(vr41xx_pmu_init);