[deliverable/linux.git] / arch / mn10300 / kernel / setup.c

/* MN10300 Arch-specific initialisation
 *
 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public Licence
 * as published by the Free Software Foundation; either version
 * 2 of the Licence, or (at your option) any later version.
 */
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/user.h>
#include <linux/tty.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/cpu.h>
#include <asm/processor.h>
#include <linux/console.h>
#include <asm/uaccess.h>
#include <asm/setup.h>
#include <asm/io.h>
#include <asm/smp.h>
#include <proc/proc.h>
#include <asm/fpu.h>
#include <asm/sections.h>

struct mn10300_cpuinfo boot_cpu_data;

static char __initdata cmd_line[COMMAND_LINE_SIZE];
char redboot_command_line[COMMAND_LINE_SIZE] =
	"console=ttyS0,115200 root=/dev/mtdblock3 rw";

char __initdata redboot_platform_name[COMMAND_LINE_SIZE];

static struct resource code_resource = {
	.start	= 0x100000,
	.end	= 0,
	.name	= "Kernel code",
};

static struct resource data_resource = {
	.start	= 0,
	.end	= 0,
	.name	= "Kernel data",
};

static unsigned long __initdata phys_memory_base;
static unsigned long __initdata phys_memory_end;
static unsigned long __initdata memory_end;
unsigned long memory_size;

struct thread_info *__current_ti = &init_thread_union.thread_info;
struct task_struct *__current = &init_task;

#define mn10300_known_cpus 5
static const char *const mn10300_cputypes[] = {
	"am33-1",
	"am33-2",
	"am34-1",
	"am33-3",
	"am34-2",
	"unknown"
};

/*
 * Pick out the memory size.  We look for mem=size,
 * where size is "size[KkMm]"
 */
static int __init early_mem(char *p)
{
	memory_size = memparse(p, &p);

	if (memory_size == 0)
		panic("Memory size not known\n");

	return 0;
}
early_param("mem", early_mem);

/*
 * architecture specific setup
 */
void __init setup_arch(char **cmdline_p)
{
	unsigned long bootmap_size;
	unsigned long kstart_pfn, start_pfn, free_pfn, end_pfn;

	cpu_init();
	unit_setup();
	smp_init_cpus();

	/* save unparsed command line copy for /proc/cmdline */
	strlcpy(boot_command_line, redboot_command_line, COMMAND_LINE_SIZE);

	/* populate cmd_line too for later use, preserving boot_command_line */
	strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
	*cmdline_p = cmd_line;

	parse_early_param();

	memory_end = (unsigned long) CONFIG_KERNEL_RAM_BASE_ADDRESS +
		memory_size;
	if (memory_end > phys_memory_end)
		memory_end = phys_memory_end;

	init_mm.start_code = (unsigned long)&_text;
	init_mm.end_code = (unsigned long) &_etext;
	init_mm.end_data = (unsigned long) &_edata;
	init_mm.brk = (unsigned long) &_end;

	code_resource.start = virt_to_bus(&_text);
	code_resource.end = virt_to_bus(&_etext)-1;
	data_resource.start = virt_to_bus(&_etext);
	data_resource.end = virt_to_bus(&_edata)-1;

	start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT);
	kstart_pfn = PFN_UP(__pa(&_text));
	free_pfn = PFN_UP(__pa(&_end));
	end_pfn = PFN_DOWN(__pa(memory_end));

	bootmap_size = init_bootmem_node(&contig_page_data,
					 free_pfn,
					 start_pfn,
					 end_pfn);

	if (kstart_pfn > start_pfn)
		free_bootmem(PFN_PHYS(start_pfn),
			     PFN_PHYS(kstart_pfn - start_pfn));

	free_bootmem(PFN_PHYS(free_pfn),
		     PFN_PHYS(end_pfn - free_pfn));

	/* If interrupt vector table is in main ram, then we need to
	   reserve the page it is occupying. */
	if (CONFIG_INTERRUPT_VECTOR_BASE >= CONFIG_KERNEL_RAM_BASE_ADDRESS &&
	    CONFIG_INTERRUPT_VECTOR_BASE < memory_end)
		reserve_bootmem(CONFIG_INTERRUPT_VECTOR_BASE, PAGE_SIZE,
				BOOTMEM_DEFAULT);

	reserve_bootmem(PAGE_ALIGN(PFN_PHYS(free_pfn)), bootmap_size,
			BOOTMEM_DEFAULT);

#ifdef CONFIG_VT
#if defined(CONFIG_VGA_CONSOLE)
	conswitchp = &vga_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
#endif
#endif

	paging_init();
}

/*
 * perform CPU initialisation
 */
void __init cpu_init(void)
{
	unsigned long cpurev = CPUREV, type;

	type = (CPUREV & CPUREV_TYPE) >> CPUREV_TYPE_S;
	if (type > mn10300_known_cpus)
		type = mn10300_known_cpus;

	printk(KERN_INFO "Panasonic %s, rev %ld\n",
	       mn10300_cputypes[type],
	       (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S);

	get_mem_info(&phys_memory_base, &memory_size);
	phys_memory_end = phys_memory_base + memory_size;

	fpu_init_state();
}

static struct cpu cpu_devices[NR_CPUS];

static int __init topology_init(void)
{
	int i;

	for_each_present_cpu(i)
		register_cpu(&cpu_devices[i], i);

	return 0;
}

subsys_initcall(topology_init);

/*
 * Get CPU information for use by the procfs.
 */
static int show_cpuinfo(struct seq_file *m, void *v)
{
#ifdef CONFIG_SMP
	struct mn10300_cpuinfo *c = v;
	unsigned long cpu_id = c - cpu_data;
	unsigned long cpurev = c->type, type, icachesz, dcachesz;
#else  /* CONFIG_SMP */
	unsigned long cpu_id = 0;
	unsigned long cpurev = CPUREV, type, icachesz, dcachesz;
#endif /* CONFIG_SMP */

#ifdef CONFIG_SMP
	if (!cpu_online(cpu_id))
		return 0;
#endif

	type = (cpurev & CPUREV_TYPE) >> CPUREV_TYPE_S;
	if (type > mn10300_known_cpus)
		type = mn10300_known_cpus;

	icachesz =
		((cpurev & CPUREV_ICWAY ) >> CPUREV_ICWAY_S)  *
		((cpurev & CPUREV_ICSIZE) >> CPUREV_ICSIZE_S) *
		1024;

	dcachesz =
		((cpurev & CPUREV_DCWAY ) >> CPUREV_DCWAY_S)  *
		((cpurev & CPUREV_DCSIZE) >> CPUREV_DCSIZE_S) *
		1024;

	seq_printf(m,
		   "processor  : %ld\n"
		   "vendor_id  : " PROCESSOR_VENDOR_NAME "\n"
		   "cpu core   : %s\n"
		   "cpu rev    : %lu\n"
		   "model name : " PROCESSOR_MODEL_NAME		"\n"
		   "icache size: %lu\n"
		   "dcache size: %lu\n",
		   cpu_id,
		   mn10300_cputypes[type],
		   (cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S,
		   icachesz,
		   dcachesz
		   );

	seq_printf(m,
		   "ioclk speed: %lu.%02luMHz\n"
		   "bogomips   : %lu.%02lu\n\n",
		   MN10300_IOCLK / 1000000,
		   (MN10300_IOCLK / 10000) % 100,
#ifdef CONFIG_SMP
		   c->loops_per_jiffy / (500000 / HZ),
		   (c->loops_per_jiffy / (5000 / HZ)) % 100
#else  /* CONFIG_SMP */
		   loops_per_jiffy / (500000 / HZ),
		   (loops_per_jiffy / (5000 / HZ)) % 100
#endif /* CONFIG_SMP */
		   );

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	return *pos < NR_CPUS ? cpu_data + *pos : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start	= c_start,
	.next	= c_next,
	.stop	= c_stop,
	.show	= show_cpuinfo,
};
Commit	Line	Data
b920de1b DH	1	/* MN10300 Arch-specific initialisation
	2	*
	3	* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
	4	* Written by David Howells (dhowells@redhat.com)
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public Licence
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the Licence, or (at your option) any later version.
	10	*/
	11	#include <linux/errno.h>
	12	#include <linux/sched.h>
	13	#include <linux/kernel.h>
	14	#include <linux/mm.h>
	15	#include <linux/stddef.h>
	16	#include <linux/unistd.h>
	17	#include <linux/ptrace.h>
b920de1b	18	#include <linux/user.h>
b920de1b DH	19	#include <linux/tty.h>
	20	#include <linux/ioport.h>
	21	#include <linux/delay.h>
	22	#include <linux/init.h>
	23	#include <linux/bootmem.h>
	24	#include <linux/seq_file.h>
368dd5ac	25	#include <linux/cpu.h>
b920de1b DH	26	#include <asm/processor.h>
	27	#include <linux/console.h>
	28	#include <asm/uaccess.h>
b920de1b DH	29	#include <asm/setup.h>
	30	#include <asm/io.h>
	31	#include <asm/smp.h>
2f2a2132	32	#include <proc/proc.h>
b920de1b DH	33	#include <asm/fpu.h>
	34	#include <asm/sections.h>
	35
	36	struct mn10300_cpuinfo boot_cpu_data;
	37
e3f12a53	38	static char __initdata cmd_line[COMMAND_LINE_SIZE];
b920de1b DH	39	char redboot_command_line[COMMAND_LINE_SIZE] =
	40	"console=ttyS0,115200 root=/dev/mtdblock3 rw";
	41
	42	char __initdata redboot_platform_name[COMMAND_LINE_SIZE];
	43
	44	static struct resource code_resource = {
	45	.start = 0x100000,
	46	.end = 0,
	47	.name = "Kernel code",
	48	};
	49
	50	static struct resource data_resource = {
	51	.start = 0,
	52	.end = 0,
	53	.name = "Kernel data",
	54	};
	55
	56	static unsigned long __initdata phys_memory_base;
	57	static unsigned long __initdata phys_memory_end;
	58	static unsigned long __initdata memory_end;
	59	unsigned long memory_size;
	60
	61	struct thread_info *__current_ti = &init_thread_union.thread_info;
	62	struct task_struct *__current = &init_task;
	63
368dd5ac	64	#define mn10300_known_cpus 5
b920de1b	65	static const char *const mn10300_cputypes[] = {
368dd5ac AT	66	"am33-1",
	67	"am33-2",
	68	"am34-1",
	69	"am33-3",
	70	"am34-2",
b920de1b DH	71	"unknown"
	72	};
	73
	74	/*
e3f12a53 AT	75	* Pick out the memory size. We look for mem=size,
e3f12a53 AT	76	* where size is "size[KkMm]"
b920de1b	77	*/
e3f12a53	78	static int __init early_mem(char *p)
b920de1b	79	{
e3f12a53	80	memory_size = memparse(p, &p);
b920de1b DH	81
	82	if (memory_size == 0)
	83	panic("Memory size not known\n");
	84
e3f12a53	85	return 0;
b920de1b	86	}
e3f12a53	87	early_param("mem", early_mem);
b920de1b DH	88
	89	/*
	90	* architecture specific setup
	91	*/
	92	void __init setup_arch(char **cmdline_p)
	93	{
	94	unsigned long bootmap_size;
	95	unsigned long kstart_pfn, start_pfn, free_pfn, end_pfn;
	96
	97	cpu_init();
	98	unit_setup();
368dd5ac	99	smp_init_cpus();
e3f12a53 AT	100
	101	/* save unparsed command line copy for /proc/cmdline */
	102	strlcpy(boot_command_line, redboot_command_line, COMMAND_LINE_SIZE);
	103
	104	/* populate cmd_line too for later use, preserving boot_command_line */
	105	strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
	106	*cmdline_p = cmd_line;
	107
	108	parse_early_param();
	109
	110	memory_end = (unsigned long) CONFIG_KERNEL_RAM_BASE_ADDRESS +
	111	memory_size;
	112	if (memory_end > phys_memory_end)
	113	memory_end = phys_memory_end;
b920de1b DH	114
	115	init_mm.start_code = (unsigned long)&_text;
	116	init_mm.end_code = (unsigned long) &_etext;
	117	init_mm.end_data = (unsigned long) &_edata;
	118	init_mm.brk = (unsigned long) &_end;
	119
	120	code_resource.start = virt_to_bus(&_text);
	121	code_resource.end = virt_to_bus(&_etext)-1;
	122	data_resource.start = virt_to_bus(&_etext);
	123	data_resource.end = virt_to_bus(&_edata)-1;
	124
b920de1b DH	125	start_pfn = (CONFIG_KERNEL_RAM_BASE_ADDRESS >> PAGE_SHIFT);
	126	kstart_pfn = PFN_UP(__pa(&_text));
	127	free_pfn = PFN_UP(__pa(&_end));
	128	end_pfn = PFN_DOWN(__pa(memory_end));
	129
	130	bootmap_size = init_bootmem_node(&contig_page_data,
	131	free_pfn,
	132	start_pfn,
	133	end_pfn);
	134
	135	if (kstart_pfn > start_pfn)
	136	free_bootmem(PFN_PHYS(start_pfn),
	137	PFN_PHYS(kstart_pfn - start_pfn));
	138
	139	free_bootmem(PFN_PHYS(free_pfn),
	140	PFN_PHYS(end_pfn - free_pfn));
	141
	142	/* If interrupt vector table is in main ram, then we need to
	143	reserve the page it is occupying. */
	144	if (CONFIG_INTERRUPT_VECTOR_BASE >= CONFIG_KERNEL_RAM_BASE_ADDRESS &&
	145	CONFIG_INTERRUPT_VECTOR_BASE < memory_end)
c7f8d6f6	146	reserve_bootmem(CONFIG_INTERRUPT_VECTOR_BASE, PAGE_SIZE,
b920de1b DH	147	BOOTMEM_DEFAULT);
	148
	149	reserve_bootmem(PAGE_ALIGN(PFN_PHYS(free_pfn)), bootmap_size,
	150	BOOTMEM_DEFAULT);
	151
	152	#ifdef CONFIG_VT
	153	#if defined(CONFIG_VGA_CONSOLE)
	154	conswitchp = &vga_con;
	155	#elif defined(CONFIG_DUMMY_CONSOLE)
	156	conswitchp = &dummy_con;
	157	#endif
	158	#endif
	159
	160	paging_init();
	161	}
	162
	163	/*
	164	* perform CPU initialisation
	165	*/
	166	void __init cpu_init(void)
	167	{
	168	unsigned long cpurev = CPUREV, type;
b920de1b DH	169
	170	type = (CPUREV & CPUREV_TYPE) >> CPUREV_TYPE_S;
	171	if (type > mn10300_known_cpus)
	172	type = mn10300_known_cpus;
	173
a5e03ca2	174	printk(KERN_INFO "Panasonic %s, rev %ld\n",
b920de1b DH	175	mn10300_cputypes[type],
	176	(cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S);
	177
368dd5ac AT	178	get_mem_info(&phys_memory_base, &memory_size);
368dd5ac AT	179	phys_memory_end = phys_memory_base + memory_size;
b920de1b	180
368dd5ac AT	181	fpu_init_state();
368dd5ac AT	182	}
b920de1b	183
368dd5ac	184	static struct cpu cpu_devices[NR_CPUS];
b920de1b	185
368dd5ac AT	186	static int __init topology_init(void)
	187	{
	188	int i;
b920de1b	189
368dd5ac AT	190	for_each_present_cpu(i)
368dd5ac AT	191	register_cpu(&cpu_devices[i], i);
b920de1b	192
368dd5ac	193	return 0;
b920de1b DH	194	}
b920de1b DH	195
368dd5ac AT	196	subsys_initcall(topology_init);
368dd5ac AT	197
b920de1b DH	198	/*
	199	* Get CPU information for use by the procfs.
	200	*/
	201	static int show_cpuinfo(struct seq_file m, void v)
	202	{
368dd5ac AT	203	#ifdef CONFIG_SMP
	204	struct mn10300_cpuinfo *c = v;
	205	unsigned long cpu_id = c - cpu_data;
	206	unsigned long cpurev = c->type, type, icachesz, dcachesz;
	207	#else /* CONFIG_SMP */
	208	unsigned long cpu_id = 0;
b920de1b	209	unsigned long cpurev = CPUREV, type, icachesz, dcachesz;
368dd5ac	210	#endif /* CONFIG_SMP */
b920de1b	211
368dd5ac AT	212	#ifdef CONFIG_SMP
	213	if (!cpu_online(cpu_id))
	214	return 0;
	215	#endif
	216
	217	type = (cpurev & CPUREV_TYPE) >> CPUREV_TYPE_S;
b920de1b DH	218	if (type > mn10300_known_cpus)
	219	type = mn10300_known_cpus;
	220
	221	icachesz =
	222	((cpurev & CPUREV_ICWAY ) >> CPUREV_ICWAY_S) *
	223	((cpurev & CPUREV_ICSIZE) >> CPUREV_ICSIZE_S) *
	224	1024;
	225
	226	dcachesz =
	227	((cpurev & CPUREV_DCWAY ) >> CPUREV_DCWAY_S) *
	228	((cpurev & CPUREV_DCSIZE) >> CPUREV_DCSIZE_S) *
	229	1024;
	230
	231	seq_printf(m,
368dd5ac	232	"processor : %ld\n"
a5e03ca2	233	"vendor_id : " PROCESSOR_VENDOR_NAME "\n"
b920de1b DH	234	"cpu core : %s\n"
	235	"cpu rev : %lu\n"
	236	"model name : " PROCESSOR_MODEL_NAME "\n"
	237	"icache size: %lu\n"
	238	"dcache size: %lu\n",
368dd5ac	239	cpu_id,
b920de1b DH	240	mn10300_cputypes[type],
	241	(cpurev & CPUREV_REVISION) >> CPUREV_REVISION_S,
	242	icachesz,
	243	dcachesz
	244	);
	245
	246	seq_printf(m,
	247	"ioclk speed: %lu.%02luMHz\n"
	248	"bogomips : %lu.%02lu\n\n",
	249	MN10300_IOCLK / 1000000,
	250	(MN10300_IOCLK / 10000) % 100,
368dd5ac AT	251	#ifdef CONFIG_SMP
	252	c->loops_per_jiffy / (500000 / HZ),
	253	(c->loops_per_jiffy / (5000 / HZ)) % 100
	254	#else /* CONFIG_SMP */
b920de1b DH	255	loops_per_jiffy / (500000 / HZ),
b920de1b DH	256	(loops_per_jiffy / (5000 / HZ)) % 100
368dd5ac	257	#endif /* CONFIG_SMP */
b920de1b DH	258	);
	259
	260	return 0;
	261	}
	262
	263	static void c_start(struct seq_file m, loff_t *pos)
	264	{
	265	return pos < NR_CPUS ? cpu_data + pos : NULL;
	266	}
	267
	268	static void c_next(struct seq_file m, void v, loff_t pos)
	269	{
	270	++*pos;
	271	return c_start(m, pos);
	272	}
	273
	274	static void c_stop(struct seq_file m, void v)
	275	{
	276	}
	277
88e9d34c	278	const struct seq_operations cpuinfo_op = {
b920de1b DH	279	.start = c_start,
	280	.next = c_next,
	281	.stop = c_stop,
	282	.show = show_cpuinfo,
	283	};