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b920de1b DH |
1 | /* MN10300 Low level time management |
2 | * | |
08ec3c2d | 3 | * Copyright (C) 2007-2008 Red Hat, Inc. All Rights Reserved. |
b920de1b DH |
4 | * Written by David Howells (dhowells@redhat.com) |
5 | * - Derived from arch/i386/kernel/time.c | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public Licence | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the Licence, or (at your option) any later version. | |
11 | */ | |
12 | #include <linux/sched.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/time.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/profile.h> | |
08ec3c2d | 19 | #include <linux/cnt32_to_63.h> |
b920de1b DH |
20 | #include <asm/irq.h> |
21 | #include <asm/div64.h> | |
22 | #include <asm/processor.h> | |
23 | #include <asm/intctl-regs.h> | |
24 | #include <asm/rtc.h> | |
25 | ||
26 | #ifdef CONFIG_MN10300_RTC | |
27 | unsigned long mn10300_ioclk; /* system I/O clock frequency */ | |
28 | unsigned long mn10300_iobclk; /* system I/O clock frequency */ | |
29 | unsigned long mn10300_tsc_per_HZ; /* number of ioclks per jiffy */ | |
30 | #endif /* CONFIG_MN10300_RTC */ | |
31 | ||
32 | static unsigned long mn10300_last_tsc; /* time-stamp counter at last time | |
33 | * interrupt occurred */ | |
34 | ||
35 | static irqreturn_t timer_interrupt(int irq, void *dev_id); | |
36 | ||
37 | static struct irqaction timer_irq = { | |
38 | .handler = timer_interrupt, | |
39 | .flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER, | |
b920de1b DH |
40 | .name = "timer", |
41 | }; | |
42 | ||
08ec3c2d DH |
43 | static unsigned long sched_clock_multiplier; |
44 | ||
b920de1b DH |
45 | /* |
46 | * scheduler clock - returns current time in nanosec units. | |
47 | */ | |
48 | unsigned long long sched_clock(void) | |
49 | { | |
50 | union { | |
08ec3c2d DH |
51 | unsigned long long ll; |
52 | unsigned l[2]; | |
53 | } tsc64, result; | |
54 | unsigned long tsc, tmp; | |
55 | unsigned product[3]; /* 96-bit intermediate value */ | |
56 | ||
3b950de9 DH |
57 | /* cnt32_to_63() is not safe with preemption */ |
58 | preempt_disable(); | |
59 | ||
08ec3c2d DH |
60 | /* read the TSC value |
61 | */ | |
62 | tsc = 0 - get_cycles(); /* get_cycles() counts down */ | |
b920de1b | 63 | |
08ec3c2d DH |
64 | /* expand to 64-bits. |
65 | * - sched_clock() must be called once a minute or better or the | |
66 | * following will go horribly wrong - see cnt32_to_63() | |
67 | */ | |
68 | tsc64.ll = cnt32_to_63(tsc) & 0x7fffffffffffffffULL; | |
b920de1b | 69 | |
3b950de9 DH |
70 | preempt_enable(); |
71 | ||
08ec3c2d DH |
72 | /* scale the 64-bit TSC value to a nanosecond value via a 96-bit |
73 | * intermediate | |
74 | */ | |
75 | asm("mulu %2,%0,%3,%0 \n" /* LSW * mult -> 0:%3:%0 */ | |
76 | "mulu %2,%1,%2,%1 \n" /* MSW * mult -> %2:%1:0 */ | |
77 | "add %3,%1 \n" | |
78 | "addc 0,%2 \n" /* result in %2:%1:%0 */ | |
79 | : "=r"(product[0]), "=r"(product[1]), "=r"(product[2]), "=r"(tmp) | |
80 | : "0"(tsc64.l[0]), "1"(tsc64.l[1]), "2"(sched_clock_multiplier) | |
b920de1b DH |
81 | : "cc"); |
82 | ||
08ec3c2d DH |
83 | result.l[0] = product[1] << 16 | product[0] >> 16; |
84 | result.l[1] = product[2] << 16 | product[1] >> 16; | |
b920de1b | 85 | |
08ec3c2d DH |
86 | return result.ll; |
87 | } | |
88 | ||
89 | /* | |
90 | * initialise the scheduler clock | |
91 | */ | |
92 | static void __init mn10300_sched_clock_init(void) | |
93 | { | |
94 | sched_clock_multiplier = | |
95 | __muldiv64u(NSEC_PER_SEC, 1 << 16, MN10300_TSCCLK); | |
b920de1b DH |
96 | } |
97 | ||
98 | /* | |
99 | * advance the kernel's time keeping clocks (xtime and jiffies) | |
100 | * - we use Timer 0 & 1 cascaded as a clock to nudge us the next time | |
101 | * there's a need to update | |
102 | */ | |
103 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | |
104 | { | |
105 | unsigned tsc, elapse; | |
106 | ||
107 | write_seqlock(&xtime_lock); | |
108 | ||
109 | while (tsc = get_cycles(), | |
110 | elapse = mn10300_last_tsc - tsc, /* time elapsed since last | |
111 | * tick */ | |
112 | elapse > MN10300_TSC_PER_HZ | |
113 | ) { | |
114 | mn10300_last_tsc -= MN10300_TSC_PER_HZ; | |
115 | ||
116 | /* advance the kernel's time tracking system */ | |
117 | profile_tick(CPU_PROFILING); | |
118 | do_timer(1); | |
b920de1b DH |
119 | } |
120 | ||
121 | write_sequnlock(&xtime_lock); | |
2b79aac9 DH |
122 | |
123 | update_process_times(user_mode(get_irq_regs())); | |
124 | ||
b920de1b DH |
125 | return IRQ_HANDLED; |
126 | } | |
127 | ||
128 | /* | |
129 | * initialise the various timers used by the main part of the kernel | |
130 | */ | |
131 | void __init time_init(void) | |
132 | { | |
133 | /* we need the prescalar running to be able to use IOCLK/8 | |
134 | * - IOCLK runs at 1/4 (ST5 open) or 1/8 (ST5 closed) internal CPU clock | |
135 | * - IOCLK runs at Fosc rate (crystal speed) | |
136 | */ | |
137 | TMPSCNT |= TMPSCNT_ENABLE; | |
138 | ||
139 | startup_timestamp_counter(); | |
140 | ||
141 | printk(KERN_INFO | |
142 | "timestamp counter I/O clock running at %lu.%02lu" | |
143 | " (calibrated against RTC)\n", | |
144 | MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100); | |
145 | ||
b920de1b DH |
146 | mn10300_last_tsc = TMTSCBC; |
147 | ||
148 | /* use timer 0 & 1 cascaded to tick at as close to HZ as possible */ | |
149 | setup_irq(TMJCIRQ, &timer_irq); | |
150 | ||
151 | set_intr_level(TMJCIRQ, TMJCICR_LEVEL); | |
152 | ||
153 | startup_jiffies_counter(); | |
154 | ||
155 | #ifdef CONFIG_MN10300_WD_TIMER | |
156 | /* start the watchdog timer */ | |
157 | watchdog_go(); | |
158 | #endif | |
08ec3c2d DH |
159 | |
160 | mn10300_sched_clock_init(); | |
b920de1b | 161 | } |