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1 | /* |
2 | * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | * | |
17 | */ | |
18 | ||
19 | #ifndef _ASM_NIOS2_CPUINFO_H | |
20 | #define _ASM_NIOS2_CPUINFO_H | |
21 | ||
22 | #include <linux/types.h> | |
23 | ||
24 | struct cpuinfo { | |
25 | /* Core CPU configuration */ | |
26 | char cpu_impl[12]; | |
27 | u32 cpu_clock_freq; | |
65f836ae LFT |
28 | bool mmu; |
29 | bool has_div; | |
30 | bool has_mul; | |
31 | bool has_mulx; | |
2612b879 LFT |
32 | |
33 | /* CPU caches */ | |
34 | u32 icache_line_size; | |
35 | u32 icache_size; | |
36 | u32 dcache_line_size; | |
37 | u32 dcache_size; | |
38 | ||
39 | /* TLB */ | |
40 | u32 tlb_pid_num_bits; /* number of bits used for the PID in TLBMISC */ | |
41 | u32 tlb_num_ways; | |
42 | u32 tlb_num_ways_log2; | |
43 | u32 tlb_num_entries; | |
44 | u32 tlb_num_lines; | |
45 | u32 tlb_ptr_sz; | |
46 | ||
47 | /* Addresses */ | |
48 | u32 reset_addr; | |
49 | u32 exception_addr; | |
50 | u32 fast_tlb_miss_exc_addr; | |
51 | }; | |
52 | ||
53 | extern struct cpuinfo cpuinfo; | |
54 | ||
55 | extern void setup_cpuinfo(void); | |
56 | ||
57 | #endif /* _ASM_NIOS2_CPUINFO_H */ |