[deliverable/linux.git] / arch / openrisc / Kconfig

#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.txt.
#

config OPENRISC
	def_bool y
	select OF
	select OF_EARLY_FLATTREE
	select IRQ_DOMAIN
	select HAVE_MEMBLOCK
	select ARCH_WANT_OPTIONAL_GPIOLIB
        select HAVE_ARCH_TRACEHOOK
	select HAVE_GENERIC_HARDIRQS
	select GENERIC_IRQ_CHIP
	select GENERIC_IRQ_PROBE
	select GENERIC_IRQ_SHOW
	select GENERIC_IOMAP
	select GENERIC_CPU_DEVICES
	select GENERIC_ATOMIC64
	select GENERIC_CLOCKEVENTS
	select GENERIC_STRNCPY_FROM_USER
	select GENERIC_STRNLEN_USER

config MMU
	def_bool y

config SYMBOL_PREFIX
        string
        default ""

config HAVE_DMA_ATTRS
	def_bool y

config UID16
	def_bool y

config RWSEM_GENERIC_SPINLOCK
	def_bool y

config RWSEM_XCHGADD_ALGORITHM
	def_bool n

config GENERIC_HWEIGHT
	def_bool y

config NO_IOPORT
	def_bool y

config GENERIC_GPIO
	def_bool y

config TRACE_IRQFLAGS_SUPPORT
        def_bool y

# For now, use generic checksum functions
#These can be reimplemented in assembly later if so inclined
config GENERIC_CSUM
        def_bool y

config GENERIC_FIND_NEXT_BIT
	def_bool y

source "init/Kconfig"


menu "Processor type and features"

choice
	prompt "Subarchitecture"
	default OR1K_1200

config OR1K_1200
	bool "OR1200"
	help
	  Generic OpenRISC 1200 architecture

endchoice

config OPENRISC_BUILTIN_DTB
        string "Builtin DTB"
        default ""

menu "Class II Instructions"

config OPENRISC_HAVE_INST_FF1
	bool "Have instruction l.ff1"
	default y
	help
	  Select this if your implementation has the Class II instruction l.ff1

config OPENRISC_HAVE_INST_FL1
	bool "Have instruction l.fl1"
	default y
	help
	  Select this if your implementation has the Class II instruction l.fl1

config OPENRISC_HAVE_INST_MUL
	bool "Have instruction l.mul for hardware multiply"
	default y
	help
	  Select this if your implementation has a hardware multiply instruction

config OPENRISC_HAVE_INST_DIV
	bool "Have instruction l.div for hardware divide"
	default y
	help
	  Select this if your implementation has a hardware divide instruction
endmenu


source kernel/Kconfig.hz
source kernel/Kconfig.preempt
source "mm/Kconfig"

config OPENRISC_NO_SPR_SR_DSX
	bool "use SPR_SR_DSX software emulation" if OR1K_1200
	default y
	help
	  SPR_SR_DSX bit is status register bit indicating whether
	  the last exception has happened in delay slot.

	  OpenRISC architecture makes it optional to have it implemented
	  in hardware and the OR1200 does not have it.

	  Say N here if you know that your OpenRISC processor has
	  SPR_SR_DSX bit implemented. Say Y if you are unsure.

config CMDLINE
        string "Default kernel command string"
        default ""
        help
          On some architectures there is currently no way for the boot loader
          to pass arguments to the kernel. For these architectures, you should
          supply some command-line options at build time by entering them
          here.

menu "Debugging options"

config DEBUG_STACKOVERFLOW
	bool "Check for kernel stack overflow"
	default y
	help
	  Make extra checks for space available on stack in some
          critical functions. This will cause kernel to run a bit slower,
	  but will catch most of kernel stack overruns and exit gracefuly.

	  Say Y if you are unsure.

config JUMP_UPON_UNHANDLED_EXCEPTION
	bool "Try to die gracefully"
	default y
	help
	  Now this puts kernel into infinite loop after first oops. Till
	  your kernel crashes this doesn't have any influence.

	  Say Y if you are unsure.

config OPENRISC_ESR_EXCEPTION_BUG_CHECK
	bool "Check for possible ESR exception bug"
	default n
	help
	  This option enables some checks that might expose some problems
          in kernel.

	  Say N if you are unsure.

endmenu

endmenu

menu "Executable file formats"

source "fs/Kconfig.binfmt"

endmenu

source "net/Kconfig"

source "drivers/Kconfig"

source "fs/Kconfig"

source "security/Kconfig"

source "crypto/Kconfig"

source "lib/Kconfig"

menu "Kernel hacking"

source "lib/Kconfig.debug"

endmenu
Commit	Line	Data
f8c4a270 JB	1	#
f8c4a270 JB	2	# For a description of the syntax of this configuration file,
395cf969	3	# see Documentation/kbuild/kconfig-language.txt.
f8c4a270 JB	4	#
	5
	6	config OPENRISC
	7	def_bool y
	8	select OF
	9	select OF_EARLY_FLATTREE
b4c4c6ee	10	select IRQ_DOMAIN
f8c4a270 JB	11	select HAVE_MEMBLOCK
	12	select ARCH_WANT_OPTIONAL_GPIOLIB
	13	select HAVE_ARCH_TRACEHOOK
	14	select HAVE_GENERIC_HARDIRQS
	15	select GENERIC_IRQ_CHIP
	16	select GENERIC_IRQ_PROBE
	17	select GENERIC_IRQ_SHOW
	18	select GENERIC_IOMAP
9f13a1fd	19	select GENERIC_CPU_DEVICES
0662d33a	20	select GENERIC_ATOMIC64
5bf8f6bf	21	select GENERIC_CLOCKEVENTS
603d6637	22	select GENERIC_STRNCPY_FROM_USER
b48b2c3e	23	select GENERIC_STRNLEN_USER
f8c4a270 JB	24
	25	config MMU
	26	def_bool y
	27
f8c4a270 JB	28	config SYMBOL_PREFIX
	29	string
	30	default ""
	31
	32	config HAVE_DMA_ATTRS
	33	def_bool y
	34
	35	config UID16
	36	def_bool y
	37
	38	config RWSEM_GENERIC_SPINLOCK
	39	def_bool y
	40
	41	config RWSEM_XCHGADD_ALGORITHM
	42	def_bool n
	43
	44	config GENERIC_HWEIGHT
	45	def_bool y
	46
f8c4a270 JB	47	config NO_IOPORT
	48	def_bool y
	49
	50	config GENERIC_GPIO
	51	def_bool y
	52
f8c4a270 JB	53	config TRACE_IRQFLAGS_SUPPORT
	54	def_bool y
	55
	56	# For now, use generic checksum functions
	57	#These can be reimplemented in assembly later if so inclined
	58	config GENERIC_CSUM
	59	def_bool y
	60
	61	config GENERIC_FIND_NEXT_BIT
	62	def_bool y
	63
	64	source "init/Kconfig"
	65
	66
	67	menu "Processor type and features"
	68
	69	choice
	70	prompt "Subarchitecture"
	71	default OR1K_1200
	72
	73	config OR1K_1200
	74	bool "OR1200"
	75	help
	76	Generic OpenRISC 1200 architecture
	77
	78	endchoice
	79
	80	config OPENRISC_BUILTIN_DTB
	81	string "Builtin DTB"
	82	default ""
	83
	84	menu "Class II Instructions"
	85
	86	config OPENRISC_HAVE_INST_FF1
	87	bool "Have instruction l.ff1"
	88	default y
	89	help
	90	Select this if your implementation has the Class II instruction l.ff1
	91
	92	config OPENRISC_HAVE_INST_FL1
	93	bool "Have instruction l.fl1"
	94	default y
	95	help
	96	Select this if your implementation has the Class II instruction l.fl1
	97
	98	config OPENRISC_HAVE_INST_MUL
	99	bool "Have instruction l.mul for hardware multiply"
	100	default y
	101	help
	102	Select this if your implementation has a hardware multiply instruction
	103
	104	config OPENRISC_HAVE_INST_DIV
	105	bool "Have instruction l.div for hardware divide"
	106	default y
	107	help
	108	Select this if your implementation has a hardware divide instruction
	109	endmenu
	110
	111
f8c4a270 JB	112	source kernel/Kconfig.hz
	113	source kernel/Kconfig.preempt
	114	source "mm/Kconfig"
	115
	116	config OPENRISC_NO_SPR_SR_DSX
	117	bool "use SPR_SR_DSX software emulation" if OR1K_1200
	118	default y
	119	help
	120	SPR_SR_DSX bit is status register bit indicating whether
	121	the last exception has happened in delay slot.
	122
	123	OpenRISC architecture makes it optional to have it implemented
	124	in hardware and the OR1200 does not have it.
	125
	126	Say N here if you know that your OpenRISC processor has
	127	SPR_SR_DSX bit implemented. Say Y if you are unsure.
	128
	129	config CMDLINE
	130	string "Default kernel command string"
	131	default ""
	132	help
	133	On some architectures there is currently no way for the boot loader
	134	to pass arguments to the kernel. For these architectures, you should
	135	supply some command-line options at build time by entering them
	136	here.
	137
	138	menu "Debugging options"
	139
	140	config DEBUG_STACKOVERFLOW
	141	bool "Check for kernel stack overflow"
	142	default y
	143	help
6b2aac42	144	Make extra checks for space available on stack in some
f8c4a270 JB	145	critical functions. This will cause kernel to run a bit slower,
	146	but will catch most of kernel stack overruns and exit gracefuly.
	147
	148	Say Y if you are unsure.
	149
	150	config JUMP_UPON_UNHANDLED_EXCEPTION
	151	bool "Try to die gracefully"
	152	default y
	153	help
	154	Now this puts kernel into infinite loop after first oops. Till
	155	your kernel crashes this doesn't have any influence.
	156
	157	Say Y if you are unsure.
	158
f8c4a270 JB	159	config OPENRISC_ESR_EXCEPTION_BUG_CHECK
	160	bool "Check for possible ESR exception bug"
	161	default n
	162	help
	163	This option enables some checks that might expose some problems
	164	in kernel.
	165
	166	Say N if you are unsure.
	167
	168	endmenu
	169
	170	endmenu
	171
	172	menu "Executable file formats"
	173
	174	source "fs/Kconfig.binfmt"
	175
	176	endmenu
	177
	178	source "net/Kconfig"
	179
	180	source "drivers/Kconfig"
	181
	182	source "fs/Kconfig"
	183
	184	source "security/Kconfig"
	185
	186	source "crypto/Kconfig"
	187
	188	source "lib/Kconfig"
	189
	190	menu "Kernel hacking"
	191
	192	source "lib/Kconfig.debug"
	193
	194	endmenu