[PARISC] Kill off ASM_PAGE_SIZE use
[deliverable/linux.git] / arch / parisc / kernel / vmlinux.lds.S
CommitLineData
1da177e4
LT
1/* Kernel link layout for various "sections"
2 *
3 * Copyright (C) 1999-2003 Matthew Wilcox <willy at parisc-linux.org>
4 * Copyright (C) 2000-2003 Paul Bame <bame at parisc-linux.org>
5 * Copyright (C) 2000 John Marvin <jsm at parisc-linux.org>
6 * Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
7 * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
8 * Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
2fd83038 9 * Copyright (C) 2006 Helge Deller <deller@gmx.de>
1da177e4
LT
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
1da177e4
LT
26#include <asm-generic/vmlinux.lds.h>
27/* needed for the processor specific cache alignment size */
28#include <asm/cache.h>
29#include <asm/page.h>
2fd83038 30#include <asm/asm-offsets.h>
1da177e4
LT
31
32/* ld script to make hppa Linux kernel */
33#ifndef CONFIG_64BIT
34OUTPUT_FORMAT("elf32-hppa-linux")
35OUTPUT_ARCH(hppa)
36#else
37OUTPUT_FORMAT("elf64-hppa-linux")
38OUTPUT_ARCH(hppa:hppa2.0w)
39#endif
40
41ENTRY(_stext)
42#ifndef CONFIG_64BIT
43jiffies = jiffies_64 + 4;
44#else
45jiffies = jiffies_64;
46#endif
47SECTIONS
48{
be1b3d8c 49 . = KERNEL_BINARY_TEXT_START;
1da177e4 50
be1b3d8c
SR
51 _text = .; /* Text and read-only data */
52 .text ALIGN(16) : {
53 TEXT_TEXT
54 SCHED_TEXT
55 LOCK_TEXT
56 *(.text.do_softirq)
57 *(.text.sys_exit)
58 *(.text.do_sigaltstack)
59 *(.text.do_fork)
60 *(.text.*)
61 *(.fixup)
62 *(.lock.text) /* out-of-line lock text */
63 *(.gnu.warning)
1da177e4 64 } = 0
be1b3d8c
SR
65 /* End of text section */
66 _etext = .;
1da177e4 67
be1b3d8c
SR
68 RODATA
69 BUG_TABLE
1da177e4 70
be1b3d8c
SR
71 /* writeable */
72 /* Make sure this is page aligned so
73 * that we can properly leave these
74 * as writable
75 */
1c593571 76 . = ALIGN(PAGE_SIZE);
be1b3d8c
SR
77 data_start = .;
78 . = ALIGN(16);
79 /* Exception table */
80 __ex_table : {
81 __start___ex_table = .;
82 *(__ex_table)
83 __stop___ex_table = .;
84 }
1da177e4 85
be1b3d8c 86 NOTES
81b4b98a 87
be1b3d8c
SR
88 /* unwind info */
89 .PARISC.unwind : {
90 __start___unwind = .;
91 *(.PARISC.unwind)
92 __stop___unwind = .;
93 }
2fd83038 94
be1b3d8c
SR
95 /* rarely changed data like cpu maps */
96 . = ALIGN(16);
97 .data.read_mostly : {
98 *(.data.read_mostly)
99 }
2fd83038 100
be1b3d8c
SR
101 . = ALIGN(L1_CACHE_BYTES);
102 /* Data */
103 .data : {
104 DATA_DATA
105 CONSTRUCTORS
1da177e4
LT
106 }
107
be1b3d8c
SR
108 . = ALIGN(L1_CACHE_BYTES);
109 .data.cacheline_aligned : {
110 *(.data.cacheline_aligned)
111 }
1da177e4 112
be1b3d8c
SR
113 /* PA-RISC locks requires 16-byte alignment */
114 . = ALIGN(16);
115 .data.lock_aligned : {
116 *(.data.lock_aligned)
117 }
1da177e4 118
be1b3d8c
SR
119 /* nosave data is really only used for software suspend...it's here
120 * just in case we ever implement it
121 */
1c593571 122 . = ALIGN(PAGE_SIZE);
be1b3d8c
SR
123 __nosave_begin = .;
124 .data_nosave : {
125 *(.data.nosave)
126 }
1c593571 127 . = ALIGN(PAGE_SIZE);
be1b3d8c 128 __nosave_end = .;
8039de10 129
be1b3d8c
SR
130 /* End of data section */
131 _edata = .;
1da177e4 132
be1b3d8c
SR
133 /* BSS */
134 __bss_start = .;
135 /* page table entries need to be PAGE_SIZE aligned */
1c593571 136 . = ALIGN(PAGE_SIZE);
be1b3d8c
SR
137 .data.vmpages : {
138 *(.data.vm0.pmd)
139 *(.data.vm0.pgd)
140 *(.data.vm0.pte)
141 }
142 .bss : {
143 *(.bss)
144 *(COMMON)
2fd83038 145 }
be1b3d8c 146 __bss_stop = .;
2fd83038
HD
147
148
be1b3d8c
SR
149 /* assembler code expects init_task to be 16k aligned */
150 . = ALIGN(16384);
151 /* init_task */
152 .data.init_task : {
153 *(.data.init_task)
154 }
1da177e4 155
be1b3d8c
SR
156 /* The interrupt stack is currently partially coded, but not yet
157 * implemented
158 */
159 . = ALIGN(16384);
160 init_istack : {
161 *(init_istack)
162 }
1da177e4
LT
163
164#ifdef CONFIG_64BIT
be1b3d8c
SR
165 . = ALIGN(16);
166 /* Linkage tables */
167 .opd : {
168 *(.opd)
169 } PROVIDE (__gp = .);
170 .plt : {
171 *(.plt)
172 }
173 .dlt : {
174 *(.dlt)
175 }
1da177e4
LT
176#endif
177
be1b3d8c
SR
178 /* reserve space for interrupt stack by aligning __init* to 16k */
179 . = ALIGN(16384);
180 __init_begin = .;
181 .init.text : {
182 _sinittext = .;
183 *(.init.text)
184 _einittext = .;
185 }
186 .init.data : {
187 *(.init.data)
188 }
189 . = ALIGN(16);
190 .init.setup : {
191 __setup_start = .;
192 *(.init.setup)
193 __setup_end = .;
194 }
195 .initcall.init : {
196 __initcall_start = .;
197 INITCALLS
198 __initcall_end = .;
199 }
200 .con_initcall.init : {
201 __con_initcall_start = .;
202 *(.con_initcall.init)
203 __con_initcall_end = .;
204 }
205 SECURITY_INIT
206
207 /* alternate instruction replacement. This is a mechanism x86 uses
208 * to detect the CPU type and replace generic instruction sequences
209 * with CPU specific ones. We don't currently do this in PA, but
210 * it seems like a good idea...
211 */
212 . = ALIGN(4);
213 .altinstructions : {
214 __alt_instructions = .;
215 *(.altinstructions)
216 __alt_instructions_end = .;
217 }
218 .altinstr_replacement : {
219 *(.altinstr_replacement)
220 }
221
222 /* .exit.text is discard at runtime, not link time, to deal with references
223 * from .altinstructions and .eh_frame
224 */
225 .exit.text : {
226 *(.exit.text)
227 }
228 .exit.data : {
229 *(.exit.data)
230 }
67d38229 231#ifdef CONFIG_BLK_DEV_INITRD
1c593571 232 . = ALIGN(PAGE_SIZE);
be1b3d8c
SR
233 .init.ramfs : {
234 __initramfs_start = .;
235 *(.init.ramfs)
236 __initramfs_end = .;
237 }
67d38229 238#endif
5fb7dc37 239
1c593571
SR
240 PERCPU(PAGE_SIZE)
241 . = ALIGN(PAGE_SIZE);
be1b3d8c
SR
242 __init_end = .;
243 /* freed after init ends here */
244 _end = . ;
5fb7dc37 245
be1b3d8c
SR
246 /* Sections to be discarded */
247 /DISCARD/ : {
248 *(.exitcall.exit)
1da177e4 249#ifdef CONFIG_64BIT
be1b3d8c
SR
250 /* temporary hack until binutils is fixed to not emit these
251 * for static binaries
252 */
253 *(.interp)
254 *(.dynsym)
255 *(.dynstr)
256 *(.dynamic)
257 *(.hash)
258 *(.gnu.hash)
1da177e4
LT
259#endif
260 }
261
be1b3d8c
SR
262 STABS_DEBUG
263 .note 0 : { *(.note) }
1da177e4 264}
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