[deliverable/linux.git] / arch / powerpc / boot / dts / motionpro.dts

/*
 * Motion-PRO board Device Tree Source
 *
 * Copyright (C) 2007 Semihalf
 * Marian Balakowicz <m8@semihalf.com>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "promess,motionpro";
	compatible = "promess,motionpro";
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&mpc5200_pic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,5200@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <0x4000>;	// L1, 16K
			i-cache-size = <0x4000>;	// L1, 16K
			timebase-frequency = <0>;	// from bootloader
			bus-frequency = <0>;		// from bootloader
			clock-frequency = <0>;		// from bootloader
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x04000000>;	// 64MB
	};

	soc5200@f0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "fsl,mpc5200b-immr";
		ranges = <0 0xf0000000 0x0000c000>;
		reg = <0xf0000000 0x00000100>;
		bus-frequency = <0>;		// from bootloader
		system-frequency = <0>;		// from bootloader

		cdm@200 {
			compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
			reg = <0x200 0x38>;
		};

		mpc5200_pic: interrupt-controller@500 {
			// 5200 interrupts are encoded into two levels;
			interrupt-controller;
			#interrupt-cells = <3>;
			compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
			reg = <0x500 0x80>;
		};

		timer@600 {	// General Purpose Timer
			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
			reg = <0x600 0x10>;
			interrupts = <1 9 0>;
			fsl,has-wdt;
		};

		timer@610 {	// General Purpose Timer
			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
			reg = <0x610 0x10>;
			interrupts = <1 10 0>;
		};

		timer@620 {	// General Purpose Timer
			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
			reg = <0x620 0x10>;
			interrupts = <1 11 0>;
		};

		timer@630 {	// General Purpose Timer
			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
			reg = <0x630 0x10>;
			interrupts = <1 12 0>;
		};

		timer@640 {	// General Purpose Timer
			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
			reg = <0x640 0x10>;
			interrupts = <1 13 0>;
		};

		timer@650 {	// General Purpose Timer
			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
			reg = <0x650 0x10>;
			interrupts = <1 14 0>;
		};

		motionpro-led@660 {	// Motion-PRO status LED
			compatible = "promess,motionpro-led";
			label = "motionpro-statusled";
			reg = <0x660 0x10>;
			interrupts = <1 15 0>;
			blink-delay = <100>; // 100 msec
		};

		motionpro-led@670 {	// Motion-PRO ready LED
			compatible = "promess,motionpro-led";
			label = "motionpro-readyled";
			reg = <0x670 0x10>;
			interrupts = <1 16 0>;
		};

		rtc@800 {	// Real time clock
			compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
			reg = <0x800 0x100>;
			interrupts = <1 5 0 1 6 0>;
		};

		can@980 {
			compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
			interrupts = <2 18 0>;
			reg = <0x980 0x80>;
		};

		gpio_simple: gpio@b00 {
			compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
			reg = <0xb00 0x40>;
			interrupts = <1 7 0>;
			gpio-controller;
			#gpio-cells = <2>;
		};

		gpio_wkup: gpio@c00 {
			compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
			reg = <0xc00 0x40>;
			interrupts = <1 8 0 0 3 0>;
			gpio-controller;
			#gpio-cells = <2>;
		};

		spi@f00 {
			compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
			reg = <0xf00 0x20>;
			interrupts = <2 13 0 2 14 0>;
		};

		usb@1000 {
			compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
			reg = <0x1000 0xff>;
			interrupts = <2 6 0>;
		};

		dma-controller@1200 {
			compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
			reg = <0x1200 0x80>;
			interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
			              3 4 0  3 5 0  3 6 0  3 7 0
			              3 8 0  3 9 0  3 10 0  3 11 0
			              3 12 0  3 13 0  3 14 0  3 15 0>;
		};

		xlb@1f00 {
			compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
			reg = <0x1f00 0x100>;
		};

		serial@2000 {		// PSC1
			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
			reg = <0x2000 0x100>;
			interrupts = <2 1 0>;
		};

		// PSC2 in spi master mode 
		spi@2200 {		// PSC2
			compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
			cell-index = <1>;
			reg = <0x2200 0x100>;
			interrupts = <2 2 0>;
		};

		// PSC5 in uart mode
		serial@2800 {		// PSC5
			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
			reg = <0x2800 0x100>;
			interrupts = <2 12 0>;
		};

		ethernet@3000 {
			compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
			reg = <0x3000 0x400>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <2 5 0>;
			phy-handle = <&phy0>;
		};

		mdio@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
			reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
			interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.

			phy0: ethernet-phy@2 {
				reg = <2>;
			};
		};

		ata@3a00 {
			compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
			reg = <0x3a00 0x100>;
			interrupts = <2 7 0>;
		};

		i2c@3d40 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
			reg = <0x3d40 0x40>;
			interrupts = <2 16 0>;
			fsl5200-clocking;

			rtc@68 {
				compatible = "dallas,ds1339";
				reg = <0x68>;
			};
		};

		sram@8000 {
			compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
			reg = <0x8000 0x4000>;
		};
	};

	localbus {
		compatible = "fsl,mpc5200b-lpb","simple-bus";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges = <0 0 0xff000000 0x01000000
			  1 0 0x50000000 0x00010000
			  2 0 0x50010000 0x00010000
			  3 0 0x50020000 0x00010000>;

		// 8-bit DualPort SRAM on LocalPlus Bus CS1
		kollmorgen@1,0 {
			compatible = "promess,motionpro-kollmorgen";
			reg = <1 0 0x10000>;
			interrupts = <1 1 0>;
		};

		// 8-bit board CPLD on LocalPlus Bus CS2
		cpld@2,0 {
			compatible = "promess,motionpro-cpld";
			reg = <2 0 0x10000>;
		};

		// 8-bit custom Anybus Module on LocalPlus Bus CS3
		anybus@3,0 {
			compatible = "promess,motionpro-anybus";
			reg = <3 0 0x10000>;
		};
		pro_module_general@3,0 {
			compatible = "promess,pro_module_general";
			reg = <3 0 3>;
		};
		pro_module_dio@3,800 {
			compatible = "promess,pro_module_dio";
			reg = <3 0x800 2>;
		};

		// 16-bit flash device at LocalPlus Bus CS0
		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0 0 0x01000000>;
			bank-width = <2>;
			device-width = <2>;
			#size-cells = <1>;
			#address-cells = <1>;
		};
	};
};
Commit	Line	Data
0238aa54 MB	1	/*
	2	* Motion-PRO board Device Tree Source
	3	*
	4	* Copyright (C) 2007 Semihalf
	5	* Marian Balakowicz <m8@semihalf.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License as published by the
	9	* Free Software Foundation; either version 2 of the License, or (at your
	10	* option) any later version.
	11	*/
	12
a2884f37 GL	13	/dts-v1/;
a2884f37 GL	14
0238aa54 MB	15	/ {
	16	model = "promess,motionpro";
	17	compatible = "promess,motionpro";
	18	#address-cells = <1>;
	19	#size-cells = <1>;
b8842451	20	interrupt-parent = <&mpc5200_pic>;
0238aa54 MB	21
	22	cpus {
	23	#address-cells = <1>;
	24	#size-cells = <0>;
	25
	26	PowerPC,5200@0 {
	27	device_type = "cpu";
	28	reg = <0>;
a2884f37 GL	29	d-cache-line-size = <32>;
	30	i-cache-line-size = <32>;
	31	d-cache-size = <0x4000>; // L1, 16K
	32	i-cache-size = <0x4000>; // L1, 16K
0238aa54 MB	33	timebase-frequency = <0>; // from bootloader
	34	bus-frequency = <0>; // from bootloader
	35	clock-frequency = <0>; // from bootloader
	36	};
	37	};
	38
	39	memory {
	40	device_type = "memory";
a2884f37	41	reg = <0x00000000 0x04000000>; // 64MB
0238aa54 MB	42	};
	43
	44	soc5200@f0000000 {
58a5be39 PG	45	#address-cells = <1>;
58a5be39 PG	46	#size-cells = <1>;
24ce6bc4	47	compatible = "fsl,mpc5200b-immr";
a2884f37 GL	48	ranges = <0 0xf0000000 0x0000c000>;
a2884f37 GL	49	reg = <0xf0000000 0x00000100>;
0238aa54 MB	50	bus-frequency = <0>; // from bootloader
	51	system-frequency = <0>; // from bootloader
	52
	53	cdm@200 {
24ce6bc4	54	compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
a2884f37	55	reg = <0x200 0x38>;
0238aa54 MB	56	};
0238aa54 MB	57
24ce6bc4	58	mpc5200_pic: interrupt-controller@500 {
0238aa54 MB	59	// 5200 interrupts are encoded into two levels;
	60	interrupt-controller;
	61	#interrupt-cells = <3>;
24ce6bc4	62	compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
a2884f37	63	reg = <0x500 0x80>;
0238aa54 MB	64	};
0238aa54 MB	65
24ce6bc4	66	timer@600 { // General Purpose Timer
0238aa54	67	compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
a2884f37	68	reg = <0x600 0x10>;
0238aa54	69	interrupts = <1 9 0>;
0238aa54 MB	70	fsl,has-wdt;
	71	};
	72
24ce6bc4	73	timer@610 { // General Purpose Timer
0238aa54	74	compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
a2884f37 GL	75	reg = <0x610 0x10>;
a2884f37 GL	76	interrupts = <1 10 0>;
0238aa54 MB	77	};
0238aa54 MB	78
24ce6bc4	79	timer@620 { // General Purpose Timer
0238aa54	80	compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
a2884f37 GL	81	reg = <0x620 0x10>;
a2884f37 GL	82	interrupts = <1 11 0>;
0238aa54 MB	83	};
0238aa54 MB	84
24ce6bc4	85	timer@630 { // General Purpose Timer
0238aa54	86	compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
a2884f37 GL	87	reg = <0x630 0x10>;
a2884f37 GL	88	interrupts = <1 12 0>;
0238aa54 MB	89	};
0238aa54 MB	90
24ce6bc4	91	timer@640 { // General Purpose Timer
0238aa54	92	compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
a2884f37 GL	93	reg = <0x640 0x10>;
a2884f37 GL	94	interrupts = <1 13 0>;
0238aa54 MB	95	};
0238aa54 MB	96
24ce6bc4	97	timer@650 { // General Purpose Timer
0238aa54	98	compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
a2884f37 GL	99	reg = <0x650 0x10>;
a2884f37 GL	100	interrupts = <1 14 0>;
0238aa54 MB	101	};
	102
	103	motionpro-led@660 { // Motion-PRO status LED
	104	compatible = "promess,motionpro-led";
	105	label = "motionpro-statusled";
a2884f37 GL	106	reg = <0x660 0x10>;
a2884f37 GL	107	interrupts = <1 15 0>;
a2884f37	108	blink-delay = <100>; // 100 msec
0238aa54 MB	109	};
	110
	111	motionpro-led@670 { // Motion-PRO ready LED
	112	compatible = "promess,motionpro-led";
	113	label = "motionpro-readyled";
a2884f37 GL	114	reg = <0x670 0x10>;
a2884f37 GL	115	interrupts = <1 16 0>;
0238aa54 MB	116	};
	117
	118	rtc@800 { // Real time clock
24ce6bc4	119	compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
a2884f37	120	reg = <0x800 0x100>;
0238aa54	121	interrupts = <1 5 0 1 6 0>;
0238aa54 MB	122	};
0238aa54 MB	123
a2884f37	124	can@980 {
24ce6bc4	125	compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
a2884f37	126	interrupts = <2 18 0>;
a2884f37	127	reg = <0x980 0x80>;
0238aa54 MB	128	};
0238aa54 MB	129
b8842451	130	gpio_simple: gpio@b00 {
24ce6bc4	131	compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
a2884f37	132	reg = <0xb00 0x40>;
0238aa54	133	interrupts = <1 7 0>;
b8842451 GL	134	gpio-controller;
b8842451 GL	135	#gpio-cells = <2>;
0238aa54 MB	136	};
0238aa54 MB	137
b8842451	138	gpio_wkup: gpio@c00 {
24ce6bc4	139	compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
a2884f37	140	reg = <0xc00 0x40>;
0238aa54	141	interrupts = <1 8 0 0 3 0>;
b8842451 GL	142	gpio-controller;
b8842451 GL	143	#gpio-cells = <2>;
0238aa54 MB	144	};
0238aa54 MB	145
0238aa54	146	spi@f00 {
24ce6bc4	147	compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
a2884f37 GL	148	reg = <0xf00 0x20>;
a2884f37 GL	149	interrupts = <2 13 0 2 14 0>;
0238aa54 MB	150	};
	151
	152	usb@1000 {
24ce6bc4	153	compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
a2884f37	154	reg = <0x1000 0xff>;
0238aa54	155	interrupts = <2 6 0>;
0238aa54 MB	156	};
	157
	158	dma-controller@1200 {
24ce6bc4	159	compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
a2884f37	160	reg = <0x1200 0x80>;
0238aa54 MB	161	interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
0238aa54 MB	162	3 4 0 3 5 0 3 6 0 3 7 0
a2884f37 GL	163	3 8 0 3 9 0 3 10 0 3 11 0
a2884f37 GL	164	3 12 0 3 13 0 3 14 0 3 15 0>;
0238aa54 MB	165	};
	166
	167	xlb@1f00 {
24ce6bc4	168	compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
a2884f37	169	reg = <0x1f00 0x100>;
0238aa54 MB	170	};
	171
	172	serial@2000 { // PSC1
24ce6bc4	173	compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
a2884f37	174	reg = <0x2000 0x100>;
0238aa54	175	interrupts = <2 1 0>;
0238aa54 MB	176	};
	177
	178	// PSC2 in spi master mode
	179	spi@2200 { // PSC2
24ce6bc4	180	compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
0238aa54	181	cell-index = <1>;
a2884f37	182	reg = <0x2200 0x100>;
0238aa54	183	interrupts = <2 2 0>;
0238aa54 MB	184	};
	185
	186	// PSC5 in uart mode
	187	serial@2800 { // PSC5
24ce6bc4	188	compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
a2884f37 GL	189	reg = <0x2800 0x100>;
a2884f37 GL	190	interrupts = <2 12 0>;
0238aa54 MB	191	};
	192
	193	ethernet@3000 {
24ce6bc4	194	compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
a2884f37	195	reg = <0x3000 0x400>;
24ce6bc4	196	local-mac-address = [ 00 00 00 00 00 00 ];
0238aa54	197	interrupts = <2 5 0>;
115e1adc BS	198	phy-handle = <&phy0>;
	199	};
	200
	201	mdio@3000 {
	202	#address-cells = <1>;
	203	#size-cells = <0>;
	204	compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
a2884f37	205	reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
115e1adc	206	interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
115e1adc BS	207
115e1adc BS	208	phy0: ethernet-phy@2 {
115e1adc BS	209	reg = <2>;
115e1adc BS	210	};
0238aa54 MB	211	};
	212
	213	ata@3a00 {
24ce6bc4	214	compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
a2884f37	215	reg = <0x3a00 0x100>;
0238aa54	216	interrupts = <2 7 0>;
0238aa54 MB	217	};
	218
	219	i2c@3d40 {
115e1adc BS	220	#address-cells = <1>;
115e1adc BS	221	#size-cells = <0>;
24ce6bc4	222	compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
a2884f37 GL	223	reg = <0x3d40 0x40>;
a2884f37 GL	224	interrupts = <2 16 0>;
0238aa54	225	fsl5200-clocking;
115e1adc BS	226
115e1adc BS	227	rtc@68 {
115e1adc	228	compatible = "dallas,ds1339";
a2884f37	229	reg = <0x68>;
115e1adc	230	};
0238aa54 MB	231	};
	232
	233	sram@8000 {
24ce6bc4	234	compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
a2884f37	235	reg = <0x8000 0x4000>;
0238aa54 MB	236	};
	237	};
	238
b8842451 GL	239	localbus {
b8842451 GL	240	compatible = "fsl,mpc5200b-lpb","simple-bus";
0238aa54 MB	241	#address-cells = <2>;
0238aa54 MB	242	#size-cells = <1>;
a2884f37 GL	243	ranges = <0 0 0xff000000 0x01000000
	244	1 0 0x50000000 0x00010000
	245	2 0 0x50010000 0x00010000
	246	3 0 0x50020000 0x00010000>;
0238aa54 MB	247
	248	// 8-bit DualPort SRAM on LocalPlus Bus CS1
	249	kollmorgen@1,0 {
	250	compatible = "promess,motionpro-kollmorgen";
a2884f37	251	reg = <1 0 0x10000>;
0238aa54	252	interrupts = <1 1 0>;
0238aa54 MB	253	};
	254
	255	// 8-bit board CPLD on LocalPlus Bus CS2
	256	cpld@2,0 {
	257	compatible = "promess,motionpro-cpld";
a2884f37	258	reg = <2 0 0x10000>;
0238aa54 MB	259	};
	260
	261	// 8-bit custom Anybus Module on LocalPlus Bus CS3
	262	anybus@3,0 {
	263	compatible = "promess,motionpro-anybus";
a2884f37	264	reg = <3 0 0x10000>;
0238aa54 MB	265	};
	266	pro_module_general@3,0 {
	267	compatible = "promess,pro_module_general";
	268	reg = <3 0 3>;
	269	};
	270	pro_module_dio@3,800 {
	271	compatible = "promess,pro_module_dio";
a2884f37	272	reg = <3 0x800 2>;
0238aa54	273	};
0238aa54	274
115e1adc BS	275	// 16-bit flash device at LocalPlus Bus CS0
	276	flash@0,0 {
	277	compatible = "cfi-flash";
a2884f37	278	reg = <0 0 0x01000000>;
115e1adc BS	279	bank-width = <2>;
	280	device-width = <2>;
	281	#size-cells = <1>;
	282	#address-cells = <1>;
	283	};
0238aa54 MB	284	};
0238aa54 MB	285	};