[deliverable/linux.git] / arch / powerpc / boot / dts / mpc834x_mds.dts

/*
 * MPC8349E MDS Device Tree Source
 *
 * Copyright 2005, 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "MPC8349EMDS";
	compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
		pci1 = &pci1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8349@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;
			i-cache-size = <32768>;
			timebase-frequency = <0>;	// from bootloader
			bus-frequency = <0>;		// from bootloader
			clock-frequency = <0>;		// from bootloader
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x10000000>;	// 256MB at 0
	};

	bcsr@e2400000 {
		compatible = "fsl,mpc8349mds-bcsr";
		reg = <0xe2400000 0x8000>;
	};

	soc8349@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x0 0xe0000000 0x00100000>;
		reg = <0xe0000000 0x00000200>;
		bus-frequency = <0>;

		wdt@200 {
			device_type = "watchdog";
			compatible = "mpc83xx_wdt";
			reg = <0x200 0x100>;
		};

		i2c@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <0x3000 0x100>;
			interrupts = <14 0x8>;
			interrupt-parent = <&ipic>;
			dfsrr;

			rtc@68 {
				compatible = "dallas,ds1374";
				reg = <0x68>;
			};
		};

		i2c@3100 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <1>;
			compatible = "fsl-i2c";
			reg = <0x3100 0x100>;
			interrupts = <15 0x8>;
			interrupt-parent = <&ipic>;
			dfsrr;
		};

		spi@7000 {
			cell-index = <0>;
			compatible = "fsl,spi";
			reg = <0x7000 0x1000>;
			interrupts = <16 0x8>;
			interrupt-parent = <&ipic>;
			mode = "cpu";
		};

		dma@82a8 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
			reg = <0x82a8 4>;
			ranges = <0 0x8100 0x1a8>;
			interrupt-parent = <&ipic>;
			interrupts = <71 8>;
			cell-index = <0>;
			dma-channel@0 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0 0x80>;
				cell-index = <0>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@80 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x80 0x80>;
				cell-index = <1>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@100 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x100 0x80>;
				cell-index = <2>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@180 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x180 0x28>;
				cell-index = <3>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
		};

		/* phy type (ULPI or SERIAL) are only types supported for MPH */
		/* port = 0 or 1 */
		usb@22000 {
			compatible = "fsl-usb2-mph";
			reg = <0x22000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = <&ipic>;
			interrupts = <39 0x8>;
			phy_type = "ulpi";
			port0;
		};
		/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
		usb@23000 {
			compatible = "fsl-usb2-dr";
			reg = <0x23000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = <&ipic>;
			interrupts = <38 0x8>;
			dr_mode = "otg";
			phy_type = "ulpi";
		};

		enet0: ethernet@24000 {
			#address-cells = <1>;
			#size-cells = <1>;
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			ranges = <0x0 0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <32 0x8 33 0x8 34 0x8>;
			interrupt-parent = <&ipic>;
			tbi-handle = <&tbi0>;
			phy-handle = <&phy0>;
			linux,network-index = <0>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-mdio";
				reg = <0x520 0x20>;

				phy0: ethernet-phy@0 {
					interrupt-parent = <&ipic>;
					interrupts = <17 0x8>;
					reg = <0x0>;
				};

				phy1: ethernet-phy@1 {
					interrupt-parent = <&ipic>;
					interrupts = <18 0x8>;
					reg = <0x1>;
				};

				tbi0: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		enet1: ethernet@25000 {
			#address-cells = <1>;
			#size-cells = <1>;
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			ranges = <0x0 0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 0x8 36 0x8 37 0x8>;
			interrupt-parent = <&ipic>;
			tbi-handle = <&tbi1>;
			phy-handle = <&phy1>;
			linux,network-index = <1>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-tbi";
				reg = <0x520 0x20>;

				tbi1: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		serial0: serial@4500 {
			cell-index = <0>;
			device_type = "serial";
			compatible = "fsl,ns16550", "ns16550";
			reg = <0x4500 0x100>;
			clock-frequency = <0>;
			interrupts = <9 0x8>;
			interrupt-parent = <&ipic>;
		};

		serial1: serial@4600 {
			cell-index = <1>;
			device_type = "serial";
			compatible = "fsl,ns16550", "ns16550";
			reg = <0x4600 0x100>;
			clock-frequency = <0>;
			interrupts = <10 0x8>;
			interrupt-parent = <&ipic>;
		};

		crypto@30000 {
			compatible = "fsl,sec2.0";
			reg = <0x30000 0x10000>;
			interrupts = <11 0x8>;
			interrupt-parent = <&ipic>;
			fsl,num-channels = <4>;
			fsl,channel-fifo-len = <24>;
			fsl,exec-units-mask = <0x7e>;
			fsl,descriptor-types-mask = <0x01010ebf>;
		};

		/* IPIC
		 * interrupts cell = <intr #, sense>
		 * sense values match linux IORESOURCE_IRQ_* defines:
		 * sense == 8: Level, low assertion
		 * sense == 2: Edge, high-to-low change
		 */
		ipic: pic@700 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x700 0x100>;
			device_type = "ipic";
		};
	};

	pci0: pci@e0008500 {
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <

				/* IDSEL 0x11 */
				 0x8800 0x0 0x0 0x1 &ipic 20 0x8
				 0x8800 0x0 0x0 0x2 &ipic 21 0x8
				 0x8800 0x0 0x0 0x3 &ipic 22 0x8
				 0x8800 0x0 0x0 0x4 &ipic 23 0x8

				/* IDSEL 0x12 */
				 0x9000 0x0 0x0 0x1 &ipic 22 0x8
				 0x9000 0x0 0x0 0x2 &ipic 23 0x8
				 0x9000 0x0 0x0 0x3 &ipic 20 0x8
				 0x9000 0x0 0x0 0x4 &ipic 21 0x8

				/* IDSEL 0x13 */
				 0x9800 0x0 0x0 0x1 &ipic 23 0x8
				 0x9800 0x0 0x0 0x2 &ipic 20 0x8
				 0x9800 0x0 0x0 0x3 &ipic 21 0x8
				 0x9800 0x0 0x0 0x4 &ipic 22 0x8

				/* IDSEL 0x15 */
				 0xa800 0x0 0x0 0x1 &ipic 20 0x8
				 0xa800 0x0 0x0 0x2 &ipic 21 0x8
				 0xa800 0x0 0x0 0x3 &ipic 22 0x8
				 0xa800 0x0 0x0 0x4 &ipic 23 0x8

				/* IDSEL 0x16 */
				 0xb000 0x0 0x0 0x1 &ipic 23 0x8
				 0xb000 0x0 0x0 0x2 &ipic 20 0x8
				 0xb000 0x0 0x0 0x3 &ipic 21 0x8
				 0xb000 0x0 0x0 0x4 &ipic 22 0x8

				/* IDSEL 0x17 */
				 0xb800 0x0 0x0 0x1 &ipic 22 0x8
				 0xb800 0x0 0x0 0x2 &ipic 23 0x8
				 0xb800 0x0 0x0 0x3 &ipic 20 0x8
				 0xb800 0x0 0x0 0x4 &ipic 21 0x8

				/* IDSEL 0x18 */
				 0xc000 0x0 0x0 0x1 &ipic 21 0x8
				 0xc000 0x0 0x0 0x2 &ipic 22 0x8
				 0xc000 0x0 0x0 0x3 &ipic 23 0x8
				 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
		interrupt-parent = <&ipic>;
		interrupts = <66 0x8>;
		bus-range = <0 0>;
		ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
			  0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
		clock-frequency = <66666666>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xe0008500 0x100		/* internal registers */
		       0xe0008300 0x8>;		/* config space access registers */
		compatible = "fsl,mpc8349-pci";
		device_type = "pci";
	};

	pci1: pci@e0008600 {
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <

				/* IDSEL 0x11 */
				 0x8800 0x0 0x0 0x1 &ipic 20 0x8
				 0x8800 0x0 0x0 0x2 &ipic 21 0x8
				 0x8800 0x0 0x0 0x3 &ipic 22 0x8
				 0x8800 0x0 0x0 0x4 &ipic 23 0x8

				/* IDSEL 0x12 */
				 0x9000 0x0 0x0 0x1 &ipic 22 0x8
				 0x9000 0x0 0x0 0x2 &ipic 23 0x8
				 0x9000 0x0 0x0 0x3 &ipic 20 0x8
				 0x9000 0x0 0x0 0x4 &ipic 21 0x8

				/* IDSEL 0x13 */
				 0x9800 0x0 0x0 0x1 &ipic 23 0x8
				 0x9800 0x0 0x0 0x2 &ipic 20 0x8
				 0x9800 0x0 0x0 0x3 &ipic 21 0x8
				 0x9800 0x0 0x0 0x4 &ipic 22 0x8

				/* IDSEL 0x15 */
				 0xa800 0x0 0x0 0x1 &ipic 20 0x8
				 0xa800 0x0 0x0 0x2 &ipic 21 0x8
				 0xa800 0x0 0x0 0x3 &ipic 22 0x8
				 0xa800 0x0 0x0 0x4 &ipic 23 0x8

				/* IDSEL 0x16 */
				 0xb000 0x0 0x0 0x1 &ipic 23 0x8
				 0xb000 0x0 0x0 0x2 &ipic 20 0x8
				 0xb000 0x0 0x0 0x3 &ipic 21 0x8
				 0xb000 0x0 0x0 0x4 &ipic 22 0x8

				/* IDSEL 0x17 */
				 0xb800 0x0 0x0 0x1 &ipic 22 0x8
				 0xb800 0x0 0x0 0x2 &ipic 23 0x8
				 0xb800 0x0 0x0 0x3 &ipic 20 0x8
				 0xb800 0x0 0x0 0x4 &ipic 21 0x8

				/* IDSEL 0x18 */
				 0xc000 0x0 0x0 0x1 &ipic 21 0x8
				 0xc000 0x0 0x0 0x2 &ipic 22 0x8
				 0xc000 0x0 0x0 0x3 &ipic 23 0x8
				 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
		interrupt-parent = <&ipic>;
		interrupts = <67 0x8>;
		bus-range = <0 0>;
		ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
			  0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
			  0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
		clock-frequency = <66666666>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xe0008600 0x100		/* internal registers */
		       0xe0008380 0x8>;		/* config space access registers */
		compatible = "fsl,mpc8349-pci";
		device_type = "pci";
	};
};
Commit	Line	Data
1b9a93eb KP	1	/*
	2	* MPC8349E MDS Device Tree Source
	3	*
	4	* Copyright 2005, 2006 Freescale Semiconductor Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
eedd62ed PG	12	/dts-v1/;
eedd62ed PG	13
1b9a93eb KP	14	/ {
1b9a93eb KP	15	model = "MPC8349EMDS";
d71a1dc6	16	compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
1b9a93eb KP	17	#address-cells = <1>;
	18	#size-cells = <1>;
	19
ea082fa9 KG	20	aliases {
	21	ethernet0 = &enet0;
	22	ethernet1 = &enet1;
	23	serial0 = &serial0;
	24	serial1 = &serial1;
	25	pci0 = &pci0;
	26	pci1 = &pci1;
	27	};
	28
1b9a93eb	29	cpus {
1b9a93eb KP	30	#address-cells = <1>;
	31	#size-cells = <0>;
	32
	33	PowerPC,8349@0 {
	34	device_type = "cpu";
cda13dd1	35	reg = <0x0>;
eedd62ed PG	36	d-cache-line-size = <32>;
	37	i-cache-line-size = <32>;
	38	d-cache-size = <32768>;
	39	i-cache-size = <32768>;
1b9a93eb KP	40	timebase-frequency = <0>; // from bootloader
	41	bus-frequency = <0>; // from bootloader
	42	clock-frequency = <0>; // from bootloader
1b9a93eb KP	43	};
	44	};
	45
	46	memory {
	47	device_type = "memory";
eedd62ed	48	reg = <0x00000000 0x10000000>; // 256MB at 0
1b9a93eb KP	49	};
1b9a93eb KP	50
ea5b7a61	51	bcsr@e2400000 {
fd657efc	52	compatible = "fsl,mpc8349mds-bcsr";
eedd62ed	53	reg = <0xe2400000 0x8000>;
ea5b7a61 LY	54	};
ea5b7a61 LY	55
1b9a93eb KP	56	soc8349@e0000000 {
	57	#address-cells = <1>;
	58	#size-cells = <1>;
1b9a93eb	59	device_type = "soc";
cf0d19fb	60	compatible = "simple-bus";
eedd62ed PG	61	ranges = <0x0 0xe0000000 0x00100000>;
eedd62ed PG	62	reg = <0xe0000000 0x00000200>;
1b9a93eb KP	63	bus-frequency = <0>;
	64
	65	wdt@200 {
	66	device_type = "watchdog";
	67	compatible = "mpc83xx_wdt";
eedd62ed	68	reg = <0x200 0x100>;
1b9a93eb KP	69	};
	70
	71	i2c@3000 {
27f49807 KP	72	#address-cells = <1>;
27f49807 KP	73	#size-cells = <0>;
ec9686c4	74	cell-index = <0>;
1b9a93eb	75	compatible = "fsl-i2c";
eedd62ed	76	reg = <0x3000 0x100>;
cda13dd1	77	interrupts = <14 0x8>;
eedd62ed	78	interrupt-parent = <&ipic>;
1b9a93eb	79	dfsrr;
27f49807 KP	80
	81	rtc@68 {
	82	compatible = "dallas,ds1374";
eedd62ed	83	reg = <0x68>;
27f49807	84	};
1b9a93eb KP	85	};
	86
	87	i2c@3100 {
27f49807 KP	88	#address-cells = <1>;
27f49807 KP	89	#size-cells = <0>;
ec9686c4	90	cell-index = <1>;
1b9a93eb	91	compatible = "fsl-i2c";
eedd62ed	92	reg = <0x3100 0x100>;
cda13dd1	93	interrupts = <15 0x8>;
eedd62ed	94	interrupt-parent = <&ipic>;
1b9a93eb KP	95	dfsrr;
	96	};
	97
	98	spi@7000 {
f3a2b29d AV	99	cell-index = <0>;
f3a2b29d AV	100	compatible = "fsl,spi";
eedd62ed	101	reg = <0x7000 0x1000>;
cda13dd1	102	interrupts = <16 0x8>;
eedd62ed	103	interrupt-parent = <&ipic>;
33799e33	104	mode = "cpu";
1b9a93eb KP	105	};
1b9a93eb KP	106
dee80553 KG	107	dma@82a8 {
	108	#address-cells = <1>;
	109	#size-cells = <1>;
	110	compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
	111	reg = <0x82a8 4>;
	112	ranges = <0 0x8100 0x1a8>;
	113	interrupt-parent = <&ipic>;
	114	interrupts = <71 8>;
	115	cell-index = <0>;
	116	dma-channel@0 {
	117	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	118	reg = <0 0x80>;
aeb42762	119	cell-index = <0>;
dee80553 KG	120	interrupt-parent = <&ipic>;
	121	interrupts = <71 8>;
	122	};
	123	dma-channel@80 {
	124	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	125	reg = <0x80 0x80>;
aeb42762	126	cell-index = <1>;
dee80553 KG	127	interrupt-parent = <&ipic>;
	128	interrupts = <71 8>;
	129	};
	130	dma-channel@100 {
	131	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	132	reg = <0x100 0x80>;
aeb42762	133	cell-index = <2>;
dee80553 KG	134	interrupt-parent = <&ipic>;
	135	interrupts = <71 8>;
	136	};
	137	dma-channel@180 {
	138	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	139	reg = <0x180 0x28>;
aeb42762	140	cell-index = <3>;
dee80553 KG	141	interrupt-parent = <&ipic>;
	142	interrupts = <71 8>;
	143	};
	144	};
	145
eedd62ed	146	/* phy type (ULPI or SERIAL) are only types supported for MPH */
1b9a93eb KP	147	/* port = 0 or 1 */
1b9a93eb KP	148	usb@22000 {
1b9a93eb	149	compatible = "fsl-usb2-mph";
eedd62ed	150	reg = <0x22000 0x1000>;
1b9a93eb KP	151	#address-cells = <1>;
1b9a93eb KP	152	#size-cells = <0>;
eedd62ed	153	interrupt-parent = <&ipic>;
cda13dd1	154	interrupts = <39 0x8>;
1b9a93eb	155	phy_type = "ulpi";
b7d66c88	156	port0;
1b9a93eb KP	157	};
	158	/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
	159	usb@23000 {
1b9a93eb	160	compatible = "fsl-usb2-dr";
eedd62ed	161	reg = <0x23000 0x1000>;
1b9a93eb KP	162	#address-cells = <1>;
1b9a93eb KP	163	#size-cells = <0>;
eedd62ed	164	interrupt-parent = <&ipic>;
cda13dd1	165	interrupts = <38 0x8>;
ea5b7a61	166	dr_mode = "otg";
1b9a93eb KP	167	phy_type = "ulpi";
	168	};
	169
e77b28eb	170	enet0: ethernet@24000 {
70b3adbb AV	171	#address-cells = <1>;
70b3adbb AV	172	#size-cells = <1>;
e77b28eb	173	cell-index = <0>;
1b9a93eb KP	174	device_type = "network";
	175	model = "TSEC";
	176	compatible = "gianfar";
eedd62ed	177	reg = <0x24000 0x1000>;
70b3adbb	178	ranges = <0x0 0x24000 0x1000>;
1b9a93eb	179	local-mac-address = [ 00 00 00 00 00 00 ];
cda13dd1	180	interrupts = <32 0x8 33 0x8 34 0x8>;
eedd62ed	181	interrupt-parent = <&ipic>;
b31a1d8b	182	tbi-handle = <&tbi0>;
eedd62ed	183	phy-handle = <&phy0>;
ad25a4cc	184	linux,network-index = <0>;
70b3adbb AV	185
	186	mdio@520 {
	187	#address-cells = <1>;
	188	#size-cells = <0>;
	189	compatible = "fsl,gianfar-mdio";
	190	reg = <0x520 0x20>;
	191
	192	phy0: ethernet-phy@0 {
	193	interrupt-parent = <&ipic>;
	194	interrupts = <17 0x8>;
	195	reg = <0x0>;
70b3adbb AV	196	};
	197
	198	phy1: ethernet-phy@1 {
	199	interrupt-parent = <&ipic>;
	200	interrupts = <18 0x8>;
	201	reg = <0x1>;
70b3adbb AV	202	};
	203
	204	tbi0: tbi-phy@11 {
	205	reg = <0x11>;
	206	device_type = "tbi-phy";
	207	};
	208	};
1b9a93eb KP	209	};
1b9a93eb KP	210
e77b28eb	211	enet1: ethernet@25000 {
70b3adbb AV	212	#address-cells = <1>;
70b3adbb AV	213	#size-cells = <1>;
e77b28eb	214	cell-index = <1>;
1b9a93eb KP	215	device_type = "network";
	216	model = "TSEC";
	217	compatible = "gianfar";
eedd62ed	218	reg = <0x25000 0x1000>;
70b3adbb	219	ranges = <0x0 0x25000 0x1000>;
1b9a93eb	220	local-mac-address = [ 00 00 00 00 00 00 ];
cda13dd1	221	interrupts = <35 0x8 36 0x8 37 0x8>;
eedd62ed	222	interrupt-parent = <&ipic>;
b31a1d8b	223	tbi-handle = <&tbi1>;
eedd62ed	224	phy-handle = <&phy1>;
ad25a4cc	225	linux,network-index = <1>;
70b3adbb AV	226
	227	mdio@520 {
	228	#address-cells = <1>;
	229	#size-cells = <0>;
	230	compatible = "fsl,gianfar-tbi";
	231	reg = <0x520 0x20>;
	232
	233	tbi1: tbi-phy@11 {
	234	reg = <0x11>;
	235	device_type = "tbi-phy";
	236	};
	237	};
1b9a93eb KP	238	};
1b9a93eb KP	239
ea082fa9 KG	240	serial0: serial@4500 {
ea082fa9 KG	241	cell-index = <0>;
1b9a93eb	242	device_type = "serial";
f706bed1	243	compatible = "fsl,ns16550", "ns16550";
eedd62ed	244	reg = <0x4500 0x100>;
1b9a93eb	245	clock-frequency = <0>;
cda13dd1	246	interrupts = <9 0x8>;
eedd62ed	247	interrupt-parent = <&ipic>;
1b9a93eb KP	248	};
1b9a93eb KP	249
ea082fa9 KG	250	serial1: serial@4600 {
ea082fa9 KG	251	cell-index = <1>;
1b9a93eb	252	device_type = "serial";
f706bed1	253	compatible = "fsl,ns16550", "ns16550";
eedd62ed	254	reg = <0x4600 0x100>;
1b9a93eb	255	clock-frequency = <0>;
cda13dd1	256	interrupts = <10 0x8>;
eedd62ed	257	interrupt-parent = <&ipic>;
1b9a93eb KP	258	};
1b9a93eb KP	259
1b9a93eb	260	crypto@30000 {
3fd44736	261	compatible = "fsl,sec2.0";
eedd62ed	262	reg = <0x30000 0x10000>;
cda13dd1	263	interrupts = <11 0x8>;
eedd62ed	264	interrupt-parent = <&ipic>;
3fd44736 KP	265	fsl,num-channels = <4>;
	266	fsl,channel-fifo-len = <24>;
	267	fsl,exec-units-mask = <0x7e>;
	268	fsl,descriptor-types-mask = <0x01010ebf>;
1b9a93eb KP	269	};
	270
	271	/* IPIC
	272	* interrupts cell = <intr #, sense>
	273	* sense values match linux IORESOURCE_IRQ_* defines:
	274	* sense == 8: Level, low assertion
	275	* sense == 2: Edge, high-to-low change
	276	*/
d71a1dc6	277	ipic: pic@700 {
1b9a93eb KP	278	interrupt-controller;
	279	#address-cells = <0>;
	280	#interrupt-cells = <2>;
eedd62ed	281	reg = <0x700 0x100>;
1b9a93eb KP	282	device_type = "ipic";
	283	};
	284	};
1b3c5cda	285
ea082fa9	286	pci0: pci@e0008500 {
eedd62ed	287	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	288	interrupt-map = <
	289
	290	/* IDSEL 0x11 */
eedd62ed PG	291	0x8800 0x0 0x0 0x1 &ipic 20 0x8
	292	0x8800 0x0 0x0 0x2 &ipic 21 0x8
	293	0x8800 0x0 0x0 0x3 &ipic 22 0x8
	294	0x8800 0x0 0x0 0x4 &ipic 23 0x8
1b3c5cda KG	295
1b3c5cda KG	296	/* IDSEL 0x12 */
eedd62ed PG	297	0x9000 0x0 0x0 0x1 &ipic 22 0x8
	298	0x9000 0x0 0x0 0x2 &ipic 23 0x8
	299	0x9000 0x0 0x0 0x3 &ipic 20 0x8
	300	0x9000 0x0 0x0 0x4 &ipic 21 0x8
1b3c5cda KG	301
1b3c5cda KG	302	/* IDSEL 0x13 */
eedd62ed PG	303	0x9800 0x0 0x0 0x1 &ipic 23 0x8
	304	0x9800 0x0 0x0 0x2 &ipic 20 0x8
	305	0x9800 0x0 0x0 0x3 &ipic 21 0x8
	306	0x9800 0x0 0x0 0x4 &ipic 22 0x8
1b3c5cda KG	307
1b3c5cda KG	308	/* IDSEL 0x15 */
eedd62ed PG	309	0xa800 0x0 0x0 0x1 &ipic 20 0x8
	310	0xa800 0x0 0x0 0x2 &ipic 21 0x8
	311	0xa800 0x0 0x0 0x3 &ipic 22 0x8
	312	0xa800 0x0 0x0 0x4 &ipic 23 0x8
1b3c5cda KG	313
1b3c5cda KG	314	/* IDSEL 0x16 */
eedd62ed PG	315	0xb000 0x0 0x0 0x1 &ipic 23 0x8
	316	0xb000 0x0 0x0 0x2 &ipic 20 0x8
	317	0xb000 0x0 0x0 0x3 &ipic 21 0x8
	318	0xb000 0x0 0x0 0x4 &ipic 22 0x8
1b3c5cda KG	319
1b3c5cda KG	320	/* IDSEL 0x17 */
eedd62ed PG	321	0xb800 0x0 0x0 0x1 &ipic 22 0x8
	322	0xb800 0x0 0x0 0x2 &ipic 23 0x8
	323	0xb800 0x0 0x0 0x3 &ipic 20 0x8
	324	0xb800 0x0 0x0 0x4 &ipic 21 0x8
1b3c5cda KG	325
1b3c5cda KG	326	/* IDSEL 0x18 */
eedd62ed PG	327	0xc000 0x0 0x0 0x1 &ipic 21 0x8
	328	0xc000 0x0 0x0 0x2 &ipic 22 0x8
	329	0xc000 0x0 0x0 0x3 &ipic 23 0x8
cda13dd1	330	0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
eedd62ed	331	interrupt-parent = <&ipic>;
cda13dd1	332	interrupts = <66 0x8>;
1b3c5cda	333	bus-range = <0 0>;
eedd62ed PG	334	ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
	335	0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
	336	0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
	337	clock-frequency = <66666666>;
1b3c5cda KG	338	#interrupt-cells = <1>;
	339	#size-cells = <2>;
	340	#address-cells = <3>;
5b70a097 JR	341	reg = <0xe0008500 0x100 /* internal registers */
5b70a097 JR	342	0xe0008300 0x8>; /* config space access registers */
1b3c5cda KG	343	compatible = "fsl,mpc8349-pci";
	344	device_type = "pci";
	345	};
	346
ea082fa9	347	pci1: pci@e0008600 {
eedd62ed	348	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	349	interrupt-map = <
	350
	351	/* IDSEL 0x11 */
eedd62ed PG	352	0x8800 0x0 0x0 0x1 &ipic 20 0x8
	353	0x8800 0x0 0x0 0x2 &ipic 21 0x8
	354	0x8800 0x0 0x0 0x3 &ipic 22 0x8
	355	0x8800 0x0 0x0 0x4 &ipic 23 0x8
1b3c5cda KG	356
1b3c5cda KG	357	/* IDSEL 0x12 */
eedd62ed PG	358	0x9000 0x0 0x0 0x1 &ipic 22 0x8
	359	0x9000 0x0 0x0 0x2 &ipic 23 0x8
	360	0x9000 0x0 0x0 0x3 &ipic 20 0x8
	361	0x9000 0x0 0x0 0x4 &ipic 21 0x8
1b3c5cda KG	362
1b3c5cda KG	363	/* IDSEL 0x13 */
eedd62ed PG	364	0x9800 0x0 0x0 0x1 &ipic 23 0x8
	365	0x9800 0x0 0x0 0x2 &ipic 20 0x8
	366	0x9800 0x0 0x0 0x3 &ipic 21 0x8
	367	0x9800 0x0 0x0 0x4 &ipic 22 0x8
1b3c5cda KG	368
1b3c5cda KG	369	/* IDSEL 0x15 */
eedd62ed PG	370	0xa800 0x0 0x0 0x1 &ipic 20 0x8
	371	0xa800 0x0 0x0 0x2 &ipic 21 0x8
	372	0xa800 0x0 0x0 0x3 &ipic 22 0x8
	373	0xa800 0x0 0x0 0x4 &ipic 23 0x8
1b3c5cda KG	374
1b3c5cda KG	375	/* IDSEL 0x16 */
eedd62ed PG	376	0xb000 0x0 0x0 0x1 &ipic 23 0x8
	377	0xb000 0x0 0x0 0x2 &ipic 20 0x8
	378	0xb000 0x0 0x0 0x3 &ipic 21 0x8
	379	0xb000 0x0 0x0 0x4 &ipic 22 0x8
1b3c5cda KG	380
1b3c5cda KG	381	/* IDSEL 0x17 */
eedd62ed PG	382	0xb800 0x0 0x0 0x1 &ipic 22 0x8
	383	0xb800 0x0 0x0 0x2 &ipic 23 0x8
	384	0xb800 0x0 0x0 0x3 &ipic 20 0x8
	385	0xb800 0x0 0x0 0x4 &ipic 21 0x8
1b3c5cda KG	386
1b3c5cda KG	387	/* IDSEL 0x18 */
eedd62ed PG	388	0xc000 0x0 0x0 0x1 &ipic 21 0x8
	389	0xc000 0x0 0x0 0x2 &ipic 22 0x8
	390	0xc000 0x0 0x0 0x3 &ipic 23 0x8
cda13dd1	391	0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
eedd62ed	392	interrupt-parent = <&ipic>;
b277b025	393	interrupts = <67 0x8>;
1b3c5cda	394	bus-range = <0 0>;
eedd62ed PG	395	ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
	396	0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
	397	0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
	398	clock-frequency = <66666666>;
1b3c5cda KG	399	#interrupt-cells = <1>;
	400	#size-cells = <2>;
	401	#address-cells = <3>;
5b70a097 JR	402	reg = <0xe0008600 0x100 /* internal registers */
5b70a097 JR	403	0xe0008380 0x8>; /* config space access registers */
1b3c5cda KG	404	compatible = "fsl,mpc8349-pci";
	405	device_type = "pci";
	406	};
1b9a93eb	407	};