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powerpc: convert dts-bindings/fsl/dma.txt to dts-v1 syntax
[deliverable/linux.git] / arch / powerpc / boot / dts / mpc8377_rdb.dts
CommitLineData
23dd1cbf
KP		 1/*
2 * MPC8377E RDB Device Tree Source
3 *
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
3b29dade 15 compatible = "fsl,mpc8377rdb";
23dd1cbf
KP		 16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
0585a155
AV		 25 pci1 = &pci1;
26 pci2 = &pci2;
23dd1cbf
KP		 27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,8377@0 {
34 device_type = "cpu";
cda13dd1 35 reg = <0x0>;
23dd1cbf
KP		 36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
41 bus-frequency = <0>;
42 clock-frequency = <0>;
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0x00000000 0x10000000>; // 256MB at 0
49 };
50
51 localbus@e0005000 {
52 #address-cells = <2>;
53 #size-cells = <1>;
54 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
55 reg = <0xe0005000 0x1000>;
cda13dd1 56 interrupts = <77 0x8>;
23dd1cbf
KP		 57 interrupt-parent = <&ipic>;
58
59 // CS0 and CS1 are swapped when
60 // booting from nand, but the
61 // addresses are the same.
cda13dd1
PG		 62 ranges = <0x0 0x0 0xfe000000 0x00800000
63 0x1 0x0 0xe0600000 0x00008000
64 0x2 0x0 0xf0000000 0x00020000
65 0x3 0x0 0xfa000000 0x00008000>;
23dd1cbf
KP		 66
67 flash@0,0 {
68 #address-cells = <1>;
69 #size-cells = <1>;
70 compatible = "cfi-flash";
cda13dd1 71 reg = <0x0 0x0 0x800000>;
23dd1cbf
KP		 72 bank-width = <2>;
73 device-width = <1>;
74 };
75
76 nand@1,0 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "fsl,mpc8377-fcm-nand",
80 "fsl,elbc-fcm-nand";
cda13dd1 81 reg = <0x1 0x0 0x8000>;
23dd1cbf
KP		 82
83 u-boot@0 {
84 reg = <0x0 0x100000>;
85 read-only;
86 };
87
88 kernel@100000 {
89 reg = <0x100000 0x300000>;
90 };
91 fs@400000 {
92 reg = <0x400000 0x1c00000>;
93 };
94 };
95 };
96
97 immr@e0000000 {
98 #address-cells = <1>;
99 #size-cells = <1>;
100 device_type = "soc";
101 compatible = "simple-bus";
cda13dd1 102 ranges = <0x0 0xe0000000 0x00100000>;
23dd1cbf
KP		 103 reg = <0xe0000000 0x00000200>;
104 bus-frequency = <0>;
105
106 wdt@200 {
107 device_type = "watchdog";
108 compatible = "mpc83xx_wdt";
109 reg = <0x200 0x100>;
110 };
111
112 i2c@3000 {
113 #address-cells = <1>;
114 #size-cells = <0>;
115 cell-index = <0>;
116 compatible = "fsl-i2c";
117 reg = <0x3000 0x100>;
cda13dd1
PG		 118 interrupts = <14 0x8>;
119 interrupt-parent = <&ipic>;
23dd1cbf
KP		 120 dfsrr;
121 rtc@68 {
23dd1cbf
KP		 122 compatible = "dallas,ds1339";
123 reg = <0x68>;
124 };
44274698
AV		 125
126 mcu_pio: mcu@a {
127 #gpio-cells = <2>;
128 compatible = "fsl,mc9s08qg8-mpc8377erdb",
129 "fsl,mcu-mpc8349emitx";
130 reg = <0x0a>;
131 gpio-controller;
132 };
23dd1cbf
KP		 133 };
134
135 i2c@3100 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 cell-index = <1>;
139 compatible = "fsl-i2c";
140 reg = <0x3100 0x100>;
cda13dd1
PG		 141 interrupts = <15 0x8>;
142 interrupt-parent = <&ipic>;
23dd1cbf
KP		 143 dfsrr;
144 };
145
146 spi@7000 {
147 cell-index = <0>;
148 compatible = "fsl,spi";
149 reg = <0x7000 0x1000>;
cda13dd1
PG		 150 interrupts = <16 0x8>;
151 interrupt-parent = <&ipic>;
23dd1cbf
KP		 152 mode = "cpu";
153 };
154
dee80553
KG		 155 dma@82a8 {
156 #address-cells = <1>;
157 #size-cells = <1>;
158 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
159 reg = <0x82a8 4>;
160 ranges = <0 0x8100 0x1a8>;
161 interrupt-parent = <&ipic>;
162 interrupts = <71 8>;
163 cell-index = <0>;
164 dma-channel@0 {
165 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
166 reg = <0 0x80>;
aeb42762 167 cell-index = <0>;
dee80553
KG		 168 interrupt-parent = <&ipic>;
169 interrupts = <71 8>;
170 };
171 dma-channel@80 {
172 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
173 reg = <0x80 0x80>;
aeb42762 174 cell-index = <1>;
dee80553
KG		 175 interrupt-parent = <&ipic>;
176 interrupts = <71 8>;
177 };
178 dma-channel@100 {
179 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
180 reg = <0x100 0x80>;
aeb42762 181 cell-index = <2>;
dee80553
KG		 182 interrupt-parent = <&ipic>;
183 interrupts = <71 8>;
184 };
185 dma-channel@180 {
186 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
187 reg = <0x180 0x28>;
aeb42762 188 cell-index = <3>;
dee80553
KG		 189 interrupt-parent = <&ipic>;
190 interrupts = <71 8>;
191 };
192 };
193
23dd1cbf
KP		 194 usb@23000 {
195 compatible = "fsl-usb2-dr";
196 reg = <0x23000 0x1000>;
197 #address-cells = <1>;
198 #size-cells = <0>;
cda13dd1
PG		 199 interrupt-parent = <&ipic>;
200 interrupts = <38 0x8>;
8e8ff3a3 201 phy_type = "ulpi";
23dd1cbf
KP		 202 };
203
204 mdio@24520 {
205 #address-cells = <1>;
206 #size-cells = <0>;
207 compatible = "fsl,gianfar-mdio";
208 reg = <0x24520 0x20>;
209 phy2: ethernet-phy@2 {
cda13dd1
PG		 210 interrupt-parent = <&ipic>;
211 interrupts = <17 0x8>;
212 reg = <0x2>;
23dd1cbf
KP		 213 device_type = "ethernet-phy";
214 };
b31a1d8b
AF		 215 tbi0: tbi-phy@11 {
216 reg = <0x11>;
217 device_type = "tbi-phy";
218 };
219 };
220
221 mdio@25520 {
222 #address-cells = <1>;
223 #size-cells = <0>;
224 compatible = "fsl,gianfar-tbi";
225 reg = <0x25520 0x20>;
226
227 tbi1: tbi-phy@11 {
228 reg = <0x11>;
229 device_type = "tbi-phy";
230 };
23dd1cbf
KP		 231 };
232
b31a1d8b 233
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KP		 234 enet0: ethernet@24000 {
235 cell-index = <0>;
236 device_type = "network";
237 model = "eTSEC";
238 compatible = "gianfar";
239 reg = <0x24000 0x1000>;
240 local-mac-address = [ 00 00 00 00 00 00 ];
cda13dd1 241 interrupts = <32 0x8 33 0x8 34 0x8>;
23dd1cbf 242 phy-connection-type = "mii";
cda13dd1 243 interrupt-parent = <&ipic>;
b31a1d8b 244 tbi-handle = <&tbi0>;
cda13dd1 245 phy-handle = <&phy2>;
23dd1cbf
KP		 246 };
247
248 enet1: ethernet@25000 {
249 cell-index = <1>;
250 device_type = "network";
251 model = "eTSEC";
252 compatible = "gianfar";
253 reg = <0x25000 0x1000>;
254 local-mac-address = [ 00 00 00 00 00 00 ];
cda13dd1 255 interrupts = <35 0x8 36 0x8 37 0x8>;
23dd1cbf 256 phy-connection-type = "mii";
cda13dd1 257 interrupt-parent = <&ipic>;
f17c6323 258 fixed-link = <1 1 1000 0 0>;
b31a1d8b 259 tbi-handle = <&tbi1>;
23dd1cbf
KP		 260 };
261
262 serial0: serial@4500 {
263 cell-index = <0>;
264 device_type = "serial";
265 compatible = "ns16550";
266 reg = <0x4500 0x100>;
267 clock-frequency = <0>;
cda13dd1
PG		 268 interrupts = <9 0x8>;
269 interrupt-parent = <&ipic>;
23dd1cbf
KP		 270 };
271
272 serial1: serial@4600 {
273 cell-index = <1>;
274 device_type = "serial";
275 compatible = "ns16550";
276 reg = <0x4600 0x100>;
277 clock-frequency = <0>;
cda13dd1
PG		 278 interrupts = <10 0x8>;
279 interrupt-parent = <&ipic>;
23dd1cbf
KP		 280 };
281
282 crypto@30000 {
3fd44736
KP		 283 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
284 "fsl,sec2.1", "fsl,sec2.0";
23dd1cbf 285 reg = <0x30000 0x10000>;
cda13dd1
PG		 286 interrupts = <11 0x8>;
287 interrupt-parent = <&ipic>;
3fd44736
KP		 288 fsl,num-channels = <4>;
289 fsl,channel-fifo-len = <24>;
290 fsl,exec-units-mask = <0x9fe>;
291 fsl,descriptor-types-mask = <0x3ab0ebf>;
23dd1cbf
KP		 292 };
293
294 sata@18000 {
295 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
296 reg = <0x18000 0x1000>;
cda13dd1
PG		 297 interrupts = <44 0x8>;
298 interrupt-parent = <&ipic>;
23dd1cbf
KP		 299 };
300
301 sata@19000 {
302 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
303 reg = <0x19000 0x1000>;
cda13dd1
PG		 304 interrupts = <45 0x8>;
305 interrupt-parent = <&ipic>;
23dd1cbf
KP		 306 };
307
308 /* IPIC
309 * interrupts cell = <intr #, sense>
310 * sense values match linux IORESOURCE_IRQ_* defines:
311 * sense == 8: Level, low assertion
312 * sense == 2: Edge, high-to-low change
313 */
314 ipic: interrupt-controller@700 {
315 compatible = "fsl,ipic";
316 interrupt-controller;
317 #address-cells = <0>;
318 #interrupt-cells = <2>;
319 reg = <0x700 0x100>;
320 };
321 };
322
323 pci0: pci@e0008500 {
324 interrupt-map-mask = <0xf800 0 0 7>;
325 interrupt-map = <
326 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
327
328 /* IDSEL AD14 IRQ6 inta */
cda13dd1 329 0x7000 0x0 0x0 0x1 &ipic 22 0x8
23dd1cbf
KP		 330
331 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
cda13dd1
PG		 332 0x7800 0x0 0x0 0x1 &ipic 21 0x8
333 0x7800 0x0 0x0 0x2 &ipic 22 0x8
334 0x7800 0x0 0x0 0x4 &ipic 23 0x8
23dd1cbf
KP		 335
336 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
cda13dd1
PG		 337 0xE000 0x0 0x0 0x1 &ipic 23 0x8
338 0xE000 0x0 0x0 0x2 &ipic 21 0x8
339 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
340 interrupt-parent = <&ipic>;
341 interrupts = <66 0x8>;
23dd1cbf 342 bus-range = <0 0>;
cda13dd1
PG		 343 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
344 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
345 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
23dd1cbf
KP		 346 clock-frequency = <66666666>;
347 #interrupt-cells = <1>;
348 #size-cells = <2>;
349 #address-cells = <3>;
5b70a097
JR		 350 reg = <0xe0008500 0x100 /* internal registers */
351 0xe0008300 0x8>; /* config space access registers */
23dd1cbf
KP		 352 compatible = "fsl,mpc8349-pci";
353 device_type = "pci";
354 };
0585a155
AV		 355
356 pci1: pcie@e0009000 {
357 #address-cells = <3>;
358 #size-cells = <2>;
359 #interrupt-cells = <1>;
360 device_type = "pci";
361 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
362 reg = <0xe0009000 0x00001000>;
363 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
364 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
365 bus-range = <0 255>;
366 interrupt-map-mask = <0xf800 0 0 7>;
367 interrupt-map = <0 0 0 1 &ipic 1 8
368 0 0 0 2 &ipic 1 8
369 0 0 0 3 &ipic 1 8
370 0 0 0 4 &ipic 1 8>;
371 clock-frequency = <0>;
372
373 pcie@0 {
374 #address-cells = <3>;
375 #size-cells = <2>;
376 device_type = "pci";
377 reg = <0 0 0 0 0>;
378 ranges = <0x02000000 0 0xa8000000
379 0x02000000 0 0xa8000000
380 0 0x10000000
381 0x01000000 0 0x00000000
382 0x01000000 0 0x00000000
383 0 0x00800000>;
384 };
385 };
386
387 pci2: pcie@e000a000 {
388 #address-cells = <3>;
389 #size-cells = <2>;
390 #interrupt-cells = <1>;
391 device_type = "pci";
392 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
393 reg = <0xe000a000 0x00001000>;
394 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
395 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
396 bus-range = <0 255>;
397 interrupt-map-mask = <0xf800 0 0 7>;
398 interrupt-map = <0 0 0 1 &ipic 2 8
399 0 0 0 2 &ipic 2 8
400 0 0 0 3 &ipic 2 8
401 0 0 0 4 &ipic 2 8>;
402 clock-frequency = <0>;
403
404 pcie@0 {
405 #address-cells = <3>;
406 #size-cells = <2>;
407 device_type = "pci";
408 reg = <0 0 0 0 0>;
409 ranges = <0x02000000 0 0xc8000000
410 0x02000000 0 0xc8000000
411 0 0x10000000
412 0x01000000 0 0x00000000
413 0x01000000 0 0x00000000
414 0 0x00800000>;
415 };
416 };
23dd1cbf 417};
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