[deliverable/linux.git] / arch / powerpc / boot / dts / mpc8560ads.dts

/*
 * MPC8560 ADS Device Tree Source
 *
 * Copyright 2006, 2008 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/include/ "fsl/e500v2_power_isa.dtsi"

/ {
	model = "MPC8560ADS";
	compatible = "MPC8560ADS", "MPC85xxADS";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8560@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x8000>;		// L1, 32K
			i-cache-size = <0x8000>;		// L1, 32K
			timebase-frequency = <82500000>;
			bus-frequency = <330000000>;
			clock-frequency = <825000000>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x10000000>;
	};

	soc8560@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x0 0xe0000000 0x100000>;
		bus-frequency = <330000000>;

		ecm-law@0 {
			compatible = "fsl,ecm-law";
			reg = <0x0 0x1000>;
			fsl,num-laws = <8>;
		};

		ecm@1000 {
			compatible = "fsl,mpc8560-ecm", "fsl,ecm";
			reg = <0x1000 0x1000>;
			interrupts = <17 2>;
			interrupt-parent = <&mpic>;
		};

		memory-controller@2000 {
			compatible = "fsl,mpc8540-memory-controller";
			reg = <0x2000 0x1000>;
			interrupt-parent = <&mpic>;
			interrupts = <18 2>;
		};

		L2: l2-cache-controller@20000 {
			compatible = "fsl,mpc8540-l2-cache-controller";
			reg = <0x20000 0x1000>;
			cache-line-size = <32>;	// 32 bytes
			cache-size = <0x40000>;	// L2, 256K
			interrupt-parent = <&mpic>;
			interrupts = <16 2>;
		};

		dma@21300 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
			reg = <0x21300 0x4>;
			ranges = <0x0 0x21100 0x200>;
			cell-index = <0>;
			dma-channel@0 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x0 0x80>;
				cell-index = <0>;
				interrupt-parent = <&mpic>;
				interrupts = <20 2>;
			};
			dma-channel@80 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x80 0x80>;
				cell-index = <1>;
				interrupt-parent = <&mpic>;
				interrupts = <21 2>;
			};
			dma-channel@100 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x100 0x80>;
				cell-index = <2>;
				interrupt-parent = <&mpic>;
				interrupts = <22 2>;
			};
			dma-channel@180 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x180 0x80>;
				cell-index = <3>;
				interrupt-parent = <&mpic>;
				interrupts = <23 2>;
			};
		};

		enet0: ethernet@24000 {
			#address-cells = <1>;
			#size-cells = <1>;
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			ranges = <0x0 0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <29 2 30 2 34 2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi0>;
			phy-handle = <&phy0>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-mdio";
				reg = <0x520 0x20>;

				phy0: ethernet-phy@0 {
					interrupt-parent = <&mpic>;
					interrupts = <5 1>;
					reg = <0x0>;
				};
				phy1: ethernet-phy@1 {
					interrupt-parent = <&mpic>;
					interrupts = <5 1>;
					reg = <0x1>;
				};
				phy2: ethernet-phy@2 {
					interrupt-parent = <&mpic>;
					interrupts = <7 1>;
					reg = <0x2>;
				};
				phy3: ethernet-phy@3 {
					interrupt-parent = <&mpic>;
					interrupts = <7 1>;
					reg = <0x3>;
				};
				tbi0: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		enet1: ethernet@25000 {
			#address-cells = <1>;
			#size-cells = <1>;
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			ranges = <0x0 0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 2 36 2 40 2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi1>;
			phy-handle = <&phy1>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-tbi";
				reg = <0x520 0x20>;

				tbi1: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		mpic: pic@40000 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x40000 0x40000>;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
		};

		cpm@919c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
			reg = <0x919c0 0x30>;
			ranges;

			muram@80000 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x80000 0x10000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0x0 0x4000 0x9000 0x2000>;
				};
			};

			brg@919f0 {
				compatible = "fsl,mpc8560-brg",
				             "fsl,cpm2-brg",
				             "fsl,cpm-brg";
				reg = <0x919f0 0x10 0x915f0 0x10>;
				clock-frequency = <165000000>;
			};

			cpmpic: pic@90c00 {
				interrupt-controller;
				#address-cells = <0>;
				#interrupt-cells = <2>;
				interrupts = <46 2>;
				interrupt-parent = <&mpic>;
				reg = <0x90c00 0x80>;
				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
			};

			serial0: serial@91a00 {
				device_type = "serial";
				compatible = "fsl,mpc8560-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x91a00 0x20 0x88000 0x100>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <0x800000>;
				current-speed = <115200>;
				interrupts = <40 8>;
				interrupt-parent = <&cpmpic>;
			};

			serial1: serial@91a20 {
				device_type = "serial";
				compatible = "fsl,mpc8560-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x91a20 0x20 0x88100 0x100>;
				fsl,cpm-brg = <2>;
				fsl,cpm-command = <0x4a00000>;
				current-speed = <115200>;
				interrupts = <41 8>;
				interrupt-parent = <&cpmpic>;
			};

			enet2: ethernet@91320 {
				device_type = "network";
				compatible = "fsl,mpc8560-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
				fsl,cpm-command = <0x16200300>;
				interrupts = <33 8>;
				interrupt-parent = <&cpmpic>;
				phy-handle = <&phy2>;
			};

			enet3: ethernet@91340 {
				device_type = "network";
				compatible = "fsl,mpc8560-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
				fsl,cpm-command = <0x1a400300>;
				interrupts = <34 8>;
				interrupt-parent = <&cpmpic>;
				phy-handle = <&phy3>;
			};
		};
	};

	pci0: pci@e0008000 {
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
		device_type = "pci";
		reg = <0xe0008000 0x1000>;
		clock-frequency = <66666666>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <

				/* IDSEL 0x2 */
				 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 0x3 */
				 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 0x4 */
				 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 0x5  */
				 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1

				/* IDSEL 12 */
				 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 13 */
				 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 14*/
				 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 15 */
				 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1

				/* IDSEL 18 */
				 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 19 */
				 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 20 */
				 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 21 */
				 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;

		interrupt-parent = <&mpic>;
		interrupts = <24 2>;
		bus-range = <0 0>;
		ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
	};
};
Commit	Line	Data
902f392d VB	1	/*
	2	* MPC8560 ADS Device Tree Source
	3	*
32f960e9	4	* Copyright 2006, 2008 Freescale Semiconductor Inc.
902f392d VB	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
32f960e9	12	/dts-v1/;
902f392d	13
2eb28006 OY	14	/include/ "fsl/e500v2_power_isa.dtsi"
2eb28006 OY	15
902f392d VB	16	/ {
902f392d VB	17	model = "MPC8560ADS";
52094879	18	compatible = "MPC8560ADS", "MPC85xxADS";
902f392d VB	19	#address-cells = <1>;
902f392d VB	20	#size-cells = <1>;
902f392d	21
ea082fa9 KG	22	aliases {
	23	ethernet0 = &enet0;
	24	ethernet1 = &enet1;
	25	ethernet2 = &enet2;
	26	ethernet3 = &enet3;
	27	serial0 = &serial0;
	28	serial1 = &serial1;
	29	pci0 = &pci0;
	30	};
	31
902f392d	32	cpus {
902f392d VB	33	#address-cells = <1>;
902f392d VB	34	#size-cells = <0>;
902f392d VB	35
	36	PowerPC,8560@0 {
	37	device_type = "cpu";
32f960e9 KG	38	reg = <0x0>;
	39	d-cache-line-size = <32>; // 32 bytes
	40	i-cache-line-size = <32>; // 32 bytes
	41	d-cache-size = <0x8000>; // L1, 32K
	42	i-cache-size = <0x8000>; // L1, 32K
	43	timebase-frequency = <82500000>;
	44	bus-frequency = <330000000>;
	45	clock-frequency = <825000000>;
902f392d VB	46	};
	47	};
	48
	49	memory {
	50	device_type = "memory";
32f960e9	51	reg = <0x0 0x10000000>;
902f392d VB	52	};
	53
	54	soc8560@e0000000 {
	55	#address-cells = <1>;
	56	#size-cells = <1>;
902f392d	57	device_type = "soc";
cf0d19fb	58	compatible = "simple-bus";
32f960e9	59	ranges = <0x0 0xe0000000 0x100000>;
32f960e9	60	bus-frequency = <330000000>;
902f392d	61
e1a22897 KG	62	ecm-law@0 {
	63	compatible = "fsl,ecm-law";
	64	reg = <0x0 0x1000>;
	65	fsl,num-laws = <8>;
	66	};
	67
	68	ecm@1000 {
	69	compatible = "fsl,mpc8560-ecm", "fsl,ecm";
	70	reg = <0x1000 0x1000>;
	71	interrupts = <17 2>;
	72	interrupt-parent = <&mpic>;
	73	};
	74
50cf6707	75	memory-controller@2000 {
8a4ab218	76	compatible = "fsl,mpc8540-memory-controller";
32f960e9	77	reg = <0x2000 0x1000>;
50cf6707	78	interrupt-parent = <&mpic>;
32f960e9	79	interrupts = <18 2>;
50cf6707 DJ	80	};
50cf6707 DJ	81
c054065b	82	L2: l2-cache-controller@20000 {
8a4ab218	83	compatible = "fsl,mpc8540-l2-cache-controller";
32f960e9 KG	84	reg = <0x20000 0x1000>;
	85	cache-line-size = <32>; // 32 bytes
	86	cache-size = <0x40000>; // L2, 256K
50cf6707	87	interrupt-parent = <&mpic>;
32f960e9	88	interrupts = <16 2>;
50cf6707 DJ	89	};
50cf6707 DJ	90
dee80553 KG	91	dma@21300 {
	92	#address-cells = <1>;
	93	#size-cells = <1>;
	94	compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
	95	reg = <0x21300 0x4>;
	96	ranges = <0x0 0x21100 0x200>;
	97	cell-index = <0>;
	98	dma-channel@0 {
	99	compatible = "fsl,mpc8560-dma-channel",
	100	"fsl,eloplus-dma-channel";
	101	reg = <0x0 0x80>;
	102	cell-index = <0>;
	103	interrupt-parent = <&mpic>;
	104	interrupts = <20 2>;
	105	};
	106	dma-channel@80 {
	107	compatible = "fsl,mpc8560-dma-channel",
	108	"fsl,eloplus-dma-channel";
	109	reg = <0x80 0x80>;
	110	cell-index = <1>;
	111	interrupt-parent = <&mpic>;
	112	interrupts = <21 2>;
	113	};
	114	dma-channel@100 {
	115	compatible = "fsl,mpc8560-dma-channel",
	116	"fsl,eloplus-dma-channel";
	117	reg = <0x100 0x80>;
	118	cell-index = <2>;
	119	interrupt-parent = <&mpic>;
	120	interrupts = <22 2>;
	121	};
	122	dma-channel@180 {
	123	compatible = "fsl,mpc8560-dma-channel",
	124	"fsl,eloplus-dma-channel";
	125	reg = <0x180 0x80>;
	126	cell-index = <3>;
	127	interrupt-parent = <&mpic>;
	128	interrupts = <23 2>;
	129	};
	130	};
	131
e77b28eb	132	enet0: ethernet@24000 {
84ba4a58 AV	133	#address-cells = <1>;
84ba4a58 AV	134	#size-cells = <1>;
e77b28eb	135	cell-index = <0>;
902f392d VB	136	device_type = "network";
	137	model = "TSEC";
	138	compatible = "gianfar";
32f960e9	139	reg = <0x24000 0x1000>;
84ba4a58	140	ranges = <0x0 0x24000 0x1000>;
eae98266	141	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9	142	interrupts = <29 2 30 2 34 2>;
52094879	143	interrupt-parent = <&mpic>;
b31a1d8b	144	tbi-handle = <&tbi0>;
52094879	145	phy-handle = <&phy0>;
84ba4a58 AV	146
	147	mdio@520 {
	148	#address-cells = <1>;
	149	#size-cells = <0>;
	150	compatible = "fsl,gianfar-mdio";
	151	reg = <0x520 0x20>;
	152
	153	phy0: ethernet-phy@0 {
	154	interrupt-parent = <&mpic>;
	155	interrupts = <5 1>;
	156	reg = <0x0>;
84ba4a58 AV	157	};
	158	phy1: ethernet-phy@1 {
	159	interrupt-parent = <&mpic>;
	160	interrupts = <5 1>;
	161	reg = <0x1>;
84ba4a58 AV	162	};
	163	phy2: ethernet-phy@2 {
	164	interrupt-parent = <&mpic>;
	165	interrupts = <7 1>;
	166	reg = <0x2>;
84ba4a58 AV	167	};
	168	phy3: ethernet-phy@3 {
	169	interrupt-parent = <&mpic>;
	170	interrupts = <7 1>;
	171	reg = <0x3>;
84ba4a58 AV	172	};
	173	tbi0: tbi-phy@11 {
	174	reg = <0x11>;
	175	device_type = "tbi-phy";
	176	};
	177	};
902f392d VB	178	};
902f392d VB	179
e77b28eb	180	enet1: ethernet@25000 {
84ba4a58 AV	181	#address-cells = <1>;
84ba4a58 AV	182	#size-cells = <1>;
e77b28eb	183	cell-index = <1>;
902f392d VB	184	device_type = "network";
	185	model = "TSEC";
	186	compatible = "gianfar";
32f960e9	187	reg = <0x25000 0x1000>;
84ba4a58	188	ranges = <0x0 0x25000 0x1000>;
eae98266	189	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9	190	interrupts = <35 2 36 2 40 2>;
52094879	191	interrupt-parent = <&mpic>;
b31a1d8b	192	tbi-handle = <&tbi1>;
52094879	193	phy-handle = <&phy1>;
84ba4a58 AV	194
	195	mdio@520 {
	196	#address-cells = <1>;
	197	#size-cells = <0>;
	198	compatible = "fsl,gianfar-tbi";
	199	reg = <0x520 0x20>;
	200
	201	tbi1: tbi-phy@11 {
	202	reg = <0x11>;
	203	device_type = "tbi-phy";
	204	};
	205	};
902f392d VB	206	};
902f392d VB	207
52094879	208	mpic: pic@40000 {
902f392d VB	209	interrupt-controller;
	210	#address-cells = <0>;
	211	#interrupt-cells = <2>;
32f960e9	212	reg = <0x40000 0x40000>;
acd4b715	213	compatible = "chrp,open-pic";
902f392d VB	214	device_type = "open-pic";
	215	};
	216
8abc8f5f	217	cpm@919c0 {
902f392d VB	218	#address-cells = <1>;
902f392d VB	219	#size-cells = <1>;
8abc8f5f	220	compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
32f960e9	221	reg = <0x919c0 0x30>;
8abc8f5f SW	222	ranges;
	223
	224	muram@80000 {
	225	#address-cells = <1>;
	226	#size-cells = <1>;
32f960e9	227	ranges = <0x0 0x80000 0x10000>;
8abc8f5f SW	228
	229	data@0 {
	230	compatible = "fsl,cpm-muram-data";
32f960e9	231	reg = <0x0 0x4000 0x9000 0x2000>;
8abc8f5f SW	232	};
	233	};
	234
	235	brg@919f0 {
	236	compatible = "fsl,mpc8560-brg",
	237	"fsl,cpm2-brg",
	238	"fsl,cpm-brg";
32f960e9 KG	239	reg = <0x919f0 0x10 0x915f0 0x10>;
32f960e9 KG	240	clock-frequency = <165000000>;
8abc8f5f	241	};
902f392d	242
52094879	243	cpmpic: pic@90c00 {
902f392d VB	244	interrupt-controller;
	245	#address-cells = <0>;
	246	#interrupt-cells = <2>;
32f960e9	247	interrupts = <46 2>;
52094879	248	interrupt-parent = <&mpic>;
32f960e9	249	reg = <0x90c00 0x80>;
8abc8f5f	250	compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
902f392d VB	251	};
902f392d VB	252
ea082fa9	253	serial0: serial@91a00 {
902f392d	254	device_type = "serial";
8abc8f5f SW	255	compatible = "fsl,mpc8560-scc-uart",
8abc8f5f SW	256	"fsl,cpm2-scc-uart";
32f960e9	257	reg = <0x91a00 0x20 0x88000 0x100>;
8abc8f5f	258	fsl,cpm-brg = <1>;
32f960e9 KG	259	fsl,cpm-command = <0x800000>;
	260	current-speed = <115200>;
	261	interrupts = <40 8>;
52094879	262	interrupt-parent = <&cpmpic>;
902f392d VB	263	};
902f392d VB	264
ea082fa9	265	serial1: serial@91a20 {
902f392d	266	device_type = "serial";
8abc8f5f SW	267	compatible = "fsl,mpc8560-scc-uart",
8abc8f5f SW	268	"fsl,cpm2-scc-uart";
32f960e9	269	reg = <0x91a20 0x20 0x88100 0x100>;
8abc8f5f	270	fsl,cpm-brg = <2>;
32f960e9 KG	271	fsl,cpm-command = <0x4a00000>;
	272	current-speed = <115200>;
	273	interrupts = <41 8>;
52094879	274	interrupt-parent = <&cpmpic>;
902f392d VB	275	};
902f392d VB	276
e77b28eb	277	enet2: ethernet@91320 {
902f392d	278	device_type = "network";
8abc8f5f SW	279	compatible = "fsl,mpc8560-fcc-enet",
8abc8f5f SW	280	"fsl,cpm2-fcc-enet";
32f960e9	281	reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
eae98266	282	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9 KG	283	fsl,cpm-command = <0x16200300>;
32f960e9 KG	284	interrupts = <33 8>;
52094879 KG	285	interrupt-parent = <&cpmpic>;
52094879 KG	286	phy-handle = <&phy2>;
902f392d VB	287	};
902f392d VB	288
e77b28eb	289	enet3: ethernet@91340 {
902f392d	290	device_type = "network";
8abc8f5f SW	291	compatible = "fsl,mpc8560-fcc-enet",
8abc8f5f SW	292	"fsl,cpm2-fcc-enet";
32f960e9	293	reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
eae98266	294	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9 KG	295	fsl,cpm-command = <0x1a400300>;
32f960e9 KG	296	interrupts = <34 8>;
52094879 KG	297	interrupt-parent = <&cpmpic>;
52094879 KG	298	phy-handle = <&phy3>;
902f392d VB	299	};
	300	};
	301	};
1b3c5cda	302
ea082fa9	303	pci0: pci@e0008000 {
1b3c5cda KG	304	#interrupt-cells = <1>;
	305	#size-cells = <2>;
	306	#address-cells = <3>;
	307	compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
	308	device_type = "pci";
32f960e9 KG	309	reg = <0xe0008000 0x1000>;
	310	clock-frequency = <66666666>;
	311	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	312	interrupt-map = <
	313
	314	/* IDSEL 0x2 */
32f960e9 KG	315	0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
	316	0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
	317	0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
	318	0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	319
1b3c5cda KG	320	/* IDSEL 0x3 */
32f960e9 KG	321	0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
	322	0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
	323	0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
	324	0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	325
1b3c5cda KG	326	/* IDSEL 0x4 */
32f960e9 KG	327	0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
	328	0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
	329	0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
	330	0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	331
1b3c5cda KG	332	/* IDSEL 0x5 */
32f960e9 KG	333	0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
	334	0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
	335	0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
	336	0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
1b3c5cda KG	337
1b3c5cda KG	338	/* IDSEL 12 */
32f960e9 KG	339	0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
	340	0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
	341	0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
	342	0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	343
1b3c5cda KG	344	/* IDSEL 13 */
32f960e9 KG	345	0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
	346	0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
	347	0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
	348	0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	349
1b3c5cda KG	350	/* IDSEL 14*/
32f960e9 KG	351	0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
	352	0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
	353	0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
	354	0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	355
1b3c5cda KG	356	/* IDSEL 15 */
32f960e9 KG	357	0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
	358	0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
	359	0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
	360	0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
1b3c5cda KG	361
1b3c5cda KG	362	/* IDSEL 18 */
32f960e9 KG	363	0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
	364	0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
	365	0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
	366	0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	367
1b3c5cda KG	368	/* IDSEL 19 */
32f960e9 KG	369	0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
	370	0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
	371	0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
	372	0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	373
1b3c5cda KG	374	/* IDSEL 20 */
32f960e9 KG	375	0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
	376	0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
	377	0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
	378	0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	379
1b3c5cda KG	380	/* IDSEL 21 */
32f960e9 KG	381	0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
	382	0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
	383	0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
	384	0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
1b3c5cda KG	385
1b3c5cda KG	386	interrupt-parent = <&mpic>;
32f960e9	387	interrupts = <24 2>;
1b3c5cda	388	bus-range = <0 0>;
32f960e9 KG	389	ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
32f960e9 KG	390	0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
1b3c5cda	391	};
902f392d	392	};