[deliverable/linux.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts

/*
 * MPC8641 HPCN Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "MPC8641HPCN";
	compatible = "fsl,mpc8641hpcn";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
		pci1 = &pci1;
		rapidio0 = &rapidio0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8641@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;		// L1
			i-cache-size = <32768>;		// L1
			timebase-frequency = <0>;	// From uboot
			bus-frequency = <0>;		// From uboot
			clock-frequency = <0>;		// From uboot
		};
		PowerPC,8641@1 {
			device_type = "cpu";
			reg = <1>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;
			i-cache-size = <32768>;
			timebase-frequency = <0>;	// From uboot
			bus-frequency = <0>;		// From uboot
			clock-frequency = <0>;		// From uboot
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x40000000>;	// 1G at 0x0
	};

	localbus@f8005000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8641-localbus", "simple-bus";
		reg = <0xf8005000 0x1000>;
		interrupts = <19 2>;
		interrupt-parent = <&mpic>;

		ranges = <0 0 0xff800000 0x00800000
			  1 0 0xfe000000 0x01000000
			  2 0 0xf8200000 0x00100000
			  3 0 0xf8100000 0x00100000>;

		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0 0 0x00800000>;
			bank-width = <2>;
			device-width = <2>;
			#address-cells = <1>;
			#size-cells = <1>;
			partition@0 {
				label = "kernel";
				reg = <0x00000000 0x00300000>;
			};
			partition@300000 {
				label = "firmware b";
				reg = <0x00300000 0x00100000>;
				read-only;
			};
			partition@400000 {
				label = "fs";
				reg = <0x00400000 0x00300000>;
			};
			partition@700000 {
				label = "firmware a";
				reg = <0x00700000 0x00100000>;
				read-only;
			};
		};
	};

	soc8641@f8000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x00000000 0xf8000000 0x00100000>;
		reg = <0xf8000000 0x00001000>;	// CCSRBAR
		bus-frequency = <0>;

		i2c@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <0x3000 0x100>;
			interrupts = <43 2>;
			interrupt-parent = <&mpic>;
			dfsrr;
		};

		i2c@3100 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <1>;
			compatible = "fsl-i2c";
			reg = <0x3100 0x100>;
			interrupts = <43 2>;
			interrupt-parent = <&mpic>;
			dfsrr;
		};

		dma@21300 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
			reg = <0x21300 0x4>;
			ranges = <0x0 0x21100 0x200>;
			cell-index = <0>;
			dma-channel@0 {
				compatible = "fsl,mpc8641-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x0 0x80>;
				cell-index = <0>;
				interrupt-parent = <&mpic>;
				interrupts = <20 2>;
			};
			dma-channel@80 {
				compatible = "fsl,mpc8641-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x80 0x80>;
				cell-index = <1>;
				interrupt-parent = <&mpic>;
				interrupts = <21 2>;
			};
			dma-channel@100 {
				compatible = "fsl,mpc8641-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x100 0x80>;
				cell-index = <2>;
				interrupt-parent = <&mpic>;
				interrupts = <22 2>;
			};
			dma-channel@180 {
				compatible = "fsl,mpc8641-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x180 0x80>;
				cell-index = <3>;
				interrupt-parent = <&mpic>;
				interrupts = <23 2>;
			};
		};

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-mdio";
			reg = <0x24520 0x20>;

			phy0: ethernet-phy@0 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <0>;
				device_type = "ethernet-phy";
			};
			phy1: ethernet-phy@1 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <1>;
				device_type = "ethernet-phy";
			};
			phy2: ethernet-phy@2 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <2>;
				device_type = "ethernet-phy";
			};
			phy3: ethernet-phy@3 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <3>;
				device_type = "ethernet-phy";
			};
		};

		enet0: ethernet@24000 {
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <29 2 30  2 34 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy0>;
			phy-connection-type = "rgmii-id";
		};

		enet1: ethernet@25000 {
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 2 36 2 40 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy1>;
			phy-connection-type = "rgmii-id";
		};
		
		enet2: ethernet@26000 {
			cell-index = <2>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x26000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <31 2 32 2 33 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy2>;
			phy-connection-type = "rgmii-id";
		};

		enet3: ethernet@27000 {
			cell-index = <3>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x27000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <37 2 38 2 39 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy3>;
			phy-connection-type = "rgmii-id";
		};

		serial0: serial@4500 {
			cell-index = <0>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4500 0x100>;
			clock-frequency = <0>;
			interrupts = <42 2>;
			interrupt-parent = <&mpic>;
		};

		serial1: serial@4600 {
			cell-index = <1>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4600 0x100>;
			clock-frequency = <0>;
			interrupts = <28 2>;
			interrupt-parent = <&mpic>;
		};

		mpic: pic@40000 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x40000 0x40000>;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
		};

		global-utilities@e0000 {
			compatible = "fsl,mpc8641-guts";
			reg = <0xe0000 0x1000>;
			fsl,has-rstcr;
		};
	};

	pci0: pcie@f8008000 {
		cell-index = <0>;
		compatible = "fsl,mpc8641-pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xf8008000 0x1000>;
		bus-range = <0x0 0xff>;
		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
		clock-frequency = <33333333>;
		interrupt-parent = <&mpic>;
		interrupts = <24 2>;
		interrupt-map-mask = <0xff00 0 0 7>;
		interrupt-map = <
			/* IDSEL 0x11 func 0 - PCI slot 1 */
			0x8800 0 0 1 &mpic 2 1
			0x8800 0 0 2 &mpic 3 1
			0x8800 0 0 3 &mpic 4 1
			0x8800 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 1 - PCI slot 1 */
			0x8900 0 0 1 &mpic 2 1
			0x8900 0 0 2 &mpic 3 1
			0x8900 0 0 3 &mpic 4 1
			0x8900 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 2 - PCI slot 1 */
			0x8a00 0 0 1 &mpic 2 1
			0x8a00 0 0 2 &mpic 3 1
			0x8a00 0 0 3 &mpic 4 1
			0x8a00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 3 - PCI slot 1 */
			0x8b00 0 0 1 &mpic 2 1
			0x8b00 0 0 2 &mpic 3 1
			0x8b00 0 0 3 &mpic 4 1
			0x8b00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 4 - PCI slot 1 */
			0x8c00 0 0 1 &mpic 2 1
			0x8c00 0 0 2 &mpic 3 1
			0x8c00 0 0 3 &mpic 4 1
			0x8c00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 5 - PCI slot 1 */
			0x8d00 0 0 1 &mpic 2 1
			0x8d00 0 0 2 &mpic 3 1
			0x8d00 0 0 3 &mpic 4 1
			0x8d00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 6 - PCI slot 1 */
			0x8e00 0 0 1 &mpic 2 1
			0x8e00 0 0 2 &mpic 3 1
			0x8e00 0 0 3 &mpic 4 1
			0x8e00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 7 - PCI slot 1 */
			0x8f00 0 0 1 &mpic 2 1
			0x8f00 0 0 2 &mpic 3 1
			0x8f00 0 0 3 &mpic 4 1
			0x8f00 0 0 4 &mpic 1 1

			/* IDSEL 0x12 func 0 - PCI slot 2 */
			0x9000 0 0 1 &mpic 3 1
			0x9000 0 0 2 &mpic 4 1
			0x9000 0 0 3 &mpic 1 1
			0x9000 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 1 - PCI slot 2 */
			0x9100 0 0 1 &mpic 3 1
			0x9100 0 0 2 &mpic 4 1
			0x9100 0 0 3 &mpic 1 1
			0x9100 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 2 - PCI slot 2 */
			0x9200 0 0 1 &mpic 3 1
			0x9200 0 0 2 &mpic 4 1
			0x9200 0 0 3 &mpic 1 1
			0x9200 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 3 - PCI slot 2 */
			0x9300 0 0 1 &mpic 3 1
			0x9300 0 0 2 &mpic 4 1
			0x9300 0 0 3 &mpic 1 1
			0x9300 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 4 - PCI slot 2 */
			0x9400 0 0 1 &mpic 3 1
			0x9400 0 0 2 &mpic 4 1
			0x9400 0 0 3 &mpic 1 1
			0x9400 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 5 - PCI slot 2 */
			0x9500 0 0 1 &mpic 3 1
			0x9500 0 0 2 &mpic 4 1
			0x9500 0 0 3 &mpic 1 1
			0x9500 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 6 - PCI slot 2 */
			0x9600 0 0 1 &mpic 3 1
			0x9600 0 0 2 &mpic 4 1
			0x9600 0 0 3 &mpic 1 1
			0x9600 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 7 - PCI slot 2 */
			0x9700 0 0 1 &mpic 3 1
			0x9700 0 0 2 &mpic 4 1
			0x9700 0 0 3 &mpic 1 1
			0x9700 0 0 4 &mpic 2 1

			// IDSEL 0x1c  USB
			0xe000 0 0 1 &i8259 12 2
			0xe100 0 0 2 &i8259 9 2
			0xe200 0 0 3 &i8259 10 2
			0xe300 0 0 4 &i8259 11 2

			// IDSEL 0x1d  Audio
			0xe800 0 0 1 &i8259 6 2

			// IDSEL 0x1e Legacy
			0xf000 0 0 1 &i8259 7 2
			0xf100 0 0 1 &i8259 7 2

			// IDSEL 0x1f IDE/SATA
			0xf800 0 0 1 &i8259 14 2
			0xf900 0 0 1 &i8259 5 2
			>;

		pcie@0 {
			reg = <0 0 0 0 0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x02000000 0x0 0x80000000
				  0x02000000 0x0 0x80000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00100000>;
			uli1575@0 {
				reg = <0 0 0 0 0>;
				#size-cells = <2>;
				#address-cells = <3>;
				ranges = <0x02000000 0x0 0x80000000
					  0x02000000 0x0 0x80000000
					  0x0 0x20000000
					  0x01000000 0x0 0x00000000
					  0x01000000 0x0 0x00000000
					  0x0 0x00100000>;
				isa@1e {
					device_type = "isa";
					#interrupt-cells = <2>;
					#size-cells = <1>;
					#address-cells = <2>;
					reg = <0xf000 0 0 0 0>;
					ranges = <1 0 0x01000000 0 0
						  0x00001000>;
					interrupt-parent = <&i8259>;

					i8259: interrupt-controller@20 {
						reg = <1 0x20 2
						       1 0xa0 2
						       1 0x4d0 2>;
						interrupt-controller;
						device_type = "interrupt-controller";
						#address-cells = <0>;
						#interrupt-cells = <2>;
						compatible = "chrp,iic";
						interrupts = <9 2>;
						interrupt-parent = <&mpic>;
					};

					i8042@60 {
						#size-cells = <0>;
						#address-cells = <1>;
						reg = <1 0x60 1 1 0x64 1>;
						interrupts = <1 3 12 3>;
						interrupt-parent =
							<&i8259>;

						keyboard@0 {
							reg = <0>;
							compatible = "pnpPNP,303";
						};

						mouse@1 {
							reg = <1>;
							compatible = "pnpPNP,f03";
						};
					};

					rtc@70 {
						compatible =
							"pnpPNP,b00";
						reg = <1 0x70 2>;
					};

					gpio@400 {
						reg = <1 0x400 0x80>;
					};
				};
			};
		};

	};

	pci1: pcie@f8009000 {
		cell-index = <1>;
		compatible = "fsl,mpc8641-pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xf8009000 0x1000>;
		bus-range = <0 0xff>;
		ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
		clock-frequency = <33333333>;
		interrupt-parent = <&mpic>;
		interrupts = <25 2>;
		interrupt-map-mask = <0xf800 0 0 7>;
		interrupt-map = <
			/* IDSEL 0x0 */
			0x0000 0 0 1 &mpic 4 1
			0x0000 0 0 2 &mpic 5 1
			0x0000 0 0 3 &mpic 6 1
			0x0000 0 0 4 &mpic 7 1
			>;
		pcie@0 {
			reg = <0 0 0 0 0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x02000000 0x0 0xa0000000
				  0x02000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00100000>;
		};
	};
	rapidio0: rapidio@f80c0000 {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "fsl,rapidio-delta";
		reg = <0xf80c0000 0x20000>;
		ranges = <0 0 0xc0000000 0 0x20000000>;
		interrupt-parent = <&mpic>;
		/* err_irq bell_outb_irq bell_inb_irq
			msg1_tx_irq msg1_rx_irq	msg2_tx_irq msg2_rx_irq */
		interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
	};
};
Commit	Line	Data
707ba16f JL	1	/*
	2	* MPC8641 HPCN Device Tree Source
	3	*
	4	* Copyright 2006 Freescale Semiconductor Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
6e050d4e	12	/dts-v1/;
707ba16f JL	13
	14	/ {
	15	model = "MPC8641HPCN";
06f35b4b	16	compatible = "fsl,mpc8641hpcn";
707ba16f JL	17	#address-cells = <1>;
	18	#size-cells = <1>;
	19
1c1d1672 JL	20	aliases {
	21	ethernet0 = &enet0;
	22	ethernet1 = &enet1;
	23	ethernet2 = &enet2;
	24	ethernet3 = &enet3;
	25	serial0 = &serial0;
	26	serial1 = &serial1;
	27	pci0 = &pci0;
	28	pci1 = &pci1;
56fde1ff	29	rapidio0 = &rapidio0;
1c1d1672 JL	30	};
1c1d1672 JL	31
707ba16f	32	cpus {
707ba16f JL	33	#address-cells = <1>;
	34	#size-cells = <0>;
	35
	36	PowerPC,8641@0 {
	37	device_type = "cpu";
	38	reg = <0>;
6e050d4e JL	39	d-cache-line-size = <32>;
	40	i-cache-line-size = <32>;
	41	d-cache-size = <32768>; // L1
	42	i-cache-size = <32768>; // L1
	43	timebase-frequency = <0>; // From uboot
707ba16f JL	44	bus-frequency = <0>; // From uboot
707ba16f JL	45	clock-frequency = <0>; // From uboot
707ba16f JL	46	};
	47	PowerPC,8641@1 {
	48	device_type = "cpu";
	49	reg = <1>;
6e050d4e JL	50	d-cache-line-size = <32>;
	51	i-cache-line-size = <32>;
	52	d-cache-size = <32768>;
	53	i-cache-size = <32768>;
	54	timebase-frequency = <0>; // From uboot
707ba16f JL	55	bus-frequency = <0>; // From uboot
707ba16f JL	56	clock-frequency = <0>; // From uboot
707ba16f JL	57	};
	58	};
	59
	60	memory {
	61	device_type = "memory";
6e050d4e	62	reg = <0x00000000 0x40000000>; // 1G at 0x0
707ba16f JL	63	};
707ba16f JL	64
0ac247d5 WF	65	localbus@f8005000 {
	66	#address-cells = <2>;
	67	#size-cells = <1>;
	68	compatible = "fsl,mpc8641-localbus", "simple-bus";
6e050d4e JL	69	reg = <0xf8005000 0x1000>;
6e050d4e JL	70	interrupts = <19 2>;
0ac247d5 WF	71	interrupt-parent = <&mpic>;
0ac247d5 WF	72
6e050d4e JL	73	ranges = <0 0 0xff800000 0x00800000
	74	1 0 0xfe000000 0x01000000
	75	2 0 0xf8200000 0x00100000
	76	3 0 0xf8100000 0x00100000>;
0ac247d5 WF	77
	78	flash@0,0 {
	79	compatible = "cfi-flash";
6e050d4e	80	reg = <0 0 0x00800000>;
0ac247d5 WF	81	bank-width = <2>;
	82	device-width = <2>;
	83	#address-cells = <1>;
	84	#size-cells = <1>;
	85	partition@0 {
	86	label = "kernel";
6e050d4e	87	reg = <0x00000000 0x00300000>;
0ac247d5 WF	88	};
	89	partition@300000 {
	90	label = "firmware b";
6e050d4e	91	reg = <0x00300000 0x00100000>;
0ac247d5 WF	92	read-only;
	93	};
	94	partition@400000 {
	95	label = "fs";
6e050d4e	96	reg = <0x00400000 0x00300000>;
0ac247d5 WF	97	};
	98	partition@700000 {
	99	label = "firmware a";
6e050d4e	100	reg = <0x00700000 0x00100000>;
0ac247d5 WF	101	read-only;
	102	};
	103	};
	104	};
	105
707ba16f JL	106	soc8641@f8000000 {
	107	#address-cells = <1>;
	108	#size-cells = <1>;
707ba16f	109	device_type = "soc";
0ac247d5	110	compatible = "simple-bus";
6e050d4e JL	111	ranges = <0x00000000 0xf8000000 0x00100000>;
6e050d4e JL	112	reg = <0xf8000000 0x00001000>; // CCSRBAR
707ba16f JL	113	bus-frequency = <0>;
	114
	115	i2c@3000 {
ec9686c4 KG	116	#address-cells = <1>;
	117	#size-cells = <0>;
	118	cell-index = <0>;
707ba16f	119	compatible = "fsl-i2c";
6e050d4e JL	120	reg = <0x3000 0x100>;
6e050d4e JL	121	interrupts = <43 2>;
6d9065d8	122	interrupt-parent = <&mpic>;
707ba16f JL	123	dfsrr;
	124	};
	125
	126	i2c@3100 {
ec9686c4 KG	127	#address-cells = <1>;
	128	#size-cells = <0>;
	129	cell-index = <1>;
707ba16f	130	compatible = "fsl-i2c";
6e050d4e JL	131	reg = <0x3100 0x100>;
6e050d4e JL	132	interrupts = <43 2>;
6d9065d8	133	interrupt-parent = <&mpic>;
707ba16f JL	134	dfsrr;
	135	};
	136
dee80553 KG	137	dma@21300 {
	138	#address-cells = <1>;
	139	#size-cells = <1>;
	140	compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
	141	reg = <0x21300 0x4>;
	142	ranges = <0x0 0x21100 0x200>;
	143	cell-index = <0>;
	144	dma-channel@0 {
	145	compatible = "fsl,mpc8641-dma-channel",
	146	"fsl,eloplus-dma-channel";
	147	reg = <0x0 0x80>;
	148	cell-index = <0>;
	149	interrupt-parent = <&mpic>;
	150	interrupts = <20 2>;
	151	};
	152	dma-channel@80 {
	153	compatible = "fsl,mpc8641-dma-channel",
	154	"fsl,eloplus-dma-channel";
	155	reg = <0x80 0x80>;
	156	cell-index = <1>;
	157	interrupt-parent = <&mpic>;
	158	interrupts = <21 2>;
	159	};
	160	dma-channel@100 {
	161	compatible = "fsl,mpc8641-dma-channel",
	162	"fsl,eloplus-dma-channel";
	163	reg = <0x100 0x80>;
	164	cell-index = <2>;
	165	interrupt-parent = <&mpic>;
	166	interrupts = <22 2>;
	167	};
	168	dma-channel@180 {
	169	compatible = "fsl,mpc8641-dma-channel",
	170	"fsl,eloplus-dma-channel";
	171	reg = <0x180 0x80>;
	172	cell-index = <3>;
	173	interrupt-parent = <&mpic>;
	174	interrupts = <23 2>;
	175	};
	176	};
	177
707ba16f JL	178	mdio@24520 {
	179	#address-cells = <1>;
	180	#size-cells = <0>;
e77b28eb	181	compatible = "fsl,gianfar-mdio";
6e050d4e	182	reg = <0x24520 0x20>;
e77b28eb	183
6d9065d8 KG	184	phy0: ethernet-phy@0 {
6d9065d8 KG	185	interrupt-parent = <&mpic>;
6e050d4e	186	interrupts = <10 1>;
707ba16f JL	187	reg = <0>;
	188	device_type = "ethernet-phy";
	189	};
6d9065d8 KG	190	phy1: ethernet-phy@1 {
6d9065d8 KG	191	interrupt-parent = <&mpic>;
6e050d4e	192	interrupts = <10 1>;
707ba16f JL	193	reg = <1>;
	194	device_type = "ethernet-phy";
	195	};
6d9065d8 KG	196	phy2: ethernet-phy@2 {
6d9065d8 KG	197	interrupt-parent = <&mpic>;
6e050d4e	198	interrupts = <10 1>;
707ba16f JL	199	reg = <2>;
	200	device_type = "ethernet-phy";
	201	};
6d9065d8 KG	202	phy3: ethernet-phy@3 {
6d9065d8 KG	203	interrupt-parent = <&mpic>;
6e050d4e	204	interrupts = <10 1>;
707ba16f JL	205	reg = <3>;
	206	device_type = "ethernet-phy";
	207	};
	208	};
	209
1c1d1672	210	enet0: ethernet@24000 {
e77b28eb	211	cell-index = <0>;
707ba16f JL	212	device_type = "network";
	213	model = "TSEC";
	214	compatible = "gianfar";
6e050d4e	215	reg = <0x24000 0x1000>;
eae98266	216	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	217	interrupts = <29 2 30 2 34 2>;
6d9065d8 KG	218	interrupt-parent = <&mpic>;
6d9065d8 KG	219	phy-handle = <&phy0>;
cc65185d	220	phy-connection-type = "rgmii-id";
707ba16f JL	221	};
707ba16f JL	222
1c1d1672	223	enet1: ethernet@25000 {
e77b28eb	224	cell-index = <1>;
707ba16f JL	225	device_type = "network";
	226	model = "TSEC";
	227	compatible = "gianfar";
6e050d4e	228	reg = <0x25000 0x1000>;
eae98266	229	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	230	interrupts = <35 2 36 2 40 2>;
6d9065d8 KG	231	interrupt-parent = <&mpic>;
6d9065d8 KG	232	phy-handle = <&phy1>;
cc65185d	233	phy-connection-type = "rgmii-id";
707ba16f JL	234	};
707ba16f JL	235
1c1d1672	236	enet2: ethernet@26000 {
e77b28eb	237	cell-index = <2>;
707ba16f JL	238	device_type = "network";
	239	model = "TSEC";
	240	compatible = "gianfar";
6e050d4e	241	reg = <0x26000 0x1000>;
eae98266	242	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	243	interrupts = <31 2 32 2 33 2>;
6d9065d8 KG	244	interrupt-parent = <&mpic>;
6d9065d8 KG	245	phy-handle = <&phy2>;
cc65185d	246	phy-connection-type = "rgmii-id";
707ba16f JL	247	};
707ba16f JL	248
1c1d1672	249	enet3: ethernet@27000 {
e77b28eb	250	cell-index = <3>;
707ba16f JL	251	device_type = "network";
	252	model = "TSEC";
	253	compatible = "gianfar";
6e050d4e	254	reg = <0x27000 0x1000>;
eae98266	255	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	256	interrupts = <37 2 38 2 39 2>;
6d9065d8 KG	257	interrupt-parent = <&mpic>;
6d9065d8 KG	258	phy-handle = <&phy3>;
cc65185d	259	phy-connection-type = "rgmii-id";
707ba16f	260	};
1c1d1672 JL	261
1c1d1672 JL	262	serial0: serial@4500 {
ea082fa9	263	cell-index = <0>;
707ba16f JL	264	device_type = "serial";
707ba16f JL	265	compatible = "ns16550";
6e050d4e	266	reg = <0x4500 0x100>;
707ba16f	267	clock-frequency = <0>;
6e050d4e	268	interrupts = <42 2>;
6d9065d8	269	interrupt-parent = <&mpic>;
707ba16f JL	270	};
707ba16f JL	271
1c1d1672	272	serial1: serial@4600 {
ea082fa9	273	cell-index = <1>;
707ba16f JL	274	device_type = "serial";
707ba16f JL	275	compatible = "ns16550";
6e050d4e	276	reg = <0x4600 0x100>;
707ba16f	277	clock-frequency = <0>;
6e050d4e	278	interrupts = <28 2>;
6d9065d8	279	interrupt-parent = <&mpic>;
707ba16f JL	280	};
707ba16f JL	281
1b3c5cda	282	mpic: pic@40000 {
1b3c5cda KG	283	interrupt-controller;
	284	#address-cells = <0>;
	285	#interrupt-cells = <2>;
6e050d4e	286	reg = <0x40000 0x40000>;
1b3c5cda KG	287	compatible = "chrp,open-pic";
1b3c5cda KG	288	device_type = "open-pic";
1b3c5cda	289	};
e1c1575f KG	290
	291	global-utilities@e0000 {
	292	compatible = "fsl,mpc8641-guts";
6e050d4e	293	reg = <0xe0000 0x1000>;
e1c1575f KG	294	fsl,has-rstcr;
e1c1575f KG	295	};
1b3c5cda	296	};
707ba16f	297
1c1d1672	298	pci0: pcie@f8008000 {
ea082fa9	299	cell-index = <0>;
1b3c5cda KG	300	compatible = "fsl,mpc8641-pcie";
	301	device_type = "pci";
	302	#interrupt-cells = <1>;
	303	#size-cells = <2>;
	304	#address-cells = <3>;
6e050d4e JL	305	reg = <0xf8008000 0x1000>;
	306	bus-range = <0x0 0xff>;
	307	ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
	308	0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
	309	clock-frequency = <33333333>;
1b3c5cda	310	interrupt-parent = <&mpic>;
6e050d4e JL	311	interrupts = <24 2>;
6e050d4e JL	312	interrupt-map-mask = <0xff00 0 0 7>;
1b3c5cda	313	interrupt-map = <
bebfa06c	314	/* IDSEL 0x11 func 0 - PCI slot 1 */
6e050d4e JL	315	0x8800 0 0 1 &mpic 2 1
	316	0x8800 0 0 2 &mpic 3 1
	317	0x8800 0 0 3 &mpic 4 1
	318	0x8800 0 0 4 &mpic 1 1
bebfa06c KG	319
bebfa06c KG	320	/* IDSEL 0x11 func 1 - PCI slot 1 */
6e050d4e JL	321	0x8900 0 0 1 &mpic 2 1
	322	0x8900 0 0 2 &mpic 3 1
	323	0x8900 0 0 3 &mpic 4 1
	324	0x8900 0 0 4 &mpic 1 1
bebfa06c KG	325
bebfa06c KG	326	/* IDSEL 0x11 func 2 - PCI slot 1 */
6e050d4e JL	327	0x8a00 0 0 1 &mpic 2 1
	328	0x8a00 0 0 2 &mpic 3 1
	329	0x8a00 0 0 3 &mpic 4 1
	330	0x8a00 0 0 4 &mpic 1 1
bebfa06c KG	331
bebfa06c KG	332	/* IDSEL 0x11 func 3 - PCI slot 1 */
6e050d4e JL	333	0x8b00 0 0 1 &mpic 2 1
	334	0x8b00 0 0 2 &mpic 3 1
	335	0x8b00 0 0 3 &mpic 4 1
	336	0x8b00 0 0 4 &mpic 1 1
bebfa06c KG	337
bebfa06c KG	338	/* IDSEL 0x11 func 4 - PCI slot 1 */
6e050d4e JL	339	0x8c00 0 0 1 &mpic 2 1
	340	0x8c00 0 0 2 &mpic 3 1
	341	0x8c00 0 0 3 &mpic 4 1
	342	0x8c00 0 0 4 &mpic 1 1
bebfa06c KG	343
bebfa06c KG	344	/* IDSEL 0x11 func 5 - PCI slot 1 */
6e050d4e JL	345	0x8d00 0 0 1 &mpic 2 1
	346	0x8d00 0 0 2 &mpic 3 1
	347	0x8d00 0 0 3 &mpic 4 1
	348	0x8d00 0 0 4 &mpic 1 1
bebfa06c KG	349
bebfa06c KG	350	/* IDSEL 0x11 func 6 - PCI slot 1 */
6e050d4e JL	351	0x8e00 0 0 1 &mpic 2 1
	352	0x8e00 0 0 2 &mpic 3 1
	353	0x8e00 0 0 3 &mpic 4 1
	354	0x8e00 0 0 4 &mpic 1 1
bebfa06c KG	355
bebfa06c KG	356	/* IDSEL 0x11 func 7 - PCI slot 1 */
6e050d4e JL	357	0x8f00 0 0 1 &mpic 2 1
	358	0x8f00 0 0 2 &mpic 3 1
	359	0x8f00 0 0 3 &mpic 4 1
	360	0x8f00 0 0 4 &mpic 1 1
bebfa06c KG	361
bebfa06c KG	362	/* IDSEL 0x12 func 0 - PCI slot 2 */
6e050d4e JL	363	0x9000 0 0 1 &mpic 3 1
	364	0x9000 0 0 2 &mpic 4 1
	365	0x9000 0 0 3 &mpic 1 1
	366	0x9000 0 0 4 &mpic 2 1
bebfa06c KG	367
bebfa06c KG	368	/* IDSEL 0x12 func 1 - PCI slot 2 */
6e050d4e JL	369	0x9100 0 0 1 &mpic 3 1
	370	0x9100 0 0 2 &mpic 4 1
	371	0x9100 0 0 3 &mpic 1 1
	372	0x9100 0 0 4 &mpic 2 1
bebfa06c KG	373
bebfa06c KG	374	/* IDSEL 0x12 func 2 - PCI slot 2 */
6e050d4e JL	375	0x9200 0 0 1 &mpic 3 1
	376	0x9200 0 0 2 &mpic 4 1
	377	0x9200 0 0 3 &mpic 1 1
	378	0x9200 0 0 4 &mpic 2 1
bebfa06c KG	379
bebfa06c KG	380	/* IDSEL 0x12 func 3 - PCI slot 2 */
6e050d4e JL	381	0x9300 0 0 1 &mpic 3 1
	382	0x9300 0 0 2 &mpic 4 1
	383	0x9300 0 0 3 &mpic 1 1
	384	0x9300 0 0 4 &mpic 2 1
bebfa06c KG	385
bebfa06c KG	386	/* IDSEL 0x12 func 4 - PCI slot 2 */
6e050d4e JL	387	0x9400 0 0 1 &mpic 3 1
	388	0x9400 0 0 2 &mpic 4 1
	389	0x9400 0 0 3 &mpic 1 1
	390	0x9400 0 0 4 &mpic 2 1
bebfa06c KG	391
bebfa06c KG	392	/* IDSEL 0x12 func 5 - PCI slot 2 */
6e050d4e JL	393	0x9500 0 0 1 &mpic 3 1
	394	0x9500 0 0 2 &mpic 4 1
	395	0x9500 0 0 3 &mpic 1 1
	396	0x9500 0 0 4 &mpic 2 1
bebfa06c KG	397
bebfa06c KG	398	/* IDSEL 0x12 func 6 - PCI slot 2 */
6e050d4e JL	399	0x9600 0 0 1 &mpic 3 1
	400	0x9600 0 0 2 &mpic 4 1
	401	0x9600 0 0 3 &mpic 1 1
	402	0x9600 0 0 4 &mpic 2 1
bebfa06c KG	403
bebfa06c KG	404	/* IDSEL 0x12 func 7 - PCI slot 2 */
6e050d4e JL	405	0x9700 0 0 1 &mpic 3 1
	406	0x9700 0 0 2 &mpic 4 1
	407	0x9700 0 0 3 &mpic 1 1
	408	0x9700 0 0 4 &mpic 2 1
707ba16f	409
1b3c5cda	410	// IDSEL 0x1c USB
6e050d4e JL	411	0xe000 0 0 1 &i8259 12 2
	412	0xe100 0 0 2 &i8259 9 2
	413	0xe200 0 0 3 &i8259 10 2
ba1616d9	414	0xe300 0 0 4 &i8259 11 2
707ba16f	415
1b3c5cda	416	// IDSEL 0x1d Audio
6e050d4e	417	0xe800 0 0 1 &i8259 6 2
707ba16f	418
1b3c5cda	419	// IDSEL 0x1e Legacy
6e050d4e JL	420	0xf000 0 0 1 &i8259 7 2
6e050d4e JL	421	0xf100 0 0 1 &i8259 7 2
1b3c5cda KG	422
1b3c5cda KG	423	// IDSEL 0x1f IDE/SATA
6e050d4e JL	424	0xf800 0 0 1 &i8259 14 2
6e050d4e JL	425	0xf900 0 0 1 &i8259 5 2
1b3c5cda KG	426	>;
	427
	428	pcie@0 {
	429	reg = <0 0 0 0 0>;
	430	#size-cells = <2>;
	431	#address-cells = <3>;
	432	device_type = "pci";
6e050d4e JL	433	ranges = <0x02000000 0x0 0x80000000
	434	0x02000000 0x0 0x80000000
	435	0x0 0x20000000
1b3c5cda	436
6e050d4e JL	437	0x01000000 0x0 0x00000000
	438	0x01000000 0x0 0x00000000
	439	0x0 0x00100000>;
dfac6faf WF	440	uli1575@0 {
	441	reg = <0 0 0 0 0>;
	442	#size-cells = <2>;
	443	#address-cells = <3>;
6e050d4e JL	444	ranges = <0x02000000 0x0 0x80000000
	445	0x02000000 0x0 0x80000000
	446	0x0 0x20000000
	447	0x01000000 0x0 0x00000000
	448	0x01000000 0x0 0x00000000
	449	0x0 0x00100000>;
1b3c5cda KG	450	isa@1e {
	451	device_type = "isa";
	452	#interrupt-cells = <2>;
	453	#size-cells = <1>;
	454	#address-cells = <2>;
6e050d4e JL	455	reg = <0xf000 0 0 0 0>;
	456	ranges = <1 0 0x01000000 0 0
	457	0x00001000>;
1b3c5cda	458	interrupt-parent = <&i8259>;
dfac6faf	459
1b3c5cda	460	i8259: interrupt-controller@20 {
6e050d4e JL	461	reg = <1 0x20 2
	462	1 0xa0 2
	463	1 0x4d0 2>;
1b3c5cda KG	464	interrupt-controller;
	465	device_type = "interrupt-controller";
	466	#address-cells = <0>;
dfac6faf	467	#interrupt-cells = <2>;
1b3c5cda KG	468	compatible = "chrp,iic";
	469	interrupts = <9 2>;
	470	interrupt-parent = <&mpic>;
	471	};
dfac6faf	472
1b3c5cda KG	473	i8042@60 {
	474	#size-cells = <0>;
	475	#address-cells = <1>;
6e050d4e JL	476	reg = <1 0x60 1 1 0x64 1>;
6e050d4e JL	477	interrupts = <1 3 12 3>;
1b3c5cda KG	478	interrupt-parent =
1b3c5cda KG	479	<&i8259>;
dfac6faf	480
1b3c5cda KG	481	keyboard@0 {
	482	reg = <0>;
	483	compatible = "pnpPNP,303";
dfac6faf WF	484	};
dfac6faf WF	485
1b3c5cda KG	486	mouse@1 {
	487	reg = <1>;
	488	compatible = "pnpPNP,f03";
dfac6faf	489	};
1b3c5cda	490	};
dfac6faf	491
1b3c5cda KG	492	rtc@70 {
	493	compatible =
	494	"pnpPNP,b00";
6e050d4e	495	reg = <1 0x70 2>;
1b3c5cda KG	496	};
	497
	498	gpio@400 {
6e050d4e	499	reg = <1 0x400 0x80>;
dfac6faf WF	500	};
dfac6faf WF	501	};
707ba16f	502	};
707ba16f	503	};
e0e3c8d4	504
1b3c5cda KG	505	};
1b3c5cda KG	506
1c1d1672	507	pci1: pcie@f8009000 {
ea082fa9	508	cell-index = <1>;
1b3c5cda KG	509	compatible = "fsl,mpc8641-pcie";
	510	device_type = "pci";
	511	#interrupt-cells = <1>;
	512	#size-cells = <2>;
	513	#address-cells = <3>;
6e050d4e JL	514	reg = <0xf8009000 0x1000>;
	515	bus-range = <0 0xff>;
	516	ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
	517	0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
	518	clock-frequency = <33333333>;
1b3c5cda	519	interrupt-parent = <&mpic>;
6e050d4e JL	520	interrupts = <25 2>;
6e050d4e JL	521	interrupt-map-mask = <0xf800 0 0 7>;
1b3c5cda KG	522	interrupt-map = <
1b3c5cda KG	523	/* IDSEL 0x0 */
6e050d4e JL	524	0x0000 0 0 1 &mpic 4 1
	525	0x0000 0 0 2 &mpic 5 1
	526	0x0000 0 0 3 &mpic 6 1
	527	0x0000 0 0 4 &mpic 7 1
1b3c5cda KG	528	>;
	529	pcie@0 {
	530	reg = <0 0 0 0 0>;
e0e3c8d4 ZW	531	#size-cells = <2>;
e0e3c8d4 ZW	532	#address-cells = <3>;
1b3c5cda	533	device_type = "pci";
6e050d4e JL	534	ranges = <0x02000000 0x0 0xa0000000
	535	0x02000000 0x0 0xa0000000
	536	0x0 0x20000000
e0e3c8d4	537
6e050d4e JL	538	0x01000000 0x0 0x00000000
	539	0x01000000 0x0 0x00000000
	540	0x0 0x00100000>;
707ba16f JL	541	};
707ba16f JL	542	};
56fde1ff ZW	543	rapidio0: rapidio@f80c0000 {
	544	#address-cells = <2>;
	545	#size-cells = <2>;
	546	compatible = "fsl,rapidio-delta";
	547	reg = <0xf80c0000 0x20000>;
	548	ranges = <0 0 0xc0000000 0 0x20000000>;
	549	interrupt-parent = <&mpic>;
	550	/* err_irq bell_outb_irq bell_inb_irq
	551	msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */
	552	interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
	553	};
707ba16f	554	};