[deliverable/linux.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts

/*
 * MPC8641 HPCN Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "MPC8641HPCN";
	compatible = "fsl,mpc8641hpcn";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
		pci1 = &pci1;
/*
 * Only one of Rapid IO or PCI can be present due to HW limitations and
 * due to the fact that the 2 now share address space in the new memory
 * map.  The most likely case is that we have PCI, so comment out the
 * rapidio node.  Leave it here for reference.
 */
		/* rapidio0 = &rapidio0; */
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8641@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;		// L1
			i-cache-size = <32768>;		// L1
			timebase-frequency = <0>;	// From uboot
			bus-frequency = <0>;		// From uboot
			clock-frequency = <0>;		// From uboot
		};
		PowerPC,8641@1 {
			device_type = "cpu";
			reg = <1>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;
			i-cache-size = <32768>;
			timebase-frequency = <0>;	// From uboot
			bus-frequency = <0>;		// From uboot
			clock-frequency = <0>;		// From uboot
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x40000000>;	// 1G at 0x0
	};

	localbus@ffe05000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8641-localbus", "simple-bus";
		reg = <0xffe05000 0x1000>;
		interrupts = <19 2>;
		interrupt-parent = <&mpic>;

		ranges = <0 0 0xef800000 0x00800000
			  2 0 0xffdf8000 0x00008000
			  3 0 0xffdf0000 0x00008000>;

		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0 0 0x00800000>;
			bank-width = <2>;
			device-width = <2>;
			#address-cells = <1>;
			#size-cells = <1>;
			partition@0 {
				label = "kernel";
				reg = <0x00000000 0x00300000>;
			};
			partition@300000 {
				label = "firmware b";
				reg = <0x00300000 0x00100000>;
				read-only;
			};
			partition@400000 {
				label = "fs";
				reg = <0x00400000 0x00300000>;
			};
			partition@700000 {
				label = "firmware a";
				reg = <0x00700000 0x00100000>;
				read-only;
			};
		};
	};

	soc8641@ffe00000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x00000000 0xffe00000 0x00100000>;
		reg = <0xffe00000 0x00001000>;	// CCSRBAR
		bus-frequency = <0>;

		i2c@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <0x3000 0x100>;
			interrupts = <43 2>;
			interrupt-parent = <&mpic>;
			dfsrr;
		};

		i2c@3100 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <1>;
			compatible = "fsl-i2c";
			reg = <0x3100 0x100>;
			interrupts = <43 2>;
			interrupt-parent = <&mpic>;
			dfsrr;
		};

		dma@21300 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
			reg = <0x21300 0x4>;
			ranges = <0x0 0x21100 0x200>;
			cell-index = <0>;
			dma-channel@0 {
				compatible = "fsl,mpc8641-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x0 0x80>;
				cell-index = <0>;
				interrupt-parent = <&mpic>;
				interrupts = <20 2>;
			};
			dma-channel@80 {
				compatible = "fsl,mpc8641-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x80 0x80>;
				cell-index = <1>;
				interrupt-parent = <&mpic>;
				interrupts = <21 2>;
			};
			dma-channel@100 {
				compatible = "fsl,mpc8641-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x100 0x80>;
				cell-index = <2>;
				interrupt-parent = <&mpic>;
				interrupts = <22 2>;
			};
			dma-channel@180 {
				compatible = "fsl,mpc8641-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x180 0x80>;
				cell-index = <3>;
				interrupt-parent = <&mpic>;
				interrupts = <23 2>;
			};
		};

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-mdio";
			reg = <0x24520 0x20>;

			phy0: ethernet-phy@0 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <0>;
				device_type = "ethernet-phy";
			};
			phy1: ethernet-phy@1 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <1>;
				device_type = "ethernet-phy";
			};
			phy2: ethernet-phy@2 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <2>;
				device_type = "ethernet-phy";
			};
			phy3: ethernet-phy@3 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <3>;
				device_type = "ethernet-phy";
			};
			tbi0: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		mdio@25520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-tbi";
			reg = <0x25520 0x20>;

			tbi1: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		mdio@26520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-tbi";
			reg = <0x26520 0x20>;

			tbi2: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		mdio@27520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-tbi";
			reg = <0x27520 0x20>;

			tbi3: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};


		enet0: ethernet@24000 {
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <29 2 30  2 34 2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi0>;
			phy-handle = <&phy0>;
			phy-connection-type = "rgmii-id";
		};

		enet1: ethernet@25000 {
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 2 36 2 40 2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi1>;
			phy-handle = <&phy1>;
			phy-connection-type = "rgmii-id";
		};
		
		enet2: ethernet@26000 {
			cell-index = <2>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x26000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <31 2 32 2 33 2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi2>;
			phy-handle = <&phy2>;
			phy-connection-type = "rgmii-id";
		};

		enet3: ethernet@27000 {
			cell-index = <3>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x27000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <37 2 38 2 39 2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi3>;
			phy-handle = <&phy3>;
			phy-connection-type = "rgmii-id";
		};

		serial0: serial@4500 {
			cell-index = <0>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4500 0x100>;
			clock-frequency = <0>;
			interrupts = <42 2>;
			interrupt-parent = <&mpic>;
		};

		serial1: serial@4600 {
			cell-index = <1>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4600 0x100>;
			clock-frequency = <0>;
			interrupts = <28 2>;
			interrupt-parent = <&mpic>;
		};

		mpic: pic@40000 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x40000 0x40000>;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
		};

		global-utilities@e0000 {
			compatible = "fsl,mpc8641-guts";
			reg = <0xe0000 0x1000>;
			fsl,has-rstcr;
		};
	};

	pci0: pcie@ffe08000 {
		cell-index = <0>;
		compatible = "fsl,mpc8641-pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xffe08000 0x1000>;
		bus-range = <0x0 0xff>;
		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
		clock-frequency = <33333333>;
		interrupt-parent = <&mpic>;
		interrupts = <24 2>;
		interrupt-map-mask = <0xff00 0 0 7>;
		interrupt-map = <
			/* IDSEL 0x11 func 0 - PCI slot 1 */
			0x8800 0 0 1 &mpic 2 1
			0x8800 0 0 2 &mpic 3 1
			0x8800 0 0 3 &mpic 4 1
			0x8800 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 1 - PCI slot 1 */
			0x8900 0 0 1 &mpic 2 1
			0x8900 0 0 2 &mpic 3 1
			0x8900 0 0 3 &mpic 4 1
			0x8900 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 2 - PCI slot 1 */
			0x8a00 0 0 1 &mpic 2 1
			0x8a00 0 0 2 &mpic 3 1
			0x8a00 0 0 3 &mpic 4 1
			0x8a00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 3 - PCI slot 1 */
			0x8b00 0 0 1 &mpic 2 1
			0x8b00 0 0 2 &mpic 3 1
			0x8b00 0 0 3 &mpic 4 1
			0x8b00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 4 - PCI slot 1 */
			0x8c00 0 0 1 &mpic 2 1
			0x8c00 0 0 2 &mpic 3 1
			0x8c00 0 0 3 &mpic 4 1
			0x8c00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 5 - PCI slot 1 */
			0x8d00 0 0 1 &mpic 2 1
			0x8d00 0 0 2 &mpic 3 1
			0x8d00 0 0 3 &mpic 4 1
			0x8d00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 6 - PCI slot 1 */
			0x8e00 0 0 1 &mpic 2 1
			0x8e00 0 0 2 &mpic 3 1
			0x8e00 0 0 3 &mpic 4 1
			0x8e00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 7 - PCI slot 1 */
			0x8f00 0 0 1 &mpic 2 1
			0x8f00 0 0 2 &mpic 3 1
			0x8f00 0 0 3 &mpic 4 1
			0x8f00 0 0 4 &mpic 1 1

			/* IDSEL 0x12 func 0 - PCI slot 2 */
			0x9000 0 0 1 &mpic 3 1
			0x9000 0 0 2 &mpic 4 1
			0x9000 0 0 3 &mpic 1 1
			0x9000 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 1 - PCI slot 2 */
			0x9100 0 0 1 &mpic 3 1
			0x9100 0 0 2 &mpic 4 1
			0x9100 0 0 3 &mpic 1 1
			0x9100 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 2 - PCI slot 2 */
			0x9200 0 0 1 &mpic 3 1
			0x9200 0 0 2 &mpic 4 1
			0x9200 0 0 3 &mpic 1 1
			0x9200 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 3 - PCI slot 2 */
			0x9300 0 0 1 &mpic 3 1
			0x9300 0 0 2 &mpic 4 1
			0x9300 0 0 3 &mpic 1 1
			0x9300 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 4 - PCI slot 2 */
			0x9400 0 0 1 &mpic 3 1
			0x9400 0 0 2 &mpic 4 1
			0x9400 0 0 3 &mpic 1 1
			0x9400 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 5 - PCI slot 2 */
			0x9500 0 0 1 &mpic 3 1
			0x9500 0 0 2 &mpic 4 1
			0x9500 0 0 3 &mpic 1 1
			0x9500 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 6 - PCI slot 2 */
			0x9600 0 0 1 &mpic 3 1
			0x9600 0 0 2 &mpic 4 1
			0x9600 0 0 3 &mpic 1 1
			0x9600 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 7 - PCI slot 2 */
			0x9700 0 0 1 &mpic 3 1
			0x9700 0 0 2 &mpic 4 1
			0x9700 0 0 3 &mpic 1 1
			0x9700 0 0 4 &mpic 2 1

			// IDSEL 0x1c  USB
			0xe000 0 0 1 &i8259 12 2
			0xe100 0 0 2 &i8259 9 2
			0xe200 0 0 3 &i8259 10 2
			0xe300 0 0 4 &i8259 11 2

			// IDSEL 0x1d  Audio
			0xe800 0 0 1 &i8259 6 2

			// IDSEL 0x1e Legacy
			0xf000 0 0 1 &i8259 7 2
			0xf100 0 0 1 &i8259 7 2

			// IDSEL 0x1f IDE/SATA
			0xf800 0 0 1 &i8259 14 2
			0xf900 0 0 1 &i8259 5 2
			>;

		pcie@0 {
			reg = <0 0 0 0 0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x02000000 0x0 0x80000000
				  0x02000000 0x0 0x80000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00010000>;
			uli1575@0 {
				reg = <0 0 0 0 0>;
				#size-cells = <2>;
				#address-cells = <3>;
				ranges = <0x02000000 0x0 0x80000000
					  0x02000000 0x0 0x80000000
					  0x0 0x20000000
					  0x01000000 0x0 0x00000000
					  0x01000000 0x0 0x00000000
					  0x0 0x00010000>;
				isa@1e {
					device_type = "isa";
					#interrupt-cells = <2>;
					#size-cells = <1>;
					#address-cells = <2>;
					reg = <0xf000 0 0 0 0>;
					ranges = <1 0 0x01000000 0 0
						  0x00001000>;
					interrupt-parent = <&i8259>;

					i8259: interrupt-controller@20 {
						reg = <1 0x20 2
						       1 0xa0 2
						       1 0x4d0 2>;
						interrupt-controller;
						device_type = "interrupt-controller";
						#address-cells = <0>;
						#interrupt-cells = <2>;
						compatible = "chrp,iic";
						interrupts = <9 2>;
						interrupt-parent = <&mpic>;
					};

					i8042@60 {
						#size-cells = <0>;
						#address-cells = <1>;
						reg = <1 0x60 1 1 0x64 1>;
						interrupts = <1 3 12 3>;
						interrupt-parent =
							<&i8259>;

						keyboard@0 {
							reg = <0>;
							compatible = "pnpPNP,303";
						};

						mouse@1 {
							reg = <1>;
							compatible = "pnpPNP,f03";
						};
					};

					rtc@70 {
						compatible =
							"pnpPNP,b00";
						reg = <1 0x70 2>;
					};

					gpio@400 {
						reg = <1 0x400 0x80>;
					};
				};
			};
		};

	};

	pci1: pcie@ffe09000 {
		cell-index = <1>;
		compatible = "fsl,mpc8641-pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xffe09000 0x1000>;
		bus-range = <0 0xff>;
		ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
		clock-frequency = <33333333>;
		interrupt-parent = <&mpic>;
		interrupts = <25 2>;
		interrupt-map-mask = <0xf800 0 0 7>;
		interrupt-map = <
			/* IDSEL 0x0 */
			0x0000 0 0 1 &mpic 4 1
			0x0000 0 0 2 &mpic 5 1
			0x0000 0 0 3 &mpic 6 1
			0x0000 0 0 4 &mpic 7 1
			>;
		pcie@0 {
			reg = <0 0 0 0 0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x02000000 0x0 0xa0000000
				  0x02000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00010000>;
		};
	};
/*
	rapidio0: rapidio@ffec0000 {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "fsl,rapidio-delta";
		reg = <0xffec0000 0x20000>;
		ranges = <0 0 0x80000000 0 0x20000000>;
		interrupt-parent = <&mpic>;
		// err_irq bell_outb_irq bell_inb_irq
		//	msg1_tx_irq msg1_rx_irq	msg2_tx_irq msg2_rx_irq
		interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
	};
*/

};
Commit	Line	Data
707ba16f JL	1	/*
	2	* MPC8641 HPCN Device Tree Source
	3	*
	4	* Copyright 2006 Freescale Semiconductor Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
6e050d4e	12	/dts-v1/;
707ba16f JL	13
	14	/ {
	15	model = "MPC8641HPCN";
06f35b4b	16	compatible = "fsl,mpc8641hpcn";
707ba16f JL	17	#address-cells = <1>;
	18	#size-cells = <1>;
	19
1c1d1672 JL	20	aliases {
	21	ethernet0 = &enet0;
	22	ethernet1 = &enet1;
	23	ethernet2 = &enet2;
	24	ethernet3 = &enet3;
	25	serial0 = &serial0;
	26	serial1 = &serial1;
	27	pci0 = &pci0;
	28	pci1 = &pci1;
47f80a32 BB	29	/*
	30	* Only one of Rapid IO or PCI can be present due to HW limitations and
	31	* due to the fact that the 2 now share address space in the new memory
	32	* map. The most likely case is that we have PCI, so comment out the
	33	* rapidio node. Leave it here for reference.
	34	*/
	35	/* rapidio0 = &rapidio0; */
1c1d1672 JL	36	};
1c1d1672 JL	37
707ba16f	38	cpus {
707ba16f JL	39	#address-cells = <1>;
	40	#size-cells = <0>;
	41
	42	PowerPC,8641@0 {
	43	device_type = "cpu";
	44	reg = <0>;
6e050d4e JL	45	d-cache-line-size = <32>;
	46	i-cache-line-size = <32>;
	47	d-cache-size = <32768>; // L1
	48	i-cache-size = <32768>; // L1
	49	timebase-frequency = <0>; // From uboot
707ba16f JL	50	bus-frequency = <0>; // From uboot
707ba16f JL	51	clock-frequency = <0>; // From uboot
707ba16f JL	52	};
	53	PowerPC,8641@1 {
	54	device_type = "cpu";
	55	reg = <1>;
6e050d4e JL	56	d-cache-line-size = <32>;
	57	i-cache-line-size = <32>;
	58	d-cache-size = <32768>;
	59	i-cache-size = <32768>;
	60	timebase-frequency = <0>; // From uboot
707ba16f JL	61	bus-frequency = <0>; // From uboot
707ba16f JL	62	clock-frequency = <0>; // From uboot
707ba16f JL	63	};
	64	};
	65
	66	memory {
	67	device_type = "memory";
6e050d4e	68	reg = <0x00000000 0x40000000>; // 1G at 0x0
707ba16f JL	69	};
707ba16f JL	70
47f80a32	71	localbus@ffe05000 {
0ac247d5 WF	72	#address-cells = <2>;
	73	#size-cells = <1>;
	74	compatible = "fsl,mpc8641-localbus", "simple-bus";
47f80a32	75	reg = <0xffe05000 0x1000>;
6e050d4e	76	interrupts = <19 2>;
0ac247d5 WF	77	interrupt-parent = <&mpic>;
0ac247d5 WF	78
47f80a32 BB	79	ranges = <0 0 0xef800000 0x00800000
	80	2 0 0xffdf8000 0x00008000
	81	3 0 0xffdf0000 0x00008000>;
0ac247d5 WF	82
	83	flash@0,0 {
	84	compatible = "cfi-flash";
6e050d4e	85	reg = <0 0 0x00800000>;
0ac247d5 WF	86	bank-width = <2>;
	87	device-width = <2>;
	88	#address-cells = <1>;
	89	#size-cells = <1>;
	90	partition@0 {
	91	label = "kernel";
6e050d4e	92	reg = <0x00000000 0x00300000>;
0ac247d5 WF	93	};
	94	partition@300000 {
	95	label = "firmware b";
6e050d4e	96	reg = <0x00300000 0x00100000>;
0ac247d5 WF	97	read-only;
	98	};
	99	partition@400000 {
	100	label = "fs";
6e050d4e	101	reg = <0x00400000 0x00300000>;
0ac247d5 WF	102	};
	103	partition@700000 {
	104	label = "firmware a";
6e050d4e	105	reg = <0x00700000 0x00100000>;
0ac247d5 WF	106	read-only;
	107	};
	108	};
	109	};
	110
47f80a32	111	soc8641@ffe00000 {
707ba16f JL	112	#address-cells = <1>;
707ba16f JL	113	#size-cells = <1>;
707ba16f	114	device_type = "soc";
0ac247d5	115	compatible = "simple-bus";
47f80a32 BB	116	ranges = <0x00000000 0xffe00000 0x00100000>;
47f80a32 BB	117	reg = <0xffe00000 0x00001000>; // CCSRBAR
707ba16f JL	118	bus-frequency = <0>;
	119
	120	i2c@3000 {
ec9686c4 KG	121	#address-cells = <1>;
	122	#size-cells = <0>;
	123	cell-index = <0>;
707ba16f	124	compatible = "fsl-i2c";
6e050d4e JL	125	reg = <0x3000 0x100>;
6e050d4e JL	126	interrupts = <43 2>;
6d9065d8	127	interrupt-parent = <&mpic>;
707ba16f JL	128	dfsrr;
	129	};
	130
	131	i2c@3100 {
ec9686c4 KG	132	#address-cells = <1>;
	133	#size-cells = <0>;
	134	cell-index = <1>;
707ba16f	135	compatible = "fsl-i2c";
6e050d4e JL	136	reg = <0x3100 0x100>;
6e050d4e JL	137	interrupts = <43 2>;
6d9065d8	138	interrupt-parent = <&mpic>;
707ba16f JL	139	dfsrr;
	140	};
	141
dee80553 KG	142	dma@21300 {
	143	#address-cells = <1>;
	144	#size-cells = <1>;
	145	compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
	146	reg = <0x21300 0x4>;
	147	ranges = <0x0 0x21100 0x200>;
	148	cell-index = <0>;
	149	dma-channel@0 {
	150	compatible = "fsl,mpc8641-dma-channel",
	151	"fsl,eloplus-dma-channel";
	152	reg = <0x0 0x80>;
	153	cell-index = <0>;
	154	interrupt-parent = <&mpic>;
	155	interrupts = <20 2>;
	156	};
	157	dma-channel@80 {
	158	compatible = "fsl,mpc8641-dma-channel",
	159	"fsl,eloplus-dma-channel";
	160	reg = <0x80 0x80>;
	161	cell-index = <1>;
	162	interrupt-parent = <&mpic>;
	163	interrupts = <21 2>;
	164	};
	165	dma-channel@100 {
	166	compatible = "fsl,mpc8641-dma-channel",
	167	"fsl,eloplus-dma-channel";
	168	reg = <0x100 0x80>;
	169	cell-index = <2>;
	170	interrupt-parent = <&mpic>;
	171	interrupts = <22 2>;
	172	};
	173	dma-channel@180 {
	174	compatible = "fsl,mpc8641-dma-channel",
	175	"fsl,eloplus-dma-channel";
	176	reg = <0x180 0x80>;
	177	cell-index = <3>;
	178	interrupt-parent = <&mpic>;
	179	interrupts = <23 2>;
	180	};
	181	};
	182
707ba16f JL	183	mdio@24520 {
	184	#address-cells = <1>;
	185	#size-cells = <0>;
e77b28eb	186	compatible = "fsl,gianfar-mdio";
6e050d4e	187	reg = <0x24520 0x20>;
e77b28eb	188
6d9065d8 KG	189	phy0: ethernet-phy@0 {
6d9065d8 KG	190	interrupt-parent = <&mpic>;
6e050d4e	191	interrupts = <10 1>;
707ba16f JL	192	reg = <0>;
	193	device_type = "ethernet-phy";
	194	};
6d9065d8 KG	195	phy1: ethernet-phy@1 {
6d9065d8 KG	196	interrupt-parent = <&mpic>;
6e050d4e	197	interrupts = <10 1>;
707ba16f JL	198	reg = <1>;
	199	device_type = "ethernet-phy";
	200	};
6d9065d8 KG	201	phy2: ethernet-phy@2 {
6d9065d8 KG	202	interrupt-parent = <&mpic>;
6e050d4e	203	interrupts = <10 1>;
707ba16f JL	204	reg = <2>;
	205	device_type = "ethernet-phy";
	206	};
6d9065d8 KG	207	phy3: ethernet-phy@3 {
6d9065d8 KG	208	interrupt-parent = <&mpic>;
6e050d4e	209	interrupts = <10 1>;
707ba16f JL	210	reg = <3>;
	211	device_type = "ethernet-phy";
	212	};
b31a1d8b AF	213	tbi0: tbi-phy@11 {
	214	reg = <0x11>;
	215	device_type = "tbi-phy";
	216	};
	217	};
	218
	219	mdio@25520 {
	220	#address-cells = <1>;
	221	#size-cells = <0>;
	222	compatible = "fsl,gianfar-tbi";
	223	reg = <0x25520 0x20>;
	224
	225	tbi1: tbi-phy@11 {
	226	reg = <0x11>;
	227	device_type = "tbi-phy";
	228	};
	229	};
	230
	231	mdio@26520 {
	232	#address-cells = <1>;
	233	#size-cells = <0>;
	234	compatible = "fsl,gianfar-tbi";
	235	reg = <0x26520 0x20>;
	236
	237	tbi2: tbi-phy@11 {
	238	reg = <0x11>;
	239	device_type = "tbi-phy";
	240	};
	241	};
	242
	243	mdio@27520 {
	244	#address-cells = <1>;
	245	#size-cells = <0>;
	246	compatible = "fsl,gianfar-tbi";
	247	reg = <0x27520 0x20>;
	248
	249	tbi3: tbi-phy@11 {
	250	reg = <0x11>;
	251	device_type = "tbi-phy";
	252	};
707ba16f JL	253	};
707ba16f JL	254
b31a1d8b	255
1c1d1672	256	enet0: ethernet@24000 {
e77b28eb	257	cell-index = <0>;
707ba16f JL	258	device_type = "network";
	259	model = "TSEC";
	260	compatible = "gianfar";
6e050d4e	261	reg = <0x24000 0x1000>;
eae98266	262	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	263	interrupts = <29 2 30 2 34 2>;
6d9065d8	264	interrupt-parent = <&mpic>;
b31a1d8b	265	tbi-handle = <&tbi0>;
6d9065d8	266	phy-handle = <&phy0>;
cc65185d	267	phy-connection-type = "rgmii-id";
707ba16f JL	268	};
707ba16f JL	269
1c1d1672	270	enet1: ethernet@25000 {
e77b28eb	271	cell-index = <1>;
707ba16f JL	272	device_type = "network";
	273	model = "TSEC";
	274	compatible = "gianfar";
6e050d4e	275	reg = <0x25000 0x1000>;
eae98266	276	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	277	interrupts = <35 2 36 2 40 2>;
6d9065d8	278	interrupt-parent = <&mpic>;
b31a1d8b	279	tbi-handle = <&tbi1>;
6d9065d8	280	phy-handle = <&phy1>;
cc65185d	281	phy-connection-type = "rgmii-id";
707ba16f JL	282	};
707ba16f JL	283
1c1d1672	284	enet2: ethernet@26000 {
e77b28eb	285	cell-index = <2>;
707ba16f JL	286	device_type = "network";
	287	model = "TSEC";
	288	compatible = "gianfar";
6e050d4e	289	reg = <0x26000 0x1000>;
eae98266	290	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	291	interrupts = <31 2 32 2 33 2>;
6d9065d8	292	interrupt-parent = <&mpic>;
b31a1d8b	293	tbi-handle = <&tbi2>;
6d9065d8	294	phy-handle = <&phy2>;
cc65185d	295	phy-connection-type = "rgmii-id";
707ba16f JL	296	};
707ba16f JL	297
1c1d1672	298	enet3: ethernet@27000 {
e77b28eb	299	cell-index = <3>;
707ba16f JL	300	device_type = "network";
	301	model = "TSEC";
	302	compatible = "gianfar";
6e050d4e	303	reg = <0x27000 0x1000>;
eae98266	304	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	305	interrupts = <37 2 38 2 39 2>;
6d9065d8	306	interrupt-parent = <&mpic>;
b31a1d8b	307	tbi-handle = <&tbi3>;
6d9065d8	308	phy-handle = <&phy3>;
cc65185d	309	phy-connection-type = "rgmii-id";
707ba16f	310	};
1c1d1672 JL	311
1c1d1672 JL	312	serial0: serial@4500 {
ea082fa9	313	cell-index = <0>;
707ba16f JL	314	device_type = "serial";
707ba16f JL	315	compatible = "ns16550";
6e050d4e	316	reg = <0x4500 0x100>;
707ba16f	317	clock-frequency = <0>;
6e050d4e	318	interrupts = <42 2>;
6d9065d8	319	interrupt-parent = <&mpic>;
707ba16f JL	320	};
707ba16f JL	321
1c1d1672	322	serial1: serial@4600 {
ea082fa9	323	cell-index = <1>;
707ba16f JL	324	device_type = "serial";
707ba16f JL	325	compatible = "ns16550";
6e050d4e	326	reg = <0x4600 0x100>;
707ba16f	327	clock-frequency = <0>;
6e050d4e	328	interrupts = <28 2>;
6d9065d8	329	interrupt-parent = <&mpic>;
707ba16f JL	330	};
707ba16f JL	331
1b3c5cda	332	mpic: pic@40000 {
1b3c5cda KG	333	interrupt-controller;
	334	#address-cells = <0>;
	335	#interrupt-cells = <2>;
6e050d4e	336	reg = <0x40000 0x40000>;
1b3c5cda KG	337	compatible = "chrp,open-pic";
1b3c5cda KG	338	device_type = "open-pic";
1b3c5cda	339	};
e1c1575f KG	340
	341	global-utilities@e0000 {
	342	compatible = "fsl,mpc8641-guts";
6e050d4e	343	reg = <0xe0000 0x1000>;
e1c1575f KG	344	fsl,has-rstcr;
e1c1575f KG	345	};
1b3c5cda	346	};
707ba16f	347
47f80a32	348	pci0: pcie@ffe08000 {
ea082fa9	349	cell-index = <0>;
1b3c5cda KG	350	compatible = "fsl,mpc8641-pcie";
	351	device_type = "pci";
	352	#interrupt-cells = <1>;
	353	#size-cells = <2>;
	354	#address-cells = <3>;
47f80a32	355	reg = <0xffe08000 0x1000>;
6e050d4e JL	356	bus-range = <0x0 0xff>;
6e050d4e JL	357	ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
47f80a32	358	0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
6e050d4e	359	clock-frequency = <33333333>;
1b3c5cda	360	interrupt-parent = <&mpic>;
6e050d4e JL	361	interrupts = <24 2>;
6e050d4e JL	362	interrupt-map-mask = <0xff00 0 0 7>;
1b3c5cda	363	interrupt-map = <
bebfa06c	364	/* IDSEL 0x11 func 0 - PCI slot 1 */
6e050d4e JL	365	0x8800 0 0 1 &mpic 2 1
	366	0x8800 0 0 2 &mpic 3 1
	367	0x8800 0 0 3 &mpic 4 1
	368	0x8800 0 0 4 &mpic 1 1
bebfa06c KG	369
bebfa06c KG	370	/* IDSEL 0x11 func 1 - PCI slot 1 */
6e050d4e JL	371	0x8900 0 0 1 &mpic 2 1
	372	0x8900 0 0 2 &mpic 3 1
	373	0x8900 0 0 3 &mpic 4 1
	374	0x8900 0 0 4 &mpic 1 1
bebfa06c KG	375
bebfa06c KG	376	/* IDSEL 0x11 func 2 - PCI slot 1 */
6e050d4e JL	377	0x8a00 0 0 1 &mpic 2 1
	378	0x8a00 0 0 2 &mpic 3 1
	379	0x8a00 0 0 3 &mpic 4 1
	380	0x8a00 0 0 4 &mpic 1 1
bebfa06c KG	381
bebfa06c KG	382	/* IDSEL 0x11 func 3 - PCI slot 1 */
6e050d4e JL	383	0x8b00 0 0 1 &mpic 2 1
	384	0x8b00 0 0 2 &mpic 3 1
	385	0x8b00 0 0 3 &mpic 4 1
	386	0x8b00 0 0 4 &mpic 1 1
bebfa06c KG	387
bebfa06c KG	388	/* IDSEL 0x11 func 4 - PCI slot 1 */
6e050d4e JL	389	0x8c00 0 0 1 &mpic 2 1
	390	0x8c00 0 0 2 &mpic 3 1
	391	0x8c00 0 0 3 &mpic 4 1
	392	0x8c00 0 0 4 &mpic 1 1
bebfa06c KG	393
bebfa06c KG	394	/* IDSEL 0x11 func 5 - PCI slot 1 */
6e050d4e JL	395	0x8d00 0 0 1 &mpic 2 1
	396	0x8d00 0 0 2 &mpic 3 1
	397	0x8d00 0 0 3 &mpic 4 1
	398	0x8d00 0 0 4 &mpic 1 1
bebfa06c KG	399
bebfa06c KG	400	/* IDSEL 0x11 func 6 - PCI slot 1 */
6e050d4e JL	401	0x8e00 0 0 1 &mpic 2 1
	402	0x8e00 0 0 2 &mpic 3 1
	403	0x8e00 0 0 3 &mpic 4 1
	404	0x8e00 0 0 4 &mpic 1 1
bebfa06c KG	405
bebfa06c KG	406	/* IDSEL 0x11 func 7 - PCI slot 1 */
6e050d4e JL	407	0x8f00 0 0 1 &mpic 2 1
	408	0x8f00 0 0 2 &mpic 3 1
	409	0x8f00 0 0 3 &mpic 4 1
	410	0x8f00 0 0 4 &mpic 1 1
bebfa06c KG	411
bebfa06c KG	412	/* IDSEL 0x12 func 0 - PCI slot 2 */
6e050d4e JL	413	0x9000 0 0 1 &mpic 3 1
	414	0x9000 0 0 2 &mpic 4 1
	415	0x9000 0 0 3 &mpic 1 1
	416	0x9000 0 0 4 &mpic 2 1
bebfa06c KG	417
bebfa06c KG	418	/* IDSEL 0x12 func 1 - PCI slot 2 */
6e050d4e JL	419	0x9100 0 0 1 &mpic 3 1
	420	0x9100 0 0 2 &mpic 4 1
	421	0x9100 0 0 3 &mpic 1 1
	422	0x9100 0 0 4 &mpic 2 1
bebfa06c KG	423
bebfa06c KG	424	/* IDSEL 0x12 func 2 - PCI slot 2 */
6e050d4e JL	425	0x9200 0 0 1 &mpic 3 1
	426	0x9200 0 0 2 &mpic 4 1
	427	0x9200 0 0 3 &mpic 1 1
	428	0x9200 0 0 4 &mpic 2 1
bebfa06c KG	429
bebfa06c KG	430	/* IDSEL 0x12 func 3 - PCI slot 2 */
6e050d4e JL	431	0x9300 0 0 1 &mpic 3 1
	432	0x9300 0 0 2 &mpic 4 1
	433	0x9300 0 0 3 &mpic 1 1
	434	0x9300 0 0 4 &mpic 2 1
bebfa06c KG	435
bebfa06c KG	436	/* IDSEL 0x12 func 4 - PCI slot 2 */
6e050d4e JL	437	0x9400 0 0 1 &mpic 3 1
	438	0x9400 0 0 2 &mpic 4 1
	439	0x9400 0 0 3 &mpic 1 1
	440	0x9400 0 0 4 &mpic 2 1
bebfa06c KG	441
bebfa06c KG	442	/* IDSEL 0x12 func 5 - PCI slot 2 */
6e050d4e JL	443	0x9500 0 0 1 &mpic 3 1
	444	0x9500 0 0 2 &mpic 4 1
	445	0x9500 0 0 3 &mpic 1 1
	446	0x9500 0 0 4 &mpic 2 1
bebfa06c KG	447
bebfa06c KG	448	/* IDSEL 0x12 func 6 - PCI slot 2 */
6e050d4e JL	449	0x9600 0 0 1 &mpic 3 1
	450	0x9600 0 0 2 &mpic 4 1
	451	0x9600 0 0 3 &mpic 1 1
	452	0x9600 0 0 4 &mpic 2 1
bebfa06c KG	453
bebfa06c KG	454	/* IDSEL 0x12 func 7 - PCI slot 2 */
6e050d4e JL	455	0x9700 0 0 1 &mpic 3 1
	456	0x9700 0 0 2 &mpic 4 1
	457	0x9700 0 0 3 &mpic 1 1
	458	0x9700 0 0 4 &mpic 2 1
707ba16f	459
1b3c5cda	460	// IDSEL 0x1c USB
6e050d4e JL	461	0xe000 0 0 1 &i8259 12 2
	462	0xe100 0 0 2 &i8259 9 2
	463	0xe200 0 0 3 &i8259 10 2
ba1616d9	464	0xe300 0 0 4 &i8259 11 2
707ba16f	465
1b3c5cda	466	// IDSEL 0x1d Audio
6e050d4e	467	0xe800 0 0 1 &i8259 6 2
707ba16f	468
1b3c5cda	469	// IDSEL 0x1e Legacy
6e050d4e JL	470	0xf000 0 0 1 &i8259 7 2
6e050d4e JL	471	0xf100 0 0 1 &i8259 7 2
1b3c5cda KG	472
1b3c5cda KG	473	// IDSEL 0x1f IDE/SATA
6e050d4e JL	474	0xf800 0 0 1 &i8259 14 2
6e050d4e JL	475	0xf900 0 0 1 &i8259 5 2
1b3c5cda KG	476	>;
	477
	478	pcie@0 {
	479	reg = <0 0 0 0 0>;
	480	#size-cells = <2>;
	481	#address-cells = <3>;
	482	device_type = "pci";
6e050d4e JL	483	ranges = <0x02000000 0x0 0x80000000
	484	0x02000000 0x0 0x80000000
	485	0x0 0x20000000
1b3c5cda	486
6e050d4e JL	487	0x01000000 0x0 0x00000000
6e050d4e JL	488	0x01000000 0x0 0x00000000
47f80a32	489	0x0 0x00010000>;
dfac6faf WF	490	uli1575@0 {
	491	reg = <0 0 0 0 0>;
	492	#size-cells = <2>;
	493	#address-cells = <3>;
6e050d4e JL	494	ranges = <0x02000000 0x0 0x80000000
	495	0x02000000 0x0 0x80000000
	496	0x0 0x20000000
	497	0x01000000 0x0 0x00000000
	498	0x01000000 0x0 0x00000000
47f80a32	499	0x0 0x00010000>;
1b3c5cda KG	500	isa@1e {
	501	device_type = "isa";
	502	#interrupt-cells = <2>;
	503	#size-cells = <1>;
	504	#address-cells = <2>;
6e050d4e JL	505	reg = <0xf000 0 0 0 0>;
	506	ranges = <1 0 0x01000000 0 0
	507	0x00001000>;
1b3c5cda	508	interrupt-parent = <&i8259>;
dfac6faf	509
1b3c5cda	510	i8259: interrupt-controller@20 {
6e050d4e JL	511	reg = <1 0x20 2
	512	1 0xa0 2
	513	1 0x4d0 2>;
1b3c5cda KG	514	interrupt-controller;
	515	device_type = "interrupt-controller";
	516	#address-cells = <0>;
dfac6faf	517	#interrupt-cells = <2>;
1b3c5cda KG	518	compatible = "chrp,iic";
	519	interrupts = <9 2>;
	520	interrupt-parent = <&mpic>;
	521	};
dfac6faf	522
1b3c5cda KG	523	i8042@60 {
	524	#size-cells = <0>;
	525	#address-cells = <1>;
6e050d4e JL	526	reg = <1 0x60 1 1 0x64 1>;
6e050d4e JL	527	interrupts = <1 3 12 3>;
1b3c5cda KG	528	interrupt-parent =
1b3c5cda KG	529	<&i8259>;
dfac6faf	530
1b3c5cda KG	531	keyboard@0 {
	532	reg = <0>;
	533	compatible = "pnpPNP,303";
dfac6faf WF	534	};
dfac6faf WF	535
1b3c5cda KG	536	mouse@1 {
	537	reg = <1>;
	538	compatible = "pnpPNP,f03";
dfac6faf	539	};
1b3c5cda	540	};
dfac6faf	541
1b3c5cda KG	542	rtc@70 {
	543	compatible =
	544	"pnpPNP,b00";
6e050d4e	545	reg = <1 0x70 2>;
1b3c5cda KG	546	};
	547
	548	gpio@400 {
6e050d4e	549	reg = <1 0x400 0x80>;
dfac6faf WF	550	};
dfac6faf WF	551	};
707ba16f	552	};
707ba16f	553	};
e0e3c8d4	554
1b3c5cda KG	555	};
1b3c5cda KG	556
47f80a32	557	pci1: pcie@ffe09000 {
ea082fa9	558	cell-index = <1>;
1b3c5cda KG	559	compatible = "fsl,mpc8641-pcie";
	560	device_type = "pci";
	561	#interrupt-cells = <1>;
	562	#size-cells = <2>;
	563	#address-cells = <3>;
47f80a32	564	reg = <0xffe09000 0x1000>;
6e050d4e JL	565	bus-range = <0 0xff>;
6e050d4e JL	566	ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
47f80a32	567	0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
6e050d4e	568	clock-frequency = <33333333>;
1b3c5cda	569	interrupt-parent = <&mpic>;
6e050d4e JL	570	interrupts = <25 2>;
6e050d4e JL	571	interrupt-map-mask = <0xf800 0 0 7>;
1b3c5cda KG	572	interrupt-map = <
1b3c5cda KG	573	/* IDSEL 0x0 */
6e050d4e JL	574	0x0000 0 0 1 &mpic 4 1
	575	0x0000 0 0 2 &mpic 5 1
	576	0x0000 0 0 3 &mpic 6 1
	577	0x0000 0 0 4 &mpic 7 1
1b3c5cda KG	578	>;
	579	pcie@0 {
	580	reg = <0 0 0 0 0>;
e0e3c8d4 ZW	581	#size-cells = <2>;
e0e3c8d4 ZW	582	#address-cells = <3>;
1b3c5cda	583	device_type = "pci";
6e050d4e JL	584	ranges = <0x02000000 0x0 0xa0000000
	585	0x02000000 0x0 0xa0000000
	586	0x0 0x20000000
e0e3c8d4	587
6e050d4e JL	588	0x01000000 0x0 0x00000000
6e050d4e JL	589	0x01000000 0x0 0x00000000
47f80a32	590	0x0 0x00010000>;
707ba16f JL	591	};
707ba16f JL	592	};
47f80a32 BB	593	/*
47f80a32 BB	594	rapidio0: rapidio@ffec0000 {
56fde1ff ZW	595	#address-cells = <2>;
	596	#size-cells = <2>;
	597	compatible = "fsl,rapidio-delta";
47f80a32 BB	598	reg = <0xffec0000 0x20000>;
47f80a32 BB	599	ranges = <0 0 0x80000000 0 0x20000000>;
56fde1ff	600	interrupt-parent = <&mpic>;
47f80a32 BB	601	// err_irq bell_outb_irq bell_inb_irq
47f80a32 BB	602	// msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
56fde1ff ZW	603	interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
56fde1ff ZW	604	};
47f80a32 BB	605	*/
47f80a32 BB	606
707ba16f	607	};