[deliverable/linux.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts

/*
 * MPC8641 HPCN Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "MPC8641HPCN";
	compatible = "fsl,mpc8641hpcn";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
		pci1 = &pci1;
		rapidio0 = &rapidio0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8641@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;		// L1
			i-cache-size = <32768>;		// L1
			timebase-frequency = <0>;	// From uboot
			bus-frequency = <0>;		// From uboot
			clock-frequency = <0>;		// From uboot
		};
		PowerPC,8641@1 {
			device_type = "cpu";
			reg = <1>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;
			i-cache-size = <32768>;
			timebase-frequency = <0>;	// From uboot
			bus-frequency = <0>;		// From uboot
			clock-frequency = <0>;		// From uboot
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x40000000>;	// 1G at 0x0
	};

	localbus@f8005000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8641-localbus", "simple-bus";
		reg = <0xf8005000 0x1000>;
		interrupts = <19 2>;
		interrupt-parent = <&mpic>;

		ranges = <0 0 0xff800000 0x00800000
			  1 0 0xfe000000 0x01000000
			  2 0 0xf8200000 0x00100000
			  3 0 0xf8100000 0x00100000>;

		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0 0 0x00800000>;
			bank-width = <2>;
			device-width = <2>;
			#address-cells = <1>;
			#size-cells = <1>;
			partition@0 {
				label = "kernel";
				reg = <0x00000000 0x00300000>;
			};
			partition@300000 {
				label = "firmware b";
				reg = <0x00300000 0x00100000>;
				read-only;
			};
			partition@400000 {
				label = "fs";
				reg = <0x00400000 0x00300000>;
			};
			partition@700000 {
				label = "firmware a";
				reg = <0x00700000 0x00100000>;
				read-only;
			};
		};
	};

	soc8641@f8000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x00000000 0xf8000000 0x00100000>;
		reg = <0xf8000000 0x00001000>;	// CCSRBAR
		bus-frequency = <0>;

		i2c@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <0x3000 0x100>;
			interrupts = <43 2>;
			interrupt-parent = <&mpic>;
			dfsrr;
		};

		i2c@3100 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <1>;
			compatible = "fsl-i2c";
			reg = <0x3100 0x100>;
			interrupts = <43 2>;
			interrupt-parent = <&mpic>;
			dfsrr;
		};

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-mdio";
			reg = <0x24520 0x20>;

			phy0: ethernet-phy@0 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <0>;
				device_type = "ethernet-phy";
			};
			phy1: ethernet-phy@1 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <1>;
				device_type = "ethernet-phy";
			};
			phy2: ethernet-phy@2 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <2>;
				device_type = "ethernet-phy";
			};
			phy3: ethernet-phy@3 {
				interrupt-parent = <&mpic>;
				interrupts = <10 1>;
				reg = <3>;
				device_type = "ethernet-phy";
			};
		};

		enet0: ethernet@24000 {
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <29 2 30  2 34 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy0>;
			phy-connection-type = "rgmii-id";
		};

		enet1: ethernet@25000 {
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 2 36 2 40 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy1>;
			phy-connection-type = "rgmii-id";
		};
		
		enet2: ethernet@26000 {
			cell-index = <2>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x26000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <31 2 32 2 33 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy2>;
			phy-connection-type = "rgmii-id";
		};

		enet3: ethernet@27000 {
			cell-index = <3>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x27000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <37 2 38 2 39 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy3>;
			phy-connection-type = "rgmii-id";
		};

		serial0: serial@4500 {
			cell-index = <0>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4500 0x100>;
			clock-frequency = <0>;
			interrupts = <42 2>;
			interrupt-parent = <&mpic>;
		};

		serial1: serial@4600 {
			cell-index = <1>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4600 0x100>;
			clock-frequency = <0>;
			interrupts = <28 2>;
			interrupt-parent = <&mpic>;
		};

		mpic: pic@40000 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x40000 0x40000>;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
		};

		global-utilities@e0000 {
			compatible = "fsl,mpc8641-guts";
			reg = <0xe0000 0x1000>;
			fsl,has-rstcr;
		};
	};

	pci0: pcie@f8008000 {
		cell-index = <0>;
		compatible = "fsl,mpc8641-pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xf8008000 0x1000>;
		bus-range = <0x0 0xff>;
		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
		clock-frequency = <33333333>;
		interrupt-parent = <&mpic>;
		interrupts = <24 2>;
		interrupt-map-mask = <0xff00 0 0 7>;
		interrupt-map = <
			/* IDSEL 0x11 func 0 - PCI slot 1 */
			0x8800 0 0 1 &mpic 2 1
			0x8800 0 0 2 &mpic 3 1
			0x8800 0 0 3 &mpic 4 1
			0x8800 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 1 - PCI slot 1 */
			0x8900 0 0 1 &mpic 2 1
			0x8900 0 0 2 &mpic 3 1
			0x8900 0 0 3 &mpic 4 1
			0x8900 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 2 - PCI slot 1 */
			0x8a00 0 0 1 &mpic 2 1
			0x8a00 0 0 2 &mpic 3 1
			0x8a00 0 0 3 &mpic 4 1
			0x8a00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 3 - PCI slot 1 */
			0x8b00 0 0 1 &mpic 2 1
			0x8b00 0 0 2 &mpic 3 1
			0x8b00 0 0 3 &mpic 4 1
			0x8b00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 4 - PCI slot 1 */
			0x8c00 0 0 1 &mpic 2 1
			0x8c00 0 0 2 &mpic 3 1
			0x8c00 0 0 3 &mpic 4 1
			0x8c00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 5 - PCI slot 1 */
			0x8d00 0 0 1 &mpic 2 1
			0x8d00 0 0 2 &mpic 3 1
			0x8d00 0 0 3 &mpic 4 1
			0x8d00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 6 - PCI slot 1 */
			0x8e00 0 0 1 &mpic 2 1
			0x8e00 0 0 2 &mpic 3 1
			0x8e00 0 0 3 &mpic 4 1
			0x8e00 0 0 4 &mpic 1 1

			/* IDSEL 0x11 func 7 - PCI slot 1 */
			0x8f00 0 0 1 &mpic 2 1
			0x8f00 0 0 2 &mpic 3 1
			0x8f00 0 0 3 &mpic 4 1
			0x8f00 0 0 4 &mpic 1 1

			/* IDSEL 0x12 func 0 - PCI slot 2 */
			0x9000 0 0 1 &mpic 3 1
			0x9000 0 0 2 &mpic 4 1
			0x9000 0 0 3 &mpic 1 1
			0x9000 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 1 - PCI slot 2 */
			0x9100 0 0 1 &mpic 3 1
			0x9100 0 0 2 &mpic 4 1
			0x9100 0 0 3 &mpic 1 1
			0x9100 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 2 - PCI slot 2 */
			0x9200 0 0 1 &mpic 3 1
			0x9200 0 0 2 &mpic 4 1
			0x9200 0 0 3 &mpic 1 1
			0x9200 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 3 - PCI slot 2 */
			0x9300 0 0 1 &mpic 3 1
			0x9300 0 0 2 &mpic 4 1
			0x9300 0 0 3 &mpic 1 1
			0x9300 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 4 - PCI slot 2 */
			0x9400 0 0 1 &mpic 3 1
			0x9400 0 0 2 &mpic 4 1
			0x9400 0 0 3 &mpic 1 1
			0x9400 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 5 - PCI slot 2 */
			0x9500 0 0 1 &mpic 3 1
			0x9500 0 0 2 &mpic 4 1
			0x9500 0 0 3 &mpic 1 1
			0x9500 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 6 - PCI slot 2 */
			0x9600 0 0 1 &mpic 3 1
			0x9600 0 0 2 &mpic 4 1
			0x9600 0 0 3 &mpic 1 1
			0x9600 0 0 4 &mpic 2 1

			/* IDSEL 0x12 func 7 - PCI slot 2 */
			0x9700 0 0 1 &mpic 3 1
			0x9700 0 0 2 &mpic 4 1
			0x9700 0 0 3 &mpic 1 1
			0x9700 0 0 4 &mpic 2 1

			// IDSEL 0x1c  USB
			0xe000 0 0 1 &i8259 12 2
			0xe100 0 0 2 &i8259 9 2
			0xe200 0 0 3 &i8259 10 2
			0xe300 0 0 4 &i8259 112

			// IDSEL 0x1d  Audio
			0xe800 0 0 1 &i8259 6 2

			// IDSEL 0x1e Legacy
			0xf000 0 0 1 &i8259 7 2
			0xf100 0 0 1 &i8259 7 2

			// IDSEL 0x1f IDE/SATA
			0xf800 0 0 1 &i8259 14 2
			0xf900 0 0 1 &i8259 5 2
			>;

		pcie@0 {
			reg = <0 0 0 0 0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x02000000 0x0 0x80000000
				  0x02000000 0x0 0x80000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00100000>;
			uli1575@0 {
				reg = <0 0 0 0 0>;
				#size-cells = <2>;
				#address-cells = <3>;
				ranges = <0x02000000 0x0 0x80000000
					  0x02000000 0x0 0x80000000
					  0x0 0x20000000
					  0x01000000 0x0 0x00000000
					  0x01000000 0x0 0x00000000
					  0x0 0x00100000>;
				isa@1e {
					device_type = "isa";
					#interrupt-cells = <2>;
					#size-cells = <1>;
					#address-cells = <2>;
					reg = <0xf000 0 0 0 0>;
					ranges = <1 0 0x01000000 0 0
						  0x00001000>;
					interrupt-parent = <&i8259>;

					i8259: interrupt-controller@20 {
						reg = <1 0x20 2
						       1 0xa0 2
						       1 0x4d0 2>;
						interrupt-controller;
						device_type = "interrupt-controller";
						#address-cells = <0>;
						#interrupt-cells = <2>;
						compatible = "chrp,iic";
						interrupts = <9 2>;
						interrupt-parent = <&mpic>;
					};

					i8042@60 {
						#size-cells = <0>;
						#address-cells = <1>;
						reg = <1 0x60 1 1 0x64 1>;
						interrupts = <1 3 12 3>;
						interrupt-parent =
							<&i8259>;

						keyboard@0 {
							reg = <0>;
							compatible = "pnpPNP,303";
						};

						mouse@1 {
							reg = <1>;
							compatible = "pnpPNP,f03";
						};
					};

					rtc@70 {
						compatible =
							"pnpPNP,b00";
						reg = <1 0x70 2>;
					};

					gpio@400 {
						reg = <1 0x400 0x80>;
					};
				};
			};
		};

	};

	pci1: pcie@f8009000 {
		cell-index = <1>;
		compatible = "fsl,mpc8641-pcie";
		device_type = "pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xf8009000 0x1000>;
		bus-range = <0 0xff>;
		ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
		clock-frequency = <33333333>;
		interrupt-parent = <&mpic>;
		interrupts = <25 2>;
		interrupt-map-mask = <0xf800 0 0 7>;
		interrupt-map = <
			/* IDSEL 0x0 */
			0x0000 0 0 1 &mpic 4 1
			0x0000 0 0 2 &mpic 5 1
			0x0000 0 0 3 &mpic 6 1
			0x0000 0 0 4 &mpic 7 1
			>;
		pcie@0 {
			reg = <0 0 0 0 0>;
			#size-cells = <2>;
			#address-cells = <3>;
			device_type = "pci";
			ranges = <0x02000000 0x0 0xa0000000
				  0x02000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00100000>;
		};
	};
	rapidio0: rapidio@f80c0000 {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "fsl,rapidio-delta";
		reg = <0xf80c0000 0x20000>;
		ranges = <0 0 0xc0000000 0 0x20000000>;
		interrupt-parent = <&mpic>;
		/* err_irq bell_outb_irq bell_inb_irq
			msg1_tx_irq msg1_rx_irq	msg2_tx_irq msg2_rx_irq */
		interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
	};
};
Commit	Line	Data
707ba16f JL	1	/*
	2	* MPC8641 HPCN Device Tree Source
	3	*
	4	* Copyright 2006 Freescale Semiconductor Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
6e050d4e	12	/dts-v1/;
707ba16f JL	13
	14	/ {
	15	model = "MPC8641HPCN";
06f35b4b	16	compatible = "fsl,mpc8641hpcn";
707ba16f JL	17	#address-cells = <1>;
	18	#size-cells = <1>;
	19
1c1d1672 JL	20	aliases {
	21	ethernet0 = &enet0;
	22	ethernet1 = &enet1;
	23	ethernet2 = &enet2;
	24	ethernet3 = &enet3;
	25	serial0 = &serial0;
	26	serial1 = &serial1;
	27	pci0 = &pci0;
	28	pci1 = &pci1;
56fde1ff	29	rapidio0 = &rapidio0;
1c1d1672 JL	30	};
1c1d1672 JL	31
707ba16f	32	cpus {
707ba16f JL	33	#address-cells = <1>;
	34	#size-cells = <0>;
	35
	36	PowerPC,8641@0 {
	37	device_type = "cpu";
	38	reg = <0>;
6e050d4e JL	39	d-cache-line-size = <32>;
	40	i-cache-line-size = <32>;
	41	d-cache-size = <32768>; // L1
	42	i-cache-size = <32768>; // L1
	43	timebase-frequency = <0>; // From uboot
707ba16f JL	44	bus-frequency = <0>; // From uboot
707ba16f JL	45	clock-frequency = <0>; // From uboot
707ba16f JL	46	};
	47	PowerPC,8641@1 {
	48	device_type = "cpu";
	49	reg = <1>;
6e050d4e JL	50	d-cache-line-size = <32>;
	51	i-cache-line-size = <32>;
	52	d-cache-size = <32768>;
	53	i-cache-size = <32768>;
	54	timebase-frequency = <0>; // From uboot
707ba16f JL	55	bus-frequency = <0>; // From uboot
707ba16f JL	56	clock-frequency = <0>; // From uboot
707ba16f JL	57	};
	58	};
	59
	60	memory {
	61	device_type = "memory";
6e050d4e	62	reg = <0x00000000 0x40000000>; // 1G at 0x0
707ba16f JL	63	};
707ba16f JL	64
0ac247d5 WF	65	localbus@f8005000 {
	66	#address-cells = <2>;
	67	#size-cells = <1>;
	68	compatible = "fsl,mpc8641-localbus", "simple-bus";
6e050d4e JL	69	reg = <0xf8005000 0x1000>;
6e050d4e JL	70	interrupts = <19 2>;
0ac247d5 WF	71	interrupt-parent = <&mpic>;
0ac247d5 WF	72
6e050d4e JL	73	ranges = <0 0 0xff800000 0x00800000
	74	1 0 0xfe000000 0x01000000
	75	2 0 0xf8200000 0x00100000
	76	3 0 0xf8100000 0x00100000>;
0ac247d5 WF	77
	78	flash@0,0 {
	79	compatible = "cfi-flash";
6e050d4e	80	reg = <0 0 0x00800000>;
0ac247d5 WF	81	bank-width = <2>;
	82	device-width = <2>;
	83	#address-cells = <1>;
	84	#size-cells = <1>;
	85	partition@0 {
	86	label = "kernel";
6e050d4e	87	reg = <0x00000000 0x00300000>;
0ac247d5 WF	88	};
	89	partition@300000 {
	90	label = "firmware b";
6e050d4e	91	reg = <0x00300000 0x00100000>;
0ac247d5 WF	92	read-only;
	93	};
	94	partition@400000 {
	95	label = "fs";
6e050d4e	96	reg = <0x00400000 0x00300000>;
0ac247d5 WF	97	};
	98	partition@700000 {
	99	label = "firmware a";
6e050d4e	100	reg = <0x00700000 0x00100000>;
0ac247d5 WF	101	read-only;
	102	};
	103	};
	104	};
	105
707ba16f JL	106	soc8641@f8000000 {
	107	#address-cells = <1>;
	108	#size-cells = <1>;
707ba16f	109	device_type = "soc";
0ac247d5	110	compatible = "simple-bus";
6e050d4e JL	111	ranges = <0x00000000 0xf8000000 0x00100000>;
6e050d4e JL	112	reg = <0xf8000000 0x00001000>; // CCSRBAR
707ba16f JL	113	bus-frequency = <0>;
	114
	115	i2c@3000 {
ec9686c4 KG	116	#address-cells = <1>;
	117	#size-cells = <0>;
	118	cell-index = <0>;
707ba16f	119	compatible = "fsl-i2c";
6e050d4e JL	120	reg = <0x3000 0x100>;
6e050d4e JL	121	interrupts = <43 2>;
6d9065d8	122	interrupt-parent = <&mpic>;
707ba16f JL	123	dfsrr;
	124	};
	125
	126	i2c@3100 {
ec9686c4 KG	127	#address-cells = <1>;
	128	#size-cells = <0>;
	129	cell-index = <1>;
707ba16f	130	compatible = "fsl-i2c";
6e050d4e JL	131	reg = <0x3100 0x100>;
6e050d4e JL	132	interrupts = <43 2>;
6d9065d8	133	interrupt-parent = <&mpic>;
707ba16f JL	134	dfsrr;
	135	};
	136
	137	mdio@24520 {
	138	#address-cells = <1>;
	139	#size-cells = <0>;
e77b28eb	140	compatible = "fsl,gianfar-mdio";
6e050d4e	141	reg = <0x24520 0x20>;
e77b28eb	142
6d9065d8 KG	143	phy0: ethernet-phy@0 {
6d9065d8 KG	144	interrupt-parent = <&mpic>;
6e050d4e	145	interrupts = <10 1>;
707ba16f JL	146	reg = <0>;
	147	device_type = "ethernet-phy";
	148	};
6d9065d8 KG	149	phy1: ethernet-phy@1 {
6d9065d8 KG	150	interrupt-parent = <&mpic>;
6e050d4e	151	interrupts = <10 1>;
707ba16f JL	152	reg = <1>;
	153	device_type = "ethernet-phy";
	154	};
6d9065d8 KG	155	phy2: ethernet-phy@2 {
6d9065d8 KG	156	interrupt-parent = <&mpic>;
6e050d4e	157	interrupts = <10 1>;
707ba16f JL	158	reg = <2>;
	159	device_type = "ethernet-phy";
	160	};
6d9065d8 KG	161	phy3: ethernet-phy@3 {
6d9065d8 KG	162	interrupt-parent = <&mpic>;
6e050d4e	163	interrupts = <10 1>;
707ba16f JL	164	reg = <3>;
	165	device_type = "ethernet-phy";
	166	};
	167	};
	168
1c1d1672	169	enet0: ethernet@24000 {
e77b28eb	170	cell-index = <0>;
707ba16f JL	171	device_type = "network";
	172	model = "TSEC";
	173	compatible = "gianfar";
6e050d4e	174	reg = <0x24000 0x1000>;
eae98266	175	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	176	interrupts = <29 2 30 2 34 2>;
6d9065d8 KG	177	interrupt-parent = <&mpic>;
6d9065d8 KG	178	phy-handle = <&phy0>;
cc65185d	179	phy-connection-type = "rgmii-id";
707ba16f JL	180	};
707ba16f JL	181
1c1d1672	182	enet1: ethernet@25000 {
e77b28eb	183	cell-index = <1>;
707ba16f JL	184	device_type = "network";
	185	model = "TSEC";
	186	compatible = "gianfar";
6e050d4e	187	reg = <0x25000 0x1000>;
eae98266	188	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	189	interrupts = <35 2 36 2 40 2>;
6d9065d8 KG	190	interrupt-parent = <&mpic>;
6d9065d8 KG	191	phy-handle = <&phy1>;
cc65185d	192	phy-connection-type = "rgmii-id";
707ba16f JL	193	};
707ba16f JL	194
1c1d1672	195	enet2: ethernet@26000 {
e77b28eb	196	cell-index = <2>;
707ba16f JL	197	device_type = "network";
	198	model = "TSEC";
	199	compatible = "gianfar";
6e050d4e	200	reg = <0x26000 0x1000>;
eae98266	201	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	202	interrupts = <31 2 32 2 33 2>;
6d9065d8 KG	203	interrupt-parent = <&mpic>;
6d9065d8 KG	204	phy-handle = <&phy2>;
cc65185d	205	phy-connection-type = "rgmii-id";
707ba16f JL	206	};
707ba16f JL	207
1c1d1672	208	enet3: ethernet@27000 {
e77b28eb	209	cell-index = <3>;
707ba16f JL	210	device_type = "network";
	211	model = "TSEC";
	212	compatible = "gianfar";
6e050d4e	213	reg = <0x27000 0x1000>;
eae98266	214	local-mac-address = [ 00 00 00 00 00 00 ];
6e050d4e	215	interrupts = <37 2 38 2 39 2>;
6d9065d8 KG	216	interrupt-parent = <&mpic>;
6d9065d8 KG	217	phy-handle = <&phy3>;
cc65185d	218	phy-connection-type = "rgmii-id";
707ba16f	219	};
1c1d1672 JL	220
1c1d1672 JL	221	serial0: serial@4500 {
ea082fa9	222	cell-index = <0>;
707ba16f JL	223	device_type = "serial";
707ba16f JL	224	compatible = "ns16550";
6e050d4e	225	reg = <0x4500 0x100>;
707ba16f	226	clock-frequency = <0>;
6e050d4e	227	interrupts = <42 2>;
6d9065d8	228	interrupt-parent = <&mpic>;
707ba16f JL	229	};
707ba16f JL	230
1c1d1672	231	serial1: serial@4600 {
ea082fa9	232	cell-index = <1>;
707ba16f JL	233	device_type = "serial";
707ba16f JL	234	compatible = "ns16550";
6e050d4e	235	reg = <0x4600 0x100>;
707ba16f	236	clock-frequency = <0>;
6e050d4e	237	interrupts = <28 2>;
6d9065d8	238	interrupt-parent = <&mpic>;
707ba16f JL	239	};
707ba16f JL	240
1b3c5cda	241	mpic: pic@40000 {
1b3c5cda KG	242	interrupt-controller;
	243	#address-cells = <0>;
	244	#interrupt-cells = <2>;
6e050d4e	245	reg = <0x40000 0x40000>;
1b3c5cda KG	246	compatible = "chrp,open-pic";
1b3c5cda KG	247	device_type = "open-pic";
1b3c5cda	248	};
e1c1575f KG	249
	250	global-utilities@e0000 {
	251	compatible = "fsl,mpc8641-guts";
6e050d4e	252	reg = <0xe0000 0x1000>;
e1c1575f KG	253	fsl,has-rstcr;
e1c1575f KG	254	};
1b3c5cda	255	};
707ba16f	256
1c1d1672	257	pci0: pcie@f8008000 {
ea082fa9	258	cell-index = <0>;
1b3c5cda KG	259	compatible = "fsl,mpc8641-pcie";
	260	device_type = "pci";
	261	#interrupt-cells = <1>;
	262	#size-cells = <2>;
	263	#address-cells = <3>;
6e050d4e JL	264	reg = <0xf8008000 0x1000>;
	265	bus-range = <0x0 0xff>;
	266	ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
	267	0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
	268	clock-frequency = <33333333>;
1b3c5cda	269	interrupt-parent = <&mpic>;
6e050d4e JL	270	interrupts = <24 2>;
6e050d4e JL	271	interrupt-map-mask = <0xff00 0 0 7>;
1b3c5cda	272	interrupt-map = <
bebfa06c	273	/* IDSEL 0x11 func 0 - PCI slot 1 */
6e050d4e JL	274	0x8800 0 0 1 &mpic 2 1
	275	0x8800 0 0 2 &mpic 3 1
	276	0x8800 0 0 3 &mpic 4 1
	277	0x8800 0 0 4 &mpic 1 1
bebfa06c KG	278
bebfa06c KG	279	/* IDSEL 0x11 func 1 - PCI slot 1 */
6e050d4e JL	280	0x8900 0 0 1 &mpic 2 1
	281	0x8900 0 0 2 &mpic 3 1
	282	0x8900 0 0 3 &mpic 4 1
	283	0x8900 0 0 4 &mpic 1 1
bebfa06c KG	284
bebfa06c KG	285	/* IDSEL 0x11 func 2 - PCI slot 1 */
6e050d4e JL	286	0x8a00 0 0 1 &mpic 2 1
	287	0x8a00 0 0 2 &mpic 3 1
	288	0x8a00 0 0 3 &mpic 4 1
	289	0x8a00 0 0 4 &mpic 1 1
bebfa06c KG	290
bebfa06c KG	291	/* IDSEL 0x11 func 3 - PCI slot 1 */
6e050d4e JL	292	0x8b00 0 0 1 &mpic 2 1
	293	0x8b00 0 0 2 &mpic 3 1
	294	0x8b00 0 0 3 &mpic 4 1
	295	0x8b00 0 0 4 &mpic 1 1
bebfa06c KG	296
bebfa06c KG	297	/* IDSEL 0x11 func 4 - PCI slot 1 */
6e050d4e JL	298	0x8c00 0 0 1 &mpic 2 1
	299	0x8c00 0 0 2 &mpic 3 1
	300	0x8c00 0 0 3 &mpic 4 1
	301	0x8c00 0 0 4 &mpic 1 1
bebfa06c KG	302
bebfa06c KG	303	/* IDSEL 0x11 func 5 - PCI slot 1 */
6e050d4e JL	304	0x8d00 0 0 1 &mpic 2 1
	305	0x8d00 0 0 2 &mpic 3 1
	306	0x8d00 0 0 3 &mpic 4 1
	307	0x8d00 0 0 4 &mpic 1 1
bebfa06c KG	308
bebfa06c KG	309	/* IDSEL 0x11 func 6 - PCI slot 1 */
6e050d4e JL	310	0x8e00 0 0 1 &mpic 2 1
	311	0x8e00 0 0 2 &mpic 3 1
	312	0x8e00 0 0 3 &mpic 4 1
	313	0x8e00 0 0 4 &mpic 1 1
bebfa06c KG	314
bebfa06c KG	315	/* IDSEL 0x11 func 7 - PCI slot 1 */
6e050d4e JL	316	0x8f00 0 0 1 &mpic 2 1
	317	0x8f00 0 0 2 &mpic 3 1
	318	0x8f00 0 0 3 &mpic 4 1
	319	0x8f00 0 0 4 &mpic 1 1
bebfa06c KG	320
bebfa06c KG	321	/* IDSEL 0x12 func 0 - PCI slot 2 */
6e050d4e JL	322	0x9000 0 0 1 &mpic 3 1
	323	0x9000 0 0 2 &mpic 4 1
	324	0x9000 0 0 3 &mpic 1 1
	325	0x9000 0 0 4 &mpic 2 1
bebfa06c KG	326
bebfa06c KG	327	/* IDSEL 0x12 func 1 - PCI slot 2 */
6e050d4e JL	328	0x9100 0 0 1 &mpic 3 1
	329	0x9100 0 0 2 &mpic 4 1
	330	0x9100 0 0 3 &mpic 1 1
	331	0x9100 0 0 4 &mpic 2 1
bebfa06c KG	332
bebfa06c KG	333	/* IDSEL 0x12 func 2 - PCI slot 2 */
6e050d4e JL	334	0x9200 0 0 1 &mpic 3 1
	335	0x9200 0 0 2 &mpic 4 1
	336	0x9200 0 0 3 &mpic 1 1
	337	0x9200 0 0 4 &mpic 2 1
bebfa06c KG	338
bebfa06c KG	339	/* IDSEL 0x12 func 3 - PCI slot 2 */
6e050d4e JL	340	0x9300 0 0 1 &mpic 3 1
	341	0x9300 0 0 2 &mpic 4 1
	342	0x9300 0 0 3 &mpic 1 1
	343	0x9300 0 0 4 &mpic 2 1
bebfa06c KG	344
bebfa06c KG	345	/* IDSEL 0x12 func 4 - PCI slot 2 */
6e050d4e JL	346	0x9400 0 0 1 &mpic 3 1
	347	0x9400 0 0 2 &mpic 4 1
	348	0x9400 0 0 3 &mpic 1 1
	349	0x9400 0 0 4 &mpic 2 1
bebfa06c KG	350
bebfa06c KG	351	/* IDSEL 0x12 func 5 - PCI slot 2 */
6e050d4e JL	352	0x9500 0 0 1 &mpic 3 1
	353	0x9500 0 0 2 &mpic 4 1
	354	0x9500 0 0 3 &mpic 1 1
	355	0x9500 0 0 4 &mpic 2 1
bebfa06c KG	356
bebfa06c KG	357	/* IDSEL 0x12 func 6 - PCI slot 2 */
6e050d4e JL	358	0x9600 0 0 1 &mpic 3 1
	359	0x9600 0 0 2 &mpic 4 1
	360	0x9600 0 0 3 &mpic 1 1
	361	0x9600 0 0 4 &mpic 2 1
bebfa06c KG	362
bebfa06c KG	363	/* IDSEL 0x12 func 7 - PCI slot 2 */
6e050d4e JL	364	0x9700 0 0 1 &mpic 3 1
	365	0x9700 0 0 2 &mpic 4 1
	366	0x9700 0 0 3 &mpic 1 1
	367	0x9700 0 0 4 &mpic 2 1
707ba16f	368
1b3c5cda	369	// IDSEL 0x1c USB
6e050d4e JL	370	0xe000 0 0 1 &i8259 12 2
	371	0xe100 0 0 2 &i8259 9 2
	372	0xe200 0 0 3 &i8259 10 2
	373	0xe300 0 0 4 &i8259 112
707ba16f	374
1b3c5cda	375	// IDSEL 0x1d Audio
6e050d4e	376	0xe800 0 0 1 &i8259 6 2
707ba16f	377
1b3c5cda	378	// IDSEL 0x1e Legacy
6e050d4e JL	379	0xf000 0 0 1 &i8259 7 2
6e050d4e JL	380	0xf100 0 0 1 &i8259 7 2
1b3c5cda KG	381
1b3c5cda KG	382	// IDSEL 0x1f IDE/SATA
6e050d4e JL	383	0xf800 0 0 1 &i8259 14 2
6e050d4e JL	384	0xf900 0 0 1 &i8259 5 2
1b3c5cda KG	385	>;
	386
	387	pcie@0 {
	388	reg = <0 0 0 0 0>;
	389	#size-cells = <2>;
	390	#address-cells = <3>;
	391	device_type = "pci";
6e050d4e JL	392	ranges = <0x02000000 0x0 0x80000000
	393	0x02000000 0x0 0x80000000
	394	0x0 0x20000000
1b3c5cda	395
6e050d4e JL	396	0x01000000 0x0 0x00000000
	397	0x01000000 0x0 0x00000000
	398	0x0 0x00100000>;
dfac6faf WF	399	uli1575@0 {
	400	reg = <0 0 0 0 0>;
	401	#size-cells = <2>;
	402	#address-cells = <3>;
6e050d4e JL	403	ranges = <0x02000000 0x0 0x80000000
	404	0x02000000 0x0 0x80000000
	405	0x0 0x20000000
	406	0x01000000 0x0 0x00000000
	407	0x01000000 0x0 0x00000000
	408	0x0 0x00100000>;
1b3c5cda KG	409	isa@1e {
	410	device_type = "isa";
	411	#interrupt-cells = <2>;
	412	#size-cells = <1>;
	413	#address-cells = <2>;
6e050d4e JL	414	reg = <0xf000 0 0 0 0>;
	415	ranges = <1 0 0x01000000 0 0
	416	0x00001000>;
1b3c5cda	417	interrupt-parent = <&i8259>;
dfac6faf	418
1b3c5cda	419	i8259: interrupt-controller@20 {
6e050d4e JL	420	reg = <1 0x20 2
	421	1 0xa0 2
	422	1 0x4d0 2>;
1b3c5cda KG	423	interrupt-controller;
	424	device_type = "interrupt-controller";
	425	#address-cells = <0>;
dfac6faf	426	#interrupt-cells = <2>;
1b3c5cda KG	427	compatible = "chrp,iic";
	428	interrupts = <9 2>;
	429	interrupt-parent = <&mpic>;
	430	};
dfac6faf	431
1b3c5cda KG	432	i8042@60 {
	433	#size-cells = <0>;
	434	#address-cells = <1>;
6e050d4e JL	435	reg = <1 0x60 1 1 0x64 1>;
6e050d4e JL	436	interrupts = <1 3 12 3>;
1b3c5cda KG	437	interrupt-parent =
1b3c5cda KG	438	<&i8259>;
dfac6faf	439
1b3c5cda KG	440	keyboard@0 {
	441	reg = <0>;
	442	compatible = "pnpPNP,303";
dfac6faf WF	443	};
dfac6faf WF	444
1b3c5cda KG	445	mouse@1 {
	446	reg = <1>;
	447	compatible = "pnpPNP,f03";
dfac6faf	448	};
1b3c5cda	449	};
dfac6faf	450
1b3c5cda KG	451	rtc@70 {
	452	compatible =
	453	"pnpPNP,b00";
6e050d4e	454	reg = <1 0x70 2>;
1b3c5cda KG	455	};
	456
	457	gpio@400 {
6e050d4e	458	reg = <1 0x400 0x80>;
dfac6faf WF	459	};
dfac6faf WF	460	};
707ba16f	461	};
707ba16f	462	};
e0e3c8d4	463
1b3c5cda KG	464	};
1b3c5cda KG	465
1c1d1672	466	pci1: pcie@f8009000 {
ea082fa9	467	cell-index = <1>;
1b3c5cda KG	468	compatible = "fsl,mpc8641-pcie";
	469	device_type = "pci";
	470	#interrupt-cells = <1>;
	471	#size-cells = <2>;
	472	#address-cells = <3>;
6e050d4e JL	473	reg = <0xf8009000 0x1000>;
	474	bus-range = <0 0xff>;
	475	ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
	476	0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
	477	clock-frequency = <33333333>;
1b3c5cda	478	interrupt-parent = <&mpic>;
6e050d4e JL	479	interrupts = <25 2>;
6e050d4e JL	480	interrupt-map-mask = <0xf800 0 0 7>;
1b3c5cda KG	481	interrupt-map = <
1b3c5cda KG	482	/* IDSEL 0x0 */
6e050d4e JL	483	0x0000 0 0 1 &mpic 4 1
	484	0x0000 0 0 2 &mpic 5 1
	485	0x0000 0 0 3 &mpic 6 1
	486	0x0000 0 0 4 &mpic 7 1
1b3c5cda KG	487	>;
	488	pcie@0 {
	489	reg = <0 0 0 0 0>;
e0e3c8d4 ZW	490	#size-cells = <2>;
e0e3c8d4 ZW	491	#address-cells = <3>;
1b3c5cda	492	device_type = "pci";
6e050d4e JL	493	ranges = <0x02000000 0x0 0xa0000000
	494	0x02000000 0x0 0xa0000000
	495	0x0 0x20000000
e0e3c8d4	496
6e050d4e JL	497	0x01000000 0x0 0x00000000
	498	0x01000000 0x0 0x00000000
	499	0x0 0x00100000>;
707ba16f JL	500	};
707ba16f JL	501	};
56fde1ff ZW	502	rapidio0: rapidio@f80c0000 {
	503	#address-cells = <2>;
	504	#size-cells = <2>;
	505	compatible = "fsl,rapidio-delta";
	506	reg = <0xf80c0000 0x20000>;
	507	ranges = <0 0 0xc0000000 0 0x20000000>;
	508	interrupt-parent = <&mpic>;
	509	/* err_irq bell_outb_irq bell_inb_irq
	510	msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */
	511	interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
	512	};
707ba16f	513	};