[deliverable/linux.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts

/*
 * MPC8641 HPCN Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */


/ {
	model = "MPC8641HPCN";
	compatible = "mpc86xx";
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#cpus = <2>;
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8641@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;	// 32 bytes
			i-cache-line-size = <20>;	// 32 bytes
			d-cache-size = <8000>;		// L1, 32K
			i-cache-size = <8000>;		// L1, 32K
			timebase-frequency = <0>;	// 33 MHz, from uboot
			bus-frequency = <0>;		// From uboot
			clock-frequency = <0>;		// From uboot
			32-bit;
		};
		PowerPC,8641@1 {
			device_type = "cpu";
			reg = <1>;
			d-cache-line-size = <20>;	// 32 bytes
			i-cache-line-size = <20>;	// 32 bytes
			d-cache-size = <8000>;		// L1, 32K
			i-cache-size = <8000>;		// L1, 32K
			timebase-frequency = <0>;	// 33 MHz, from uboot
			bus-frequency = <0>;		// From uboot
			clock-frequency = <0>;		// From uboot
			32-bit;
		};
	};

	memory {
		device_type = "memory";
		reg = <00000000 40000000>;	// 1G at 0x0
	};

	soc8641@f8000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		device_type = "soc";
		ranges = <0 f8000000 00100000>;
		reg = <f8000000 00100000>;	// CCSRBAR 1M
		bus-frequency = <0>;

		i2c@3000 {
			device_type = "i2c";
			compatible = "fsl-i2c";
			reg = <3000 100>;
			interrupts = <2b 2>;
			interrupt-parent = <40000>;
			dfsrr;
		};

		i2c@3100 {
			device_type = "i2c";
			compatible = "fsl-i2c";
			reg = <3100 100>;
			interrupts = <2b 2>;
			interrupt-parent = <40000>;
			dfsrr;
		};

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "mdio";
			compatible = "gianfar";
			reg = <24520 20>;
			linux,phandle = <24520>;
			ethernet-phy@0 {
				linux,phandle = <2452000>;
				interrupt-parent = <40000>;
				interrupts = <4a 1>;
				reg = <0>;
				device_type = "ethernet-phy";
			};
			ethernet-phy@1 {
				linux,phandle = <2452001>;
				interrupt-parent = <40000>;
				interrupts = <4a 1>;
				reg = <1>;
				device_type = "ethernet-phy";
			};
			ethernet-phy@2 {
				linux,phandle = <2452002>;
				interrupt-parent = <40000>;
				interrupts = <4a 1>;
				reg = <2>;
				device_type = "ethernet-phy";
			};
			ethernet-phy@3 {
				linux,phandle = <2452003>;
				interrupt-parent = <40000>;
				interrupts = <4a 1>;
				reg = <3>;
				device_type = "ethernet-phy";
			};
		};

		ethernet@24000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <24000 1000>;
			mac-address = [ 00 E0 0C 00 73 00 ];
			interrupts = <1d 2 1e 2 22 2>;
			interrupt-parent = <40000>;
			phy-handle = <2452000>;
		};

		ethernet@25000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <25000 1000>;
			mac-address = [ 00 E0 0C 00 73 01 ];
			interrupts = <23 2 24 2 28 2>;
			interrupt-parent = <40000>;
			phy-handle = <2452001>;
		};
		
		ethernet@26000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <26000 1000>;
			mac-address = [ 00 E0 0C 00 02 FD ];
			interrupts = <1F 2 20 2 21 2>;
			interrupt-parent = <40000>;
			phy-handle = <2452002>;
		};

		ethernet@27000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <27000 1000>;
			mac-address = [ 00 E0 0C 00 03 FD ];
			interrupts = <25 2 26 2 27 2>;
			interrupt-parent = <40000>;
			phy-handle = <2452003>;
		};
		serial@4500 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <4500 100>;
			clock-frequency = <0>;
			interrupts = <2a 2>;
			interrupt-parent = <40000>;
		};

		serial@4600 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <4600 100>;
			clock-frequency = <0>;
			interrupts = <1c 2>;
			interrupt-parent = <40000>;
		};

		pci@8000 {
			compatible = "86xx";
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			reg = <8000 1000>;
			bus-range = <0 fe>;
			ranges = <02000000 0 80000000 80000000 0 20000000
				  01000000 0 00000000 e2000000 0 00100000>;
			clock-frequency = <1fca055>;
			interrupt-parent = <40000>;
			interrupts = <18 2>;
			interrupt-map-mask = <f800 0 0 7>;
			interrupt-map = <
				/* IDSEL 0x11 */
				8800 0 0 1 4d0 3 2
				8800 0 0 2 4d0 4 2
				8800 0 0 3 4d0 5 2
				8800 0 0 4 4d0 6 2

				/* IDSEL 0x12 */
				9000 0 0 1 4d0 4 2
				9000 0 0 2 4d0 5 2
				9000 0 0 3 4d0 6 2
				9000 0 0 4 4d0 3 2

				/* IDSEL 0x13 */
				9800 0 0 1 4d0 0 0
				9800 0 0 2 4d0 0 0
				9800 0 0 3 4d0 0 0
				9800 0 0 4 4d0 0 0

				/* IDSEL 0x14 */
				a000 0 0 1 4d0 0 0
				a000 0 0 2 4d0 0 0
				a000 0 0 3 4d0 0 0
				a000 0 0 4 4d0 0 0

				/* IDSEL 0x15 */
				a800 0 0 1 4d0 0 0
				a800 0 0 2 4d0 0 0
				a800 0 0 3 4d0 0 0
				a800 0 0 4 4d0 0 0

				/* IDSEL 0x16 */
				b000 0 0 1 4d0 0 0
				b000 0 0 2 4d0 0 0
				b000 0 0 3 4d0 0 0
				b000 0 0 4 4d0 0 0

				/* IDSEL 0x17 */
				b800 0 0 1 4d0 0 0
				b800 0 0 2 4d0 0 0
				b800 0 0 3 4d0 0 0
				b800 0 0 4 4d0 0 0

				/* IDSEL 0x18 */
				c000 0 0 1 4d0 0 0
				c000 0 0 2 4d0 0 0
				c000 0 0 3 4d0 0 0
				c000 0 0 4 4d0 0 0

				/* IDSEL 0x19 */
				c800 0 0 1 4d0 0 0
				c800 0 0 2 4d0 0 0
				c800 0 0 3 4d0 0 0
				c800 0 0 4 4d0 0 0

				/* IDSEL 0x1a */
				d000 0 0 1 4d0 6 2
				d000 0 0 2 4d0 3 2
				d000 0 0 3 4d0 4 2
				d000 0 0 4 4d0 5 2


				/* IDSEL 0x1b */
				d800 0 0 1 4d0 5 2
				d800 0 0 2 4d0 0 0
				d800 0 0 3 4d0 0 0
				d800 0 0 4 4d0 0 0

				/* IDSEL 0x1c */
				e000 0 0 1 4d0 9 2
				e000 0 0 2 4d0 a 2
				e000 0 0 3 4d0 c 2
				e000 0 0 4 4d0 7 2

				/* IDSEL 0x1d */
				e800 0 0 1 4d0 9 2
				e800 0 0 2 4d0 a 2
				e800 0 0 3 4d0 b 2
				e800 0 0 4 4d0 0 0

				/* IDSEL 0x1e */
				f000 0 0 1 4d0 c 2
				f000 0 0 2 4d0 0 0
				f000 0 0 3 4d0 0 0
				f000 0 0 4 4d0 0 0

				/* IDSEL 0x1f */
				f800 0 0 1 4d0 6 2
				f800 0 0 2 4d0 0 0
				f800 0 0 3 4d0 0 0
				f800 0 0 4 4d0 0 0
				>;
			i8259@4d0 {
				linux,phandle = <4d0>;
				clock-frequency = <0>;
				interrupt-controller;
				device_type = "interrupt-controller";
				#address-cells = <0>;
				#interrupt-cells = <2>;
				built-in;
				compatible = "chrp,iic";
                	        big-endian;
				interrupts = <49 2>;
				interrupt-parent = <40000>;
			};

		};
		pic@40000 {
			linux,phandle = <40000>;
			clock-frequency = <0>;
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <40000 40000>;
			built-in;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
                        big-endian;
			interrupts = <
				10 2 11 2 12 2 13 2
				14 2 15 2 16 2 17 2
				18 2 19 2 1a 2 1b 2
				1c 2 1d 2 1e 2 1f 2
				20 2 21 2 22 2 23 2
				24 2 25 2 26 2 27 2
				28 2 29 2 2a 2 2b 2
				2c 2 2d 2 2e 2 2f 2
				30 2 31 2 32 2 33 2
				34 2 35 2 36 2 37 2
				38 2 39 2 2a 2 3b 2
				3c 2 3d 2 3e 2 3f 2
				48 1 49 2 4a 1
				>;
			interrupt-parent = <40000>;
		};
	};
};
Commit	Line	Data
707ba16f JL	1	/*
	2	* MPC8641 HPCN Device Tree Source
	3	*
	4	* Copyright 2006 Freescale Semiconductor Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
	12
	13	/ {
	14	model = "MPC8641HPCN";
	15	compatible = "mpc86xx";
	16	#address-cells = <1>;
	17	#size-cells = <1>;
	18
	19	cpus {
	20	#cpus = <2>;
	21	#address-cells = <1>;
	22	#size-cells = <0>;
	23
	24	PowerPC,8641@0 {
	25	device_type = "cpu";
	26	reg = <0>;
	27	d-cache-line-size = <20>; // 32 bytes
	28	i-cache-line-size = <20>; // 32 bytes
	29	d-cache-size = <8000>; // L1, 32K
	30	i-cache-size = <8000>; // L1, 32K
	31	timebase-frequency = <0>; // 33 MHz, from uboot
	32	bus-frequency = <0>; // From uboot
	33	clock-frequency = <0>; // From uboot
	34	32-bit;
707ba16f JL	35	};
	36	PowerPC,8641@1 {
	37	device_type = "cpu";
	38	reg = <1>;
	39	d-cache-line-size = <20>; // 32 bytes
	40	i-cache-line-size = <20>; // 32 bytes
	41	d-cache-size = <8000>; // L1, 32K
	42	i-cache-size = <8000>; // L1, 32K
	43	timebase-frequency = <0>; // 33 MHz, from uboot
	44	bus-frequency = <0>; // From uboot
	45	clock-frequency = <0>; // From uboot
	46	32-bit;
	47	};
	48	};
	49
	50	memory {
	51	device_type = "memory";
	52	reg = <00000000 40000000>; // 1G at 0x0
	53	};
	54
	55	soc8641@f8000000 {
	56	#address-cells = <1>;
	57	#size-cells = <1>;
	58	#interrupt-cells = <2>;
	59	device_type = "soc";
	60	ranges = <0 f8000000 00100000>;
	61	reg = <f8000000 00100000>; // CCSRBAR 1M
	62	bus-frequency = <0>;
	63
	64	i2c@3000 {
	65	device_type = "i2c";
	66	compatible = "fsl-i2c";
	67	reg = <3000 100>;
	68	interrupts = <2b 2>;
	69	interrupt-parent = <40000>;
	70	dfsrr;
	71	};
	72
	73	i2c@3100 {
	74	device_type = "i2c";
	75	compatible = "fsl-i2c";
	76	reg = <3100 100>;
	77	interrupts = <2b 2>;
	78	interrupt-parent = <40000>;
	79	dfsrr;
	80	};
	81
	82	mdio@24520 {
	83	#address-cells = <1>;
	84	#size-cells = <0>;
	85	device_type = "mdio";
	86	compatible = "gianfar";
	87	reg = <24520 20>;
	88	linux,phandle = <24520>;
	89	ethernet-phy@0 {
	90	linux,phandle = <2452000>;
	91	interrupt-parent = <40000>;
	92	interrupts = <4a 1>;
	93	reg = <0>;
	94	device_type = "ethernet-phy";
	95	};
	96	ethernet-phy@1 {
	97	linux,phandle = <2452001>;
	98	interrupt-parent = <40000>;
99	interrupts = <4a 1>;
100	reg = <1>;
101	device_type = "ethernet-phy";
102	};
103	ethernet-phy@2 {
104	linux,phandle = <2452002>;
105	interrupt-parent = <40000>;
106	interrupts = <4a 1>;
107	reg = <2>;
108	device_type = "ethernet-phy";
109	};
110	ethernet-phy@3 {
111	linux,phandle = <2452003>;
112	interrupt-parent = <40000>;
113	interrupts = <4a 1>;
114	reg = <3>;
115	device_type = "ethernet-phy";
116	};
117	};
118
119	ethernet@24000 {
120	#address-cells = <1>;
121	#size-cells = <0>;
122	device_type = "network";
123	model = "TSEC";
124	compatible = "gianfar";
125	reg = <24000 1000>;
126	mac-address = [ 00 E0 0C 00 73 00 ];
127	interrupts = <1d 2 1e 2 22 2>;
128	interrupt-parent = <40000>;
129	phy-handle = <2452000>;
130	};
131
132	ethernet@25000 {
133	#address-cells = <1>;
134	#size-cells = <0>;
135	device_type = "network";
136	model = "TSEC";
137	compatible = "gianfar";
138	reg = <25000 1000>;
139	mac-address = [ 00 E0 0C 00 73 01 ];
140	interrupts = <23 2 24 2 28 2>;
141	interrupt-parent = <40000>;
142	phy-handle = <2452001>;
143	};
144
145	ethernet@26000 {
146	#address-cells = <1>;
147	#size-cells = <0>;
148	device_type = "network";
149	model = "TSEC";
150	compatible = "gianfar";
151	reg = <26000 1000>;
152	mac-address = [ 00 E0 0C 00 02 FD ];
153	interrupts = <1F 2 20 2 21 2>;
154	interrupt-parent = <40000>;
155	phy-handle = <2452002>;
156	};
157
158	ethernet@27000 {
159	#address-cells = <1>;
160	#size-cells = <0>;
161	device_type = "network";
162	model = "TSEC";
163	compatible = "gianfar";
164	reg = <27000 1000>;
165	mac-address = [ 00 E0 0C 00 03 FD ];
166	interrupts = <25 2 26 2 27 2>;
167	interrupt-parent = <40000>;
168	phy-handle = <2452003>;
169	};
170	serial@4500 {
171	device_type = "serial";
172	compatible = "ns16550";
173	reg = <4500 100>;
174	clock-frequency = <0>;
175	interrupts = <2a 2>;
176	interrupt-parent = <40000>;
177	};
178
179	serial@4600 {
180	device_type = "serial";
181	compatible = "ns16550";
182	reg = <4600 100>;
183	clock-frequency = <0>;
184	interrupts = <1c 2>;
185	interrupt-parent = <40000>;
186	};
187
188	pci@8000 {
189	compatible = "86xx";
190	device_type = "pci";
191	#interrupt-cells = <1>;
192	#size-cells = <2>;
193	#address-cells = <3>;
194	reg = <8000 1000>;
195	bus-range = <0 fe>;
196	ranges = <02000000 0 80000000 80000000 0 20000000
197	01000000 0 00000000 e2000000 0 00100000>;
198	clock-frequency = <1fca055>;
199	interrupt-parent = <40000>;
200	interrupts = <18 2>;
201	interrupt-map-mask = <f800 0 0 7>;
202	interrupt-map = <
203	/* IDSEL 0x11 */
204	8800 0 0 1 4d0 3 2
205	8800 0 0 2 4d0 4 2
206	8800 0 0 3 4d0 5 2
207	8800 0 0 4 4d0 6 2
208
209	/* IDSEL 0x12 */
210	9000 0 0 1 4d0 4 2
211	9000 0 0 2 4d0 5 2
212	9000 0 0 3 4d0 6 2
213	9000 0 0 4 4d0 3 2
214
215	/* IDSEL 0x13 */
216	9800 0 0 1 4d0 0 0
217	9800 0 0 2 4d0 0 0
218	9800 0 0 3 4d0 0 0
219	9800 0 0 4 4d0 0 0
220
221	/* IDSEL 0x14 */
222	a000 0 0 1 4d0 0 0
223	a000 0 0 2 4d0 0 0
224	a000 0 0 3 4d0 0 0
225	a000 0 0 4 4d0 0 0
226
227	/* IDSEL 0x15 */
228	a800 0 0 1 4d0 0 0
229	a800 0 0 2 4d0 0 0
230	a800 0 0 3 4d0 0 0
231	a800 0 0 4 4d0 0 0
232
233	/* IDSEL 0x16 */
234	b000 0 0 1 4d0 0 0
235	b000 0 0 2 4d0 0 0
236	b000 0 0 3 4d0 0 0
237	b000 0 0 4 4d0 0 0
238
239	/* IDSEL 0x17 */
240	b800 0 0 1 4d0 0 0
241	b800 0 0 2 4d0 0 0
242	b800 0 0 3 4d0 0 0
243	b800 0 0 4 4d0 0 0
244
245	/* IDSEL 0x18 */
246	c000 0 0 1 4d0 0 0
247	c000 0 0 2 4d0 0 0
248	c000 0 0 3 4d0 0 0
249	c000 0 0 4 4d0 0 0
250
251	/* IDSEL 0x19 */
252	c800 0 0 1 4d0 0 0
253	c800 0 0 2 4d0 0 0
254	c800 0 0 3 4d0 0 0
255	c800 0 0 4 4d0 0 0
256
257	/* IDSEL 0x1a */
258	d000 0 0 1 4d0 6 2
259	d000 0 0 2 4d0 3 2
260	d000 0 0 3 4d0 4 2
261	d000 0 0 4 4d0 5 2
262
263
264	/* IDSEL 0x1b */
265	d800 0 0 1 4d0 5 2
266	d800 0 0 2 4d0 0 0
267	d800 0 0 3 4d0 0 0
268	d800 0 0 4 4d0 0 0
269
270	/* IDSEL 0x1c */
271	e000 0 0 1 4d0 9 2
272	e000 0 0 2 4d0 a 2
273	e000 0 0 3 4d0 c 2
274	e000 0 0 4 4d0 7 2
275
276	/* IDSEL 0x1d */
277	e800 0 0 1 4d0 9 2
278	e800 0 0 2 4d0 a 2
279	e800 0 0 3 4d0 b 2
280	e800 0 0 4 4d0 0 0
281
282	/* IDSEL 0x1e */
283	f000 0 0 1 4d0 c 2
284	f000 0 0 2 4d0 0 0
285	f000 0 0 3 4d0 0 0
286	f000 0 0 4 4d0 0 0
287
288	/* IDSEL 0x1f */
289	f800 0 0 1 4d0 6 2
290	f800 0 0 2 4d0 0 0
291	f800 0 0 3 4d0 0 0
292	f800 0 0 4 4d0 0 0
293	>;
294	i8259@4d0 {
9e8a9bc2	295	linux,phandle = <4d0>;
707ba16f JL	296	clock-frequency = <0>;
	297	interrupt-controller;
	298	device_type = "interrupt-controller";
	299	#address-cells = <0>;
	300	#interrupt-cells = <2>;
	301	built-in;
	302	compatible = "chrp,iic";
	303	big-endian;
	304	interrupts = <49 2>;
	305	interrupt-parent = <40000>;
	306	};
	307
	308	};
	309	pic@40000 {
	310	linux,phandle = <40000>;
	311	clock-frequency = <0>;
	312	interrupt-controller;
	313	#address-cells = <0>;
	314	#interrupt-cells = <2>;
	315	reg = <40000 40000>;
	316	built-in;
	317	compatible = "chrp,open-pic";
	318	device_type = "open-pic";
	319	big-endian;
	320	interrupts = <
	321	10 2 11 2 12 2 13 2
	322	14 2 15 2 16 2 17 2
	323	18 2 19 2 1a 2 1b 2
	324	1c 2 1d 2 1e 2 1f 2
	325	20 2 21 2 22 2 23 2
	326	24 2 25 2 26 2 27 2
	327	28 2 29 2 2a 2 2b 2
	328	2c 2 2d 2 2e 2 2f 2
	329	30 2 31 2 32 2 33 2
	330	34 2 35 2 36 2 37 2
	331	38 2 39 2 2a 2 3b 2
	332	3c 2 3d 2 3e 2 3f 2
	333	48 1 49 2 4a 1
	334	>;
	335	interrupt-parent = <40000>;
	336	};
	337	};
	338	};