[deliverable/linux.git] / arch / powerpc / boot / dts / pq2fads.dts

/*
 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
 *
 * Copyright 2007 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/ {
	model = "pq2fads";
	compatible = "fsl,pq2fads";
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <d#32>;
			i-cache-line-size = <d#32>;
			d-cache-size = <d#16384>;
			i-cache-size = <d#16384>;
			timebase-frequency = <0>;
			clock-frequency = <0>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0 0>;
	};

	localbus@f0010100 {
		compatible = "fsl,mpc8280-localbus",
		             "fsl,pq2-localbus";
		#address-cells = <2>;
		#size-cells = <1>;
		reg = <f0010100 60>;

		ranges = <0 0 fe000000 00800000
		          1 0 f4500000 00008000
		          8 0 f8200000 00008000>;

		flash@0,0 {
			compatible = "jedec-flash";
			reg = <0 0 800000>;
			bank-width = <4>;
			device-width = <1>;
		};

		bcsr@1,0 {
			reg = <1 0 20>;
			compatible = "fsl,pq2fads-bcsr";
		};

		PCI_PIC: pic@8,0 {
			#interrupt-cells = <1>;
			interrupt-controller;
			reg = <8 0 8>;
			compatible = "fsl,pq2ads-pci-pic";
			interrupt-parent = <&PIC>;
			interrupts = <18 8>;
		};
	};

	pci@f0010800 {
		device_type = "pci";
		reg = <f0010800 10c f00101ac 8 f00101c4 8>;
		compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		clock-frequency = <d#66000000>;
		interrupt-map-mask = <f800 0 0 7>;
		interrupt-map = <
		                /* IDSEL 0x16 */
		                 b000 0 0 1 &PCI_PIC 0
		                 b000 0 0 2 &PCI_PIC 1
		                 b000 0 0 3 &PCI_PIC 2
		                 b000 0 0 4 &PCI_PIC 3

		                /* IDSEL 0x17 */
		                 b800 0 0 1 &PCI_PIC 4
		                 b800 0 0 2 &PCI_PIC 5
		                 b800 0 0 3 &PCI_PIC 6
		                 b800 0 0 4 &PCI_PIC 7

		                /* IDSEL 0x18 */
		                 c000 0 0 1 &PCI_PIC 8
		                 c000 0 0 2 &PCI_PIC 9
		                 c000 0 0 3 &PCI_PIC a
		                 c000 0 0 4 &PCI_PIC b>;

		interrupt-parent = <&PIC>;
		interrupts = <12 8>;
		ranges = <42000000 0 80000000 80000000 0 20000000
		          02000000 0 a0000000 a0000000 0 20000000
		          01000000 0 00000000 f6000000 0 02000000>;
	};

	soc@f0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "fsl,mpc8280", "fsl,pq2-soc";
		ranges = <00000000 f0000000 00053000>;

		// Temporary -- will go away once kernel uses ranges for get_immrbase().
		reg = <f0000000 00053000>;

		cpm@119c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			#interrupt-cells = <2>;
			compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
			reg = <119c0 30>;
			ranges;

			muram@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0 10000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0 2000 9800 800>;
				};
			};

			brg@119f0 {
				compatible = "fsl,mpc8280-brg",
				             "fsl,cpm2-brg",
				             "fsl,cpm-brg";
				reg = <119f0 10 115f0 10>;
			};

			serial@11a00 {
				device_type = "serial";
				compatible = "fsl,mpc8280-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <11a00 20 8000 100>;
				interrupts = <28 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <00800000>;
			};

			serial@11a20 {
				device_type = "serial";
				compatible = "fsl,mpc8280-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <11a20 20 8100 100>;
				interrupts = <29 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-brg = <2>;
				fsl,cpm-command = <04a00000>;
			};

			ethernet@11320 {
				device_type = "network";
				compatible = "fsl,mpc8280-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <11320 20 8500 100 113b0 1>;
				interrupts = <21 8>;
				interrupt-parent = <&PIC>;
				phy-handle = <&PHY0>;
				linux,network-index = <0>;
				fsl,cpm-command = <16200300>;
			};

			ethernet@11340 {
				device_type = "network";
				compatible = "fsl,mpc8280-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <11340 20 8600 100 113d0 1>;
				interrupts = <22 8>;
				interrupt-parent = <&PIC>;
				phy-handle = <&PHY1>;
				linux,network-index = <1>;
				fsl,cpm-command = <1a400300>;
				local-mac-address = [00 e0 0c 00 79 01];
			};

			mdio@10d40 {
				device_type = "mdio";
				compatible = "fsl,pq2fads-mdio-bitbang",
				             "fsl,mpc8280-mdio-bitbang",
				             "fsl,cpm2-mdio-bitbang";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <10d40 14>;
				fsl,mdio-pin = <9>;
				fsl,mdc-pin = <a>;

				PHY0: ethernet-phy@0 {
					interrupt-parent = <&PIC>;
					interrupts = <19 2>;
					reg = <0>;
					device_type = "ethernet-phy";
				};

				PHY1: ethernet-phy@1 {
					interrupt-parent = <&PIC>;
					interrupts = <19 2>;
					reg = <3>;
					device_type = "ethernet-phy";
				};
			};

			usb@11b60 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,mpc8280-usb",
				             "fsl,cpm2-usb";
				reg = <11b60 18 8b00 100>;
				interrupt-parent = <&PIC>;
				interrupts = <b 8>;
				fsl,cpm-command = <2e600000>;
			};
		};

		PIC: interrupt-controller@10c00 {
			#interrupt-cells = <2>;
			interrupt-controller;
			reg = <10c00 80>;
			compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
		};

	};

	chosen {
		linux,stdout-path = "/soc/cpm/serial@11a00";
	};
};
Commit	Line	Data
3611f2ad SW	1	/*
	2	* Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
	3	*
	4	* Copyright 2007 Freescale Semiconductor Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
	12	/ {
	13	model = "pq2fads";
	14	compatible = "fsl,pq2fads";
	15	#address-cells = <1>;
	16	#size-cells = <1>;
	17
	18	cpus {
	19	#address-cells = <1>;
	20	#size-cells = <0>;
	21
	22	cpu@0 {
	23	device_type = "cpu";
	24	reg = <0>;
	25	d-cache-line-size = <d#32>;
	26	i-cache-line-size = <d#32>;
	27	d-cache-size = <d#16384>;
	28	i-cache-size = <d#16384>;
	29	timebase-frequency = <0>;
	30	clock-frequency = <0>;
	31	};
	32	};
	33
	34	memory {
	35	device_type = "memory";
	36	reg = <0 0>;
	37	};
	38
	39	localbus@f0010100 {
	40	compatible = "fsl,mpc8280-localbus",
	41	"fsl,pq2-localbus";
	42	#address-cells = <2>;
	43	#size-cells = <1>;
	44	reg = <f0010100 60>;
	45
	46	ranges = <0 0 fe000000 00800000
	47	1 0 f4500000 00008000
	48	8 0 f8200000 00008000>;
	49
	50	flash@0,0 {
	51	compatible = "jedec-flash";
	52	reg = <0 0 800000>;
	53	bank-width = <4>;
	54	device-width = <1>;
	55	};
	56
	57	bcsr@1,0 {
	58	reg = <1 0 20>;
	59	compatible = "fsl,pq2fads-bcsr";
	60	};
	61
	62	PCI_PIC: pic@8,0 {
	63	#interrupt-cells = <1>;
	64	interrupt-controller;
65	reg = <8 0 8>;
66	compatible = "fsl,pq2ads-pci-pic";
67	interrupt-parent = <&PIC>;
68	interrupts = <18 8>;
69	};
70	};
71
72	pci@f0010800 {
73	device_type = "pci";
74	reg = <f0010800 10c f00101ac 8 f00101c4 8>;
75	compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
76	#interrupt-cells = <1>;
77	#size-cells = <2>;
78	#address-cells = <3>;
79	clock-frequency = <d#66000000>;
80	interrupt-map-mask = <f800 0 0 7>;
81	interrupt-map = <
82	/* IDSEL 0x16 */
83	b000 0 0 1 &PCI_PIC 0
84	b000 0 0 2 &PCI_PIC 1
85	b000 0 0 3 &PCI_PIC 2
86	b000 0 0 4 &PCI_PIC 3
87
88	/* IDSEL 0x17 */
89	b800 0 0 1 &PCI_PIC 4
90	b800 0 0 2 &PCI_PIC 5
91	b800 0 0 3 &PCI_PIC 6
92	b800 0 0 4 &PCI_PIC 7
93
94	/* IDSEL 0x18 */
95	c000 0 0 1 &PCI_PIC 8
96	c000 0 0 2 &PCI_PIC 9
97	c000 0 0 3 &PCI_PIC a
98	c000 0 0 4 &PCI_PIC b>;
99
100	interrupt-parent = <&PIC>;
101	interrupts = <12 8>;
102	ranges = <42000000 0 80000000 80000000 0 20000000
103	02000000 0 a0000000 a0000000 0 20000000
104	01000000 0 00000000 f6000000 0 02000000>;
105	};
106
107	soc@f0000000 {
108	#address-cells = <1>;
109	#size-cells = <1>;
110	device_type = "soc";
111	compatible = "fsl,mpc8280", "fsl,pq2-soc";
112	ranges = <00000000 f0000000 00053000>;
113
114	// Temporary -- will go away once kernel uses ranges for get_immrbase().
115	reg = <f0000000 00053000>;
116
117	cpm@119c0 {
118	#address-cells = <1>;
119	#size-cells = <1>;
120	#interrupt-cells = <2>;
121	compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
15f8c604	122	reg = <119c0 30>;
3611f2ad SW	123	ranges;
3611f2ad SW	124
15f8c604 SW	125	muram@0 {
	126	#address-cells = <1>;
	127	#size-cells = <1>;
	128	ranges = <0 0 10000>;
	129
	130	data@0 {
	131	compatible = "fsl,cpm-muram-data";
	132	reg = <0 2000 9800 800>;
	133	};
	134	};
	135
3611f2ad SW	136	brg@119f0 {
	137	compatible = "fsl,mpc8280-brg",
	138	"fsl,cpm2-brg",
	139	"fsl,cpm-brg";
	140	reg = <119f0 10 115f0 10>;
	141	};
	142
	143	serial@11a00 {
	144	device_type = "serial";
	145	compatible = "fsl,mpc8280-scc-uart",
	146	"fsl,cpm2-scc-uart";
	147	reg = <11a00 20 8000 100>;
	148	interrupts = <28 8>;
	149	interrupt-parent = <&PIC>;
	150	fsl,cpm-brg = <1>;
	151	fsl,cpm-command = <00800000>;
	152	};
	153
	154	serial@11a20 {
	155	device_type = "serial";
	156	compatible = "fsl,mpc8280-scc-uart",
	157	"fsl,cpm2-scc-uart";
	158	reg = <11a20 20 8100 100>;
	159	interrupts = <29 8>;
	160	interrupt-parent = <&PIC>;
	161	fsl,cpm-brg = <2>;
	162	fsl,cpm-command = <04a00000>;
	163	};
	164
	165	ethernet@11320 {
	166	device_type = "network";
	167	compatible = "fsl,mpc8280-fcc-enet",
	168	"fsl,cpm2-fcc-enet";
	169	reg = <11320 20 8500 100 113b0 1>;
	170	interrupts = <21 8>;
	171	interrupt-parent = <&PIC>;
	172	phy-handle = <&PHY0>;
	173	linux,network-index = <0>;
	174	fsl,cpm-command = <16200300>;
	175	};
	176
	177	ethernet@11340 {
	178	device_type = "network";
	179	compatible = "fsl,mpc8280-fcc-enet",
	180	"fsl,cpm2-fcc-enet";
	181	reg = <11340 20 8600 100 113d0 1>;
	182	interrupts = <22 8>;
	183	interrupt-parent = <&PIC>;
	184	phy-handle = <&PHY1>;
	185	linux,network-index = <1>;
	186	fsl,cpm-command = <1a400300>;
	187	local-mac-address = [00 e0 0c 00 79 01];
	188	};
	189
	190	mdio@10d40 {
	191	device_type = "mdio";
	192	compatible = "fsl,pq2fads-mdio-bitbang",
	193	"fsl,mpc8280-mdio-bitbang",
	194	"fsl,cpm2-mdio-bitbang";
	195	#address-cells = <1>;
	196	#size-cells = <0>;
	197	reg = <10d40 14>;
	198	fsl,mdio-pin = <9>;
	199	fsl,mdc-pin = <a>;
200
201	PHY0: ethernet-phy@0 {
202	interrupt-parent = <&PIC>;
203	interrupts = <19 2>;
204	reg = <0>;
205	device_type = "ethernet-phy";
206	};
207
208	PHY1: ethernet-phy@1 {
209	interrupt-parent = <&PIC>;
210	interrupts = <19 2>;
211	reg = <3>;
212	device_type = "ethernet-phy";
213	};
214	};
215
216	usb@11b60 {
217	#address-cells = <1>;
218	#size-cells = <0>;
219	compatible = "fsl,mpc8280-usb",
220	"fsl,cpm2-usb";
221	reg = <11b60 18 8b00 100>;
222	interrupt-parent = <&PIC>;
223	interrupts = <b 8>;
224	fsl,cpm-command = <2e600000>;
225	};
226	};
227
228	PIC: interrupt-controller@10c00 {
229	#interrupt-cells = <2>;
230	interrupt-controller;
231	reg = <10c00 80>;
232	compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
233	};
234
235	};
236
237	chosen {
238	linux,stdout-path = "/soc/cpm/serial@11a00";
239	};
240	};