[deliverable/linux.git] / arch / powerpc / boot / dts / rainier.dts

/*
 * Device Tree Source for AMCC Rainier
 *
 * Based on Sequoia code
 * Copyright (c) 2007 MontaVista Software, Inc.
 *
 * FIXME: Draft only!
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 *
 */

/dts-v1/;

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	model = "amcc,rainier";
	compatible = "amcc,rainier";
	dcr-parent = <&{/cpus/cpu@0}>;

	aliases {
		ethernet0 = &EMAC0;
		ethernet1 = &EMAC1;
		serial0 = &UART0;
		serial1 = &UART1;
		serial2 = &UART2;
		serial3 = &UART3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,440GRx";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by zImage */
			timebase-frequency = <0>; /* Filled in by zImage */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <32768>;
			d-cache-size = <32768>;
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
	};

	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "ibm,uic-440grx","ibm,uic";
		interrupt-controller;
		cell-index = <2>;
		dcr-reg = <0x0e0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	SDR0: sdr {
		compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
		dcr-reg = <0x00e 0x002>;
	};

	CPR0: cpr {
		compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
		dcr-reg = <0x00c 0x002>;
	};

	plb {
		compatible = "ibm,plb-440grx", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; /* Filled in by zImage */

		SDRAM0: sdram {
			compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
			dcr-reg = <0x010 0x002>;
		};

		DMA0: dma {
			compatible = "ibm,dma-440grx", "ibm,dma-4xx";
			dcr-reg = <0x100 0x027>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <2>;
			num-rx-chans = <2>;
			interrupt-parent = <&MAL0>;
			interrupts = <0x0 0x1 0x2 0x3 0x4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
					/*SERR*/  0x2 &UIC1 0x0 0x4
					/*TXDE*/  0x3 &UIC1 0x1 0x4
					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
			interrupt-map-mask = <0xffffffff>;
		};

		POB0: opb {
		  	compatible = "ibm,opb-440grx", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
		  	ranges = <0x00000000 0x00000001 0x00000000 0x80000000
			          0x80000000 0x00000001 0x80000000 0x80000000>;
		  	interrupt-parent = <&UIC1>;
		  	interrupts = <0x7 0x4>;
		  	clock-frequency = <0>; /* Filled in by zImage */

			EBC0: ebc {
				compatible = "ibm,ebc-440grx", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by zImage */
				interrupts = <0x5 0x1>;
				interrupt-parent = <&UIC1>;

				nor_flash@0,0 {
					compatible = "amd,s29gl256n", "cfi-flash";
					bank-width = <2>;
					reg = <0x00000000 0x00000000 0x04000000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "Kernel";
						reg = <0x00000000 0x00180000>;
					};
					partition@180000 {
						label = "ramdisk";
						reg = <0x00180000 0x00200000>;
					};
					partition@380000 {
						label = "file system";
						reg = <0x00380000 0x03aa0000>;
					};
					partition@3e20000 {
						label = "kozio";
						reg = <0x03e20000 0x00140000>;
					};
					partition@3f60000 {
						label = "env";
						reg = <0x03f60000 0x00040000>;
					};
					partition@3fa0000 {
						label = "u-boot";
						reg = <0x03fa0000 0x00060000>;
					};
				};

			};

			UART0: serial@ef600300 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600300 0x00000008>;
		   		virtual-reg = <0xef600300>;
		   		clock-frequency = <0>; /* Filled in by zImage */
		   		current-speed = <115200>;
		   		interrupt-parent = <&UIC0>;
		   		interrupts = <0x0 0x4>;
	   		};

			UART1: serial@ef600400 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600400 0x00000008>;
		   		virtual-reg = <0xef600400>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC0>;
		   		interrupts = <0x1 0x4>;
	   		};

			UART2: serial@ef600500 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600500 0x00000008>;
		   		virtual-reg = <0xef600500>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC1>;
		   		interrupts = <0x3 0x4>;
	   		};

			UART3: serial@ef600600 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600600 0x00000008>;
		   		virtual-reg = <0xef600600>;
		   		clock-frequency = <0>;
		   		current-speed = <0>;
		   		interrupt-parent = <&UIC1>;
		   		interrupts = <0x4 0x4>;
	   		};

			IIC0: i2c@ef600700 {
				compatible = "ibm,iic-440grx", "ibm,iic";
				reg = <0xef600700 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x2 0x4>;
			};

			IIC1: i2c@ef600800 {
				compatible = "ibm,iic-440grx", "ibm,iic";
				reg = <0xef600800 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x7 0x4>;
			};

			ZMII0: emac-zmii@ef600d00 {
				compatible = "ibm,zmii-440grx", "ibm,zmii";
				reg = <0xef600d00 0x0000000c>;
			};

			RGMII0: emac-rgmii@ef601000 {
				compatible = "ibm,rgmii-440grx", "ibm,rgmii";
				reg = <0xef601000 0x00000008>;
				has-mdio;
			};

			EMAC0: ethernet@ef600e00 {
				device_type = "network";
				compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
				interrupt-parent = <&EMAC0>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
				reg = <0xef600e00 0x00000074>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rgmii";
				phy-map = <0x00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <0>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <0>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};

			EMAC1: ethernet@ef600f00 {
				device_type = "network";
				compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
				interrupt-parent = <&EMAC1>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
				reg = <0xef600f00 0x00000074>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <1>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rgmii";
				phy-map = <0x00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <1>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <1>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};
		};

		PCI0: pci@1ec000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
			primary;
			reg = <0x00000001 0xeec00000 0x00000008	/* Config space access */
			       0x00000001 0xeed00000 0x00000004	/* IACK */
			       0x00000001 0xeed00000 0x00000004	/* Special cycle */
			       0x00000001 0xef400000 0x00000040>;	/* Internal registers */

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed. Chip supports a second
			 * IO range but we don't use it for now
			 */
			ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000
				0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000
				0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;

			/* All PCI interrupts are routed to IRQ 67 */
			interrupt-map-mask = <0x0 0x0 0x0 0x0>;
			interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
		};
	};

	chosen {
		linux,stdout-path = "/plb/opb/serial@ef600300";
		bootargs = "console=ttyS0,115200";
	};
};
Commit	Line	Data
3910cd8c VB	1	/*
	2	* Device Tree Source for AMCC Rainier
	3	*
	4	* Based on Sequoia code
	5	* Copyright (c) 2007 MontaVista Software, Inc.
	6	*
	7	* FIXME: Draft only!
	8	*
	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2. This program is licensed "as is" without
	11	* any warranty of any kind, whether express or implied.
	12	*
	13	*/
	14
71f34979 DG	15	/dts-v1/;
71f34979 DG	16
3910cd8c VB	17	/ {
	18	#address-cells = <2>;
	19	#size-cells = <1>;
	20	model = "amcc,rainier";
	21	compatible = "amcc,rainier";
71f34979	22	dcr-parent = <&{/cpus/cpu@0}>;
3910cd8c	23
8aaed98c SR	24	aliases {
	25	ethernet0 = &EMAC0;
	26	ethernet1 = &EMAC1;
	27	serial0 = &UART0;
	28	serial1 = &UART1;
	29	serial2 = &UART2;
	30	serial3 = &UART3;
	31	};
	32
3910cd8c VB	33	cpus {
	34	#address-cells = <1>;
	35	#size-cells = <0>;
	36
72fda114	37	cpu@0 {
3910cd8c	38	device_type = "cpu";
72fda114	39	model = "PowerPC,440GRx";
71f34979	40	reg = <0x00000000>;
3910cd8c VB	41	clock-frequency = <0>; /* Filled in by zImage */
3910cd8c VB	42	timebase-frequency = <0>; /* Filled in by zImage */
71f34979 DG	43	i-cache-line-size = <32>;
	44	d-cache-line-size = <32>;
	45	i-cache-size = <32768>;
	46	d-cache-size = <32768>;
3910cd8c VB	47	dcr-controller;
	48	dcr-access-method = "native";
	49	};
	50	};
	51
	52	memory {
	53	device_type = "memory";
71f34979	54	reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
3910cd8c VB	55	};
	56
	57	UIC0: interrupt-controller0 {
	58	compatible = "ibm,uic-440grx","ibm,uic";
	59	interrupt-controller;
	60	cell-index = <0>;
71f34979	61	dcr-reg = <0x0c0 0x009>;
3910cd8c VB	62	#address-cells = <0>;
	63	#size-cells = <0>;
	64	#interrupt-cells = <2>;
	65	};
	66
	67	UIC1: interrupt-controller1 {
	68	compatible = "ibm,uic-440grx","ibm,uic";
	69	interrupt-controller;
	70	cell-index = <1>;
71f34979	71	dcr-reg = <0x0d0 0x009>;
3910cd8c VB	72	#address-cells = <0>;
	73	#size-cells = <0>;
	74	#interrupt-cells = <2>;
71f34979	75	interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
3910cd8c VB	76	interrupt-parent = <&UIC0>;
	77	};
	78
	79	UIC2: interrupt-controller2 {
	80	compatible = "ibm,uic-440grx","ibm,uic";
	81	interrupt-controller;
	82	cell-index = <2>;
71f34979	83	dcr-reg = <0x0e0 0x009>;
3910cd8c VB	84	#address-cells = <0>;
	85	#size-cells = <0>;
	86	#interrupt-cells = <2>;
71f34979	87	interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
3910cd8c VB	88	interrupt-parent = <&UIC0>;
	89	};
	90
	91	SDR0: sdr {
	92	compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
71f34979	93	dcr-reg = <0x00e 0x002>;
3910cd8c VB	94	};
	95
	96	CPR0: cpr {
	97	compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
71f34979	98	dcr-reg = <0x00c 0x002>;
3910cd8c VB	99	};
	100
	101	plb {
	102	compatible = "ibm,plb-440grx", "ibm,plb4";
	103	#address-cells = <2>;
	104	#size-cells = <1>;
	105	ranges;
	106	clock-frequency = <0>; /* Filled in by zImage */
8aaed98c	107
3910cd8c	108	SDRAM0: sdram {
3910cd8c	109	compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
71f34979	110	dcr-reg = <0x010 0x002>;
3910cd8c VB	111	};
	112
	113	DMA0: dma {
	114	compatible = "ibm,dma-440grx", "ibm,dma-4xx";
71f34979	115	dcr-reg = <0x100 0x027>;
3910cd8c VB	116	};
	117
	118	MAL0: mcmal {
	119	compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
71f34979	120	dcr-reg = <0x180 0x062>;
3910cd8c VB	121	num-tx-chans = <2>;
	122	num-rx-chans = <2>;
	123	interrupt-parent = <&MAL0>;
71f34979	124	interrupts = <0x0 0x1 0x2 0x3 0x4>;
3910cd8c VB	125	#interrupt-cells = <1>;
	126	#address-cells = <0>;
	127	#size-cells = <0>;
71f34979 DG	128	interrupt-map = </TXEOB/ 0x0 &UIC0 0xa 0x4
	129	/RXEOB/ 0x1 &UIC0 0xb 0x4
	130	/SERR/ 0x2 &UIC1 0x0 0x4
	131	/TXDE/ 0x3 &UIC1 0x1 0x4
	132	/RXDE/ 0x4 &UIC1 0x2 0x4>;
	133	interrupt-map-mask = <0xffffffff>;
3910cd8c VB	134	};
	135
	136	POB0: opb {
	137	compatible = "ibm,opb-440grx", "ibm,opb";
	138	#address-cells = <1>;
	139	#size-cells = <1>;
71f34979 DG	140	ranges = <0x00000000 0x00000001 0x00000000 0x80000000
71f34979 DG	141	0x80000000 0x00000001 0x80000000 0x80000000>;
3910cd8c	142	interrupt-parent = <&UIC1>;
71f34979	143	interrupts = <0x7 0x4>;
3910cd8c VB	144	clock-frequency = <0>; /* Filled in by zImage */
	145
	146	EBC0: ebc {
	147	compatible = "ibm,ebc-440grx", "ibm,ebc";
71f34979	148	dcr-reg = <0x012 0x002>;
3910cd8c VB	149	#address-cells = <2>;
	150	#size-cells = <1>;
	151	clock-frequency = <0>; /* Filled in by zImage */
71f34979	152	interrupts = <0x5 0x1>;
3910cd8c VB	153	interrupt-parent = <&UIC1>;
	154
	155	nor_flash@0,0 {
	156	compatible = "amd,s29gl256n", "cfi-flash";
	157	bank-width = <2>;
71f34979	158	reg = <0x00000000 0x00000000 0x04000000>;
3910cd8c VB	159	#address-cells = <1>;
	160	#size-cells = <1>;
	161	partition@0 {
	162	label = "Kernel";
71f34979	163	reg = <0x00000000 0x00180000>;
3910cd8c VB	164	};
	165	partition@180000 {
	166	label = "ramdisk";
71f34979	167	reg = <0x00180000 0x00200000>;
3910cd8c VB	168	};
	169	partition@380000 {
	170	label = "file system";
71f34979	171	reg = <0x00380000 0x03aa0000>;
3910cd8c VB	172	};
	173	partition@3e20000 {
	174	label = "kozio";
71f34979	175	reg = <0x03e20000 0x00140000>;
3910cd8c VB	176	};
	177	partition@3f60000 {
	178	label = "env";
71f34979	179	reg = <0x03f60000 0x00040000>;
3910cd8c VB	180	};
	181	partition@3fa0000 {
	182	label = "u-boot";
71f34979	183	reg = <0x03fa0000 0x00060000>;
3910cd8c VB	184	};
	185	};
	186
	187	};
	188
	189	UART0: serial@ef600300 {
	190	device_type = "serial";
	191	compatible = "ns16550";
71f34979 DG	192	reg = <0xef600300 0x00000008>;
71f34979 DG	193	virtual-reg = <0xef600300>;
3910cd8c	194	clock-frequency = <0>; /* Filled in by zImage */
71f34979	195	current-speed = <115200>;
3910cd8c	196	interrupt-parent = <&UIC0>;
71f34979	197	interrupts = <0x0 0x4>;
3910cd8c VB	198	};
	199
	200	UART1: serial@ef600400 {
	201	device_type = "serial";
	202	compatible = "ns16550";
71f34979 DG	203	reg = <0xef600400 0x00000008>;
71f34979 DG	204	virtual-reg = <0xef600400>;
3910cd8c VB	205	clock-frequency = <0>;
	206	current-speed = <0>;
	207	interrupt-parent = <&UIC0>;
71f34979	208	interrupts = <0x1 0x4>;
3910cd8c VB	209	};
	210
	211	UART2: serial@ef600500 {
	212	device_type = "serial";
	213	compatible = "ns16550";
71f34979 DG	214	reg = <0xef600500 0x00000008>;
71f34979 DG	215	virtual-reg = <0xef600500>;
3910cd8c VB	216	clock-frequency = <0>;
	217	current-speed = <0>;
	218	interrupt-parent = <&UIC1>;
71f34979	219	interrupts = <0x3 0x4>;
3910cd8c VB	220	};
	221
	222	UART3: serial@ef600600 {
	223	device_type = "serial";
	224	compatible = "ns16550";
71f34979 DG	225	reg = <0xef600600 0x00000008>;
71f34979 DG	226	virtual-reg = <0xef600600>;
3910cd8c VB	227	clock-frequency = <0>;
	228	current-speed = <0>;
	229	interrupt-parent = <&UIC1>;
71f34979	230	interrupts = <0x4 0x4>;
3910cd8c VB	231	};
	232
	233	IIC0: i2c@ef600700 {
3910cd8c	234	compatible = "ibm,iic-440grx", "ibm,iic";
71f34979	235	reg = <0xef600700 0x00000014>;
3910cd8c	236	interrupt-parent = <&UIC0>;
71f34979	237	interrupts = <0x2 0x4>;
3910cd8c VB	238	};
	239
	240	IIC1: i2c@ef600800 {
3910cd8c	241	compatible = "ibm,iic-440grx", "ibm,iic";
71f34979	242	reg = <0xef600800 0x00000014>;
3910cd8c	243	interrupt-parent = <&UIC0>;
71f34979	244	interrupts = <0x7 0x4>;
3910cd8c VB	245	};
	246
	247	ZMII0: emac-zmii@ef600d00 {
3910cd8c	248	compatible = "ibm,zmii-440grx", "ibm,zmii";
71f34979	249	reg = <0xef600d00 0x0000000c>;
3910cd8c VB	250	};
	251
	252	RGMII0: emac-rgmii@ef601000 {
3910cd8c	253	compatible = "ibm,rgmii-440grx", "ibm,rgmii";
71f34979	254	reg = <0xef601000 0x00000008>;
58c50192	255	has-mdio;
3910cd8c VB	256	};
	257
	258	EMAC0: ethernet@ef600e00 {
3910cd8c VB	259	device_type = "network";
	260	compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
	261	interrupt-parent = <&EMAC0>;
71f34979	262	interrupts = <0x0 0x1>;
3910cd8c VB	263	#interrupt-cells = <1>;
	264	#address-cells = <0>;
	265	#size-cells = <0>;
71f34979 DG	266	interrupt-map = </Status/ 0x0 &UIC0 0x18 0x4
71f34979 DG	267	/Wake/ 0x1 &UIC1 0x1d 0x4>;
05781ccd	268	reg = <0xef600e00 0x00000074>;
3910cd8c VB	269	local-mac-address = [000000000000];
	270	mal-device = <&MAL0>;
	271	mal-tx-channel = <0>;
	272	mal-rx-channel = <0>;
	273	cell-index = <0>;
71f34979 DG	274	max-frame-size = <9000>;
	275	rx-fifo-size = <4096>;
	276	tx-fifo-size = <2048>;
3910cd8c	277	phy-mode = "rgmii";
71f34979	278	phy-map = <0x00000000>;
3910cd8c VB	279	zmii-device = <&ZMII0>;
	280	zmii-channel = <0>;
	281	rgmii-device = <&RGMII0>;
	282	rgmii-channel = <0>;
58c50192 VB	283	has-inverted-stacr-oc;
58c50192 VB	284	has-new-stacr-staopc;
3910cd8c VB	285	};
	286
	287	EMAC1: ethernet@ef600f00 {
3910cd8c VB	288	device_type = "network";
	289	compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
	290	interrupt-parent = <&EMAC1>;
71f34979	291	interrupts = <0x0 0x1>;
3910cd8c VB	292	#interrupt-cells = <1>;
	293	#address-cells = <0>;
	294	#size-cells = <0>;
71f34979 DG	295	interrupt-map = </Status/ 0x0 &UIC0 0x19 0x4
71f34979 DG	296	/Wake/ 0x1 &UIC1 0x1f 0x4>;
05781ccd	297	reg = <0xef600f00 0x00000074>;
3910cd8c VB	298	local-mac-address = [000000000000];
	299	mal-device = <&MAL0>;
	300	mal-tx-channel = <1>;
	301	mal-rx-channel = <1>;
	302	cell-index = <1>;
71f34979 DG	303	max-frame-size = <9000>;
	304	rx-fifo-size = <4096>;
	305	tx-fifo-size = <2048>;
3910cd8c	306	phy-mode = "rgmii";
71f34979	307	phy-map = <0x00000000>;
3910cd8c VB	308	zmii-device = <&ZMII0>;
	309	zmii-channel = <1>;
	310	rgmii-device = <&RGMII0>;
	311	rgmii-channel = <1>;
58c50192 VB	312	has-inverted-stacr-oc;
58c50192 VB	313	has-new-stacr-staopc;
3910cd8c VB	314	};
3910cd8c VB	315	};
0b2e9751 VB	316
	317	PCI0: pci@1ec000000 {
	318	device_type = "pci";
	319	#interrupt-cells = <1>;
	320	#size-cells = <2>;
	321	#address-cells = <3>;
	322	compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
	323	primary;
71f34979 DG	324	reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
	325	0x00000001 0xeed00000 0x00000004 /* IACK */
	326	0x00000001 0xeed00000 0x00000004 /* Special cycle */
	327	0x00000001 0xef400000 0x00000040>; /* Internal registers */
0b2e9751 VB	328
	329	/* Outbound ranges, one memory and one IO,
	330	* later cannot be changed. Chip supports a second
	331	* IO range but we don't use it for now
	332	*/
6f031101 JB	333	ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000
	334	0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000
	335	0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>;
0b2e9751 VB	336
0b2e9751 VB	337	/* Inbound 2GB range starting at 0 */
71f34979	338	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
0b2e9751 VB	339
0b2e9751 VB	340	/* All PCI interrupts are routed to IRQ 67 */
71f34979 DG	341	interrupt-map-mask = <0x0 0x0 0x0 0x0>;
71f34979 DG	342	interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
0b2e9751	343	};
3910cd8c VB	344	};
	345
	346	chosen {
	347	linux,stdout-path = "/plb/opb/serial@ef600300";
	348	bootargs = "console=ttyS0,115200";
	349	};
	350	};