Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelv...
[deliverable/linux.git] / arch / powerpc / boot / dts / sequoia.dts
CommitLineData
d60ff953
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1/*
2 * Device Tree Source for AMCC Sequoia
3 *
4 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
5 * Copyright (c) 2006, 2007 IBM Corp.
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 */
14
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15/dts-v1/;
16
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17/ {
18 #address-cells = <2>;
19 #size-cells = <1>;
20 model = "amcc,sequoia";
21 compatible = "amcc,sequoia";
71f34979 22 dcr-parent = <&{/cpus/cpu@0}>;
d60ff953 23
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24 aliases {
25 ethernet0 = &EMAC0;
26 ethernet1 = &EMAC1;
27 serial0 = &UART0;
28 serial1 = &UART1;
29 serial2 = &UART2;
30 serial3 = &UART3;
31 };
32
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33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
72fda114 37 cpu@0 {
d60ff953 38 device_type = "cpu";
72fda114 39 model = "PowerPC,440EPx";
71f34979 40 reg = <0x00000000>;
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41 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
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43 i-cache-line-size = <32>;
44 d-cache-line-size = <32>;
45 i-cache-size = <32768>;
46 d-cache-size = <32768>;
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47 dcr-controller;
48 dcr-access-method = "native";
49 };
50 };
51
52 memory {
53 device_type = "memory";
71f34979 54 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
d60ff953
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55 };
56
57 UIC0: interrupt-controller0 {
58 compatible = "ibm,uic-440epx","ibm,uic";
59 interrupt-controller;
60 cell-index = <0>;
71f34979 61 dcr-reg = <0x0c0 0x009>;
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62 #address-cells = <0>;
63 #size-cells = <0>;
64 #interrupt-cells = <2>;
65 };
66
67 UIC1: interrupt-controller1 {
68 compatible = "ibm,uic-440epx","ibm,uic";
69 interrupt-controller;
70 cell-index = <1>;
71f34979 71 dcr-reg = <0x0d0 0x009>;
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72 #address-cells = <0>;
73 #size-cells = <0>;
74 #interrupt-cells = <2>;
71f34979 75 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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76 interrupt-parent = <&UIC0>;
77 };
78
79 UIC2: interrupt-controller2 {
80 compatible = "ibm,uic-440epx","ibm,uic";
81 interrupt-controller;
82 cell-index = <2>;
71f34979 83 dcr-reg = <0x0e0 0x009>;
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84 #address-cells = <0>;
85 #size-cells = <0>;
86 #interrupt-cells = <2>;
71f34979 87 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
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88 interrupt-parent = <&UIC0>;
89 };
90
91 SDR0: sdr {
92 compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
71f34979 93 dcr-reg = <0x00e 0x002>;
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94 };
95
96 CPR0: cpr {
97 compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
71f34979 98 dcr-reg = <0x00c 0x002>;
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99 };
100
101 plb {
102 compatible = "ibm,plb-440epx", "ibm,plb4";
103 #address-cells = <2>;
104 #size-cells = <1>;
105 ranges;
106 clock-frequency = <0>; /* Filled in by zImage */
107
108 SDRAM0: sdram {
d60ff953 109 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
71f34979 110 dcr-reg = <0x010 0x002>;
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111 };
112
113 DMA0: dma {
114 compatible = "ibm,dma-440epx", "ibm,dma-4xx";
71f34979 115 dcr-reg = <0x100 0x027>;
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116 };
117
118 MAL0: mcmal {
119 compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
71f34979 120 dcr-reg = <0x180 0x062>;
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121 num-tx-chans = <2>;
122 num-rx-chans = <2>;
d60ff953 123 interrupt-parent = <&MAL0>;
71f34979 124 interrupts = <0x0 0x1 0x2 0x3 0x4>;
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125 #interrupt-cells = <1>;
126 #address-cells = <0>;
127 #size-cells = <0>;
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128 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
129 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
130 /*SERR*/ 0x2 &UIC1 0x0 0x4
131 /*TXDE*/ 0x3 &UIC1 0x1 0x4
132 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
133 interrupt-map-mask = <0xffffffff>;
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134 };
135
f82f5a26 136 USB1: usb@e0000400 {
796bcae7 137 compatible = "ibm,usb-ohci-440epx", "ohci-be";
71f34979 138 reg = <0x00000000 0xe0000400 0x00000060>;
f82f5a26 139 interrupt-parent = <&UIC0>;
71f34979 140 interrupts = <0x15 0x8>;
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141 };
142
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143 USB0: ehci@e0000300 {
144 compatible = "ibm,usb-ehci-440epx", "usb-ehci";
145 interrupt-parent = <&UIC0>;
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146 interrupts = <0x1a 0x4>;
147 reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
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148 big-endian;
149 };
150
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151 POB0: opb {
152 compatible = "ibm,opb-440epx", "ibm,opb";
153 #address-cells = <1>;
154 #size-cells = <1>;
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155 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
156 0x80000000 0x00000001 0x80000000 0x80000000>;
d60ff953 157 interrupt-parent = <&UIC1>;
71f34979 158 interrupts = <0x7 0x4>;
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159 clock-frequency = <0>; /* Filled in by zImage */
160
161 EBC0: ebc {
162 compatible = "ibm,ebc-440epx", "ibm,ebc";
71f34979 163 dcr-reg = <0x012 0x002>;
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164 #address-cells = <2>;
165 #size-cells = <1>;
166 clock-frequency = <0>; /* Filled in by zImage */
71f34979 167 interrupts = <0x5 0x1>;
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168 interrupt-parent = <&UIC1>;
169
170 nor_flash@0,0 {
504ca43e 171 compatible = "amd,s29gl256n", "cfi-flash";
d60ff953 172 bank-width = <2>;
71f34979 173 reg = <0x00000000 0x00000000 0x04000000>;
504ca43e
JB
174 #address-cells = <1>;
175 #size-cells = <1>;
176 partition@0 {
177 label = "Kernel";
71f34979 178 reg = <0x00000000 0x00180000>;
504ca43e
JB
179 };
180 partition@180000 {
181 label = "ramdisk";
71f34979 182 reg = <0x00180000 0x00200000>;
504ca43e
JB
183 };
184 partition@380000 {
185 label = "file system";
71f34979 186 reg = <0x00380000 0x03aa0000>;
504ca43e
JB
187 };
188 partition@3e20000 {
189 label = "kozio";
71f34979 190 reg = <0x03e20000 0x00140000>;
504ca43e
JB
191 };
192 partition@3f60000 {
193 label = "env";
71f34979 194 reg = <0x03f60000 0x00040000>;
504ca43e
JB
195 };
196 partition@3fa0000 {
197 label = "u-boot";
71f34979 198 reg = <0x03fa0000 0x00060000>;
504ca43e 199 };
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200 };
201
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202 ndfc@3,0 {
203 compatible = "ibm,ndfc";
204 reg = <0x00000003 0x00000000 0x00002000>;
205 ccr = <0x00001000>;
206 bank-settings = <0x80002222>;
207 #address-cells = <1>;
208 #size-cells = <1>;
209
210 nand {
211 #address-cells = <1>;
212 #size-cells = <1>;
213
214 partition@0 {
215 label = "u-boot";
216 reg = <0x00000000 0x00084000>;
217 };
218 partition@84000 {
219 label = "user";
220 reg = <0x00000000 0x01f7c000>;
221 };
222 };
223 };
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224 };
225
226 UART0: serial@ef600300 {
227 device_type = "serial";
228 compatible = "ns16550";
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229 reg = <0xef600300 0x00000008>;
230 virtual-reg = <0xef600300>;
d60ff953 231 clock-frequency = <0>; /* Filled in by zImage */
71f34979 232 current-speed = <115200>;
d60ff953 233 interrupt-parent = <&UIC0>;
71f34979 234 interrupts = <0x0 0x4>;
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235 };
236
237 UART1: serial@ef600400 {
238 device_type = "serial";
239 compatible = "ns16550";
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240 reg = <0xef600400 0x00000008>;
241 virtual-reg = <0xef600400>;
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242 clock-frequency = <0>;
243 current-speed = <0>;
244 interrupt-parent = <&UIC0>;
71f34979 245 interrupts = <0x1 0x4>;
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246 };
247
248 UART2: serial@ef600500 {
249 device_type = "serial";
250 compatible = "ns16550";
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251 reg = <0xef600500 0x00000008>;
252 virtual-reg = <0xef600500>;
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253 clock-frequency = <0>;
254 current-speed = <0>;
255 interrupt-parent = <&UIC1>;
71f34979 256 interrupts = <0x3 0x4>;
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257 };
258
259 UART3: serial@ef600600 {
260 device_type = "serial";
261 compatible = "ns16550";
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262 reg = <0xef600600 0x00000008>;
263 virtual-reg = <0xef600600>;
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264 clock-frequency = <0>;
265 current-speed = <0>;
266 interrupt-parent = <&UIC1>;
71f34979 267 interrupts = <0x4 0x4>;
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268 };
269
270 IIC0: i2c@ef600700 {
423da269
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271 #address-cells = <1>;
272 #size-cells = <0>;
d60ff953 273 compatible = "ibm,iic-440epx", "ibm,iic";
71f34979 274 reg = <0xef600700 0x00000014>;
d60ff953 275 interrupt-parent = <&UIC0>;
71f34979 276 interrupts = <0x2 0x4>;
423da269
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277
278 hwmon@48 {
279 compatible = "adi,ad7414";
280 reg = <0x48>;
281 };
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282 };
283
284 IIC1: i2c@ef600800 {
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285 #address-cells = <1>;
286 #size-cells = <0>;
d60ff953 287 compatible = "ibm,iic-440epx", "ibm,iic";
71f34979 288 reg = <0xef600800 0x00000014>;
d60ff953 289 interrupt-parent = <&UIC0>;
71f34979 290 interrupts = <0x7 0x4>;
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291 };
292
293 ZMII0: emac-zmii@ef600d00 {
d60ff953 294 compatible = "ibm,zmii-440epx", "ibm,zmii";
71f34979 295 reg = <0xef600d00 0x0000000c>;
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296 };
297
1f69dcfd 298 RGMII0: emac-rgmii@ef601000 {
1f69dcfd 299 compatible = "ibm,rgmii-440epx", "ibm,rgmii";
71f34979 300 reg = <0xef601000 0x00000008>;
1f57877a 301 has-mdio;
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302 };
303
d60ff953 304 EMAC0: ethernet@ef600e00 {
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305 device_type = "network";
306 compatible = "ibm,emac-440epx", "ibm,emac4";
307 interrupt-parent = <&EMAC0>;
71f34979 308 interrupts = <0x0 0x1>;
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309 #interrupt-cells = <1>;
310 #address-cells = <0>;
311 #size-cells = <0>;
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312 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
313 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
05781ccd 314 reg = <0xef600e00 0x00000074>;
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315 local-mac-address = [000000000000];
316 mal-device = <&MAL0>;
bd0076cc 317 mal-tx-channel = <0>;
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318 mal-rx-channel = <0>;
319 cell-index = <0>;
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320 max-frame-size = <9000>;
321 rx-fifo-size = <4096>;
322 tx-fifo-size = <2048>;
1f69dcfd 323 phy-mode = "rgmii";
71f34979 324 phy-map = <0x00000000>;
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325 zmii-device = <&ZMII0>;
326 zmii-channel = <0>;
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327 rgmii-device = <&RGMII0>;
328 rgmii-channel = <0>;
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329 has-inverted-stacr-oc;
330 has-new-stacr-staopc;
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331 };
332
333 EMAC1: ethernet@ef600f00 {
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334 device_type = "network";
335 compatible = "ibm,emac-440epx", "ibm,emac4";
336 interrupt-parent = <&EMAC1>;
71f34979 337 interrupts = <0x0 0x1>;
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338 #interrupt-cells = <1>;
339 #address-cells = <0>;
340 #size-cells = <0>;
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341 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
342 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
05781ccd 343 reg = <0xef600f00 0x00000074>;
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344 local-mac-address = [000000000000];
345 mal-device = <&MAL0>;
bd0076cc 346 mal-tx-channel = <1>;
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347 mal-rx-channel = <1>;
348 cell-index = <1>;
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349 max-frame-size = <9000>;
350 rx-fifo-size = <4096>;
351 tx-fifo-size = <2048>;
1f69dcfd 352 phy-mode = "rgmii";
71f34979 353 phy-map = <0x00000000>;
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354 zmii-device = <&ZMII0>;
355 zmii-channel = <1>;
1f69dcfd
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356 rgmii-device = <&RGMII0>;
357 rgmii-channel = <1>;
bff713b5
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358 has-inverted-stacr-oc;
359 has-new-stacr-staopc;
d60ff953
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360 };
361 };
2a13448a
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362
363 PCI0: pci@1ec000000 {
364 device_type = "pci";
365 #interrupt-cells = <1>;
366 #size-cells = <2>;
367 #address-cells = <3>;
368 compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
369 primary;
71f34979
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370 reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
371 0x00000001 0xeed00000 0x00000004 /* IACK */
372 0x00000001 0xeed00000 0x00000004 /* Special cycle */
373 0x00000001 0xef400000 0x00000040>; /* Internal registers */
2a13448a
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374
375 /* Outbound ranges, one memory and one IO,
376 * later cannot be changed. Chip supports a second
377 * IO range but we don't use it for now
78be7647
CE
378 * From the 440EPx user manual:
379 * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
380 * I/O 1 E800 0000 1 E800 FFFF 64KB
381 * I/O 1 E880 0000 1 EBFF FFFF 56MB
2a13448a 382 */
71f34979
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383 ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
384 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
385 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
2a13448a
VB
386
387 /* Inbound 2GB range starting at 0 */
71f34979 388 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
2a13448a
VB
389
390 /* All PCI interrupts are routed to IRQ 67 */
71f34979
DG
391 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
392 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
2a13448a 393 };
d60ff953
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394 };
395
396 chosen {
397 linux,stdout-path = "/plb/opb/serial@ef600300";
398 bootargs = "console=ttyS0,115200";
399 };
400};
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