powerpc/85xx: support for the TQM8548 module using the big Flash
[deliverable/linux.git] / arch / powerpc / boot / dts / tqm8560.dts
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1/*
2 * TQM 8560 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
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15 model = "tqc,tqm8560";
16 compatible = "tqc,tqm8560";
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17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,8560@0 {
34 device_type = "cpu";
35 reg = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
41 bus-frequency = <0>;
42 clock-frequency = <0>;
c054065b 43 next-level-cache = <&L2>;
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44 };
45 };
46
47 memory {
48 device_type = "memory";
49 reg = <0x00000000 0x10000000>;
50 };
51
f67be814 52 soc@e0000000 {
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53 #address-cells = <1>;
54 #size-cells = <1>;
55 device_type = "soc";
56 ranges = <0x0 0xe0000000 0x100000>;
57 reg = <0xe0000000 0x200>;
58 bus-frequency = <0>;
59 compatible = "fsl,mpc8560-immr", "simple-bus";
60
61 memory-controller@2000 {
62 compatible = "fsl,8540-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>;
65 interrupts = <18 2>;
66 };
67
c054065b 68 L2: l2-cache-controller@20000 {
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69 compatible = "fsl,8540-l2-cache-controller";
70 reg = <0x20000 0x1000>;
71 cache-line-size = <32>;
72 cache-size = <0x40000>; // L2, 256K
73 interrupt-parent = <&mpic>;
74 interrupts = <16 2>;
75 };
76
77 i2c@3000 {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 cell-index = <0>;
81 compatible = "fsl-i2c";
82 reg = <0x3000 0x100>;
83 interrupts = <43 2>;
84 interrupt-parent = <&mpic>;
85 dfsrr;
86
87 rtc@68 {
88 compatible = "dallas,ds1337";
89 reg = <0x68>;
90 };
91 };
92
93 mdio@24520 {
94 #address-cells = <1>;
95 #size-cells = <0>;
96 compatible = "fsl,gianfar-mdio";
97 reg = <0x24520 0x20>;
98
99 phy1: ethernet-phy@1 {
100 interrupt-parent = <&mpic>;
101 interrupts = <8 1>;
102 reg = <1>;
103 device_type = "ethernet-phy";
104 };
105 phy2: ethernet-phy@2 {
106 interrupt-parent = <&mpic>;
107 interrupts = <8 1>;
108 reg = <2>;
109 device_type = "ethernet-phy";
110 };
111 phy3: ethernet-phy@3 {
112 interrupt-parent = <&mpic>;
113 interrupts = <8 1>;
114 reg = <3>;
115 device_type = "ethernet-phy";
116 };
117 };
118
119 enet0: ethernet@24000 {
120 cell-index = <0>;
121 device_type = "network";
122 model = "TSEC";
123 compatible = "gianfar";
124 reg = <0x24000 0x1000>;
125 local-mac-address = [ 00 00 00 00 00 00 ];
126 interrupts = <29 2 30 2 34 2>;
127 interrupt-parent = <&mpic>;
128 phy-handle = <&phy2>;
129 };
130
131 enet1: ethernet@25000 {
132 cell-index = <1>;
133 device_type = "network";
134 model = "TSEC";
135 compatible = "gianfar";
136 reg = <0x25000 0x1000>;
137 local-mac-address = [ 00 00 00 00 00 00 ];
138 interrupts = <35 2 36 2 40 2>;
139 interrupt-parent = <&mpic>;
140 phy-handle = <&phy1>;
141 };
142
143 mpic: pic@40000 {
144 interrupt-controller;
145 #address-cells = <0>;
146 #interrupt-cells = <2>;
147 reg = <0x40000 0x40000>;
148 device_type = "open-pic";
acd4b715 149 compatible = "chrp,open-pic";
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150 };
151
152 cpm@919c0 {
153 #address-cells = <1>;
154 #size-cells = <1>;
155 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
156 reg = <0x919c0 0x30>;
157 ranges;
158
159 muram@80000 {
160 #address-cells = <1>;
161 #size-cells = <1>;
162 ranges = <0 0x80000 0x10000>;
163
164 data@0 {
165 compatible = "fsl,cpm-muram-data";
166 reg = <0 0x4000 0x9000 0x2000>;
167 };
168 };
169
170 brg@919f0 {
171 compatible = "fsl,mpc8560-brg",
172 "fsl,cpm2-brg",
173 "fsl,cpm-brg";
174 reg = <0x919f0 0x10 0x915f0 0x10>;
175 clock-frequency = <0>;
176 };
177
178 cpmpic: pic@90c00 {
179 interrupt-controller;
180 #address-cells = <0>;
181 #interrupt-cells = <2>;
182 interrupts = <46 2>;
183 interrupt-parent = <&mpic>;
184 reg = <0x90c00 0x80>;
185 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
186 };
187
188 serial0: serial@91a00 {
189 device_type = "serial";
190 compatible = "fsl,mpc8560-scc-uart",
191 "fsl,cpm2-scc-uart";
192 reg = <0x91a00 0x20 0x88000 0x100>;
193 fsl,cpm-brg = <1>;
194 fsl,cpm-command = <0x800000>;
195 current-speed = <115200>;
196 interrupts = <40 8>;
197 interrupt-parent = <&cpmpic>;
198 };
199
200 serial1: serial@91a20 {
201 device_type = "serial";
202 compatible = "fsl,mpc8560-scc-uart",
203 "fsl,cpm2-scc-uart";
204 reg = <0x91a20 0x20 0x88100 0x100>;
205 fsl,cpm-brg = <2>;
206 fsl,cpm-command = <0x4a00000>;
207 current-speed = <115200>;
208 interrupts = <41 8>;
209 interrupt-parent = <&cpmpic>;
210 };
211
212 enet2: ethernet@91340 {
213 device_type = "network";
214 compatible = "fsl,mpc8560-fcc-enet",
215 "fsl,cpm2-fcc-enet";
216 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
217 local-mac-address = [ 00 00 00 00 00 00 ];
218 fsl,cpm-command = <0x1a400300>;
219 interrupts = <34 8>;
220 interrupt-parent = <&cpmpic>;
221 phy-handle = <&phy3>;
222 };
223 };
224 };
225
226 pci0: pci@e0008000 {
227 cell-index = <0>;
228 #interrupt-cells = <1>;
229 #size-cells = <2>;
230 #address-cells = <3>;
231 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
232 device_type = "pci";
233 reg = <0xe0008000 0x1000>;
234 clock-frequency = <66666666>;
235 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
236 interrupt-map = <
237 /* IDSEL 28 */
238 0xe000 0 0 1 &mpic 2 1
239 0xe000 0 0 2 &mpic 3 1>;
240
241 interrupt-parent = <&mpic>;
242 interrupts = <24 2>;
243 bus-range = <0 0>;
244 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
245 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
246 };
247};
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