[deliverable/linux.git] / arch / powerpc / boot / dts / warp.dts

/*
 * Device Tree Source for PIKA Warp
 *
 * Copyright (c) 2008-2009 PIKA Technologies
 *   Sean MacLennan <smaclennan@pikatech.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/dts-v1/;

/ {
	#address-cells = <2>;
	#size-cells = <1>;
	model = "pika,warp";
	compatible = "pika,warp";
	dcr-parent = <&{/cpus/cpu@0}>;

	aliases {
		ethernet0 = &EMAC0;
		serial0 = &UART0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,440EP";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by zImage */
			timebase-frequency = <0>; /* Filled in by zImage */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <32768>;
			d-cache-size = <32768>;
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
	};

	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440ep","ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440ep","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	SDR0: sdr {
		compatible = "ibm,sdr-440ep";
		dcr-reg = <0x00e 0x002>;
	};

	CPR0: cpr {
		compatible = "ibm,cpr-440ep";
		dcr-reg = <0x00c 0x002>;
	};

	plb {
		compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; /* Filled in by zImage */

		SDRAM0: sdram {
			compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
			dcr-reg = <0x010 0x002>;
		};

		DMA0: dma {
			compatible = "ibm,dma-440ep", "ibm,dma-440gp";
			dcr-reg = <0x100 0x027>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <4>;
			num-rx-chans = <2>;
			interrupt-parent = <&MAL0>;
			interrupts = <0x0 0x1 0x2 0x3 0x4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
					/*SERR*/  0x2 &UIC1 0x0 0x4
					/*TXDE*/  0x3 &UIC1 0x1 0x4
					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
		};

		POB0: opb {
		  	compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
		  	ranges = <0x00000000 0x00000000 0x00000000 0x80000000
			          0x80000000 0x00000000 0x80000000 0x80000000>;
		  	interrupt-parent = <&UIC1>;
		  	interrupts = <0x7 0x4>;
		  	clock-frequency = <0>; /* Filled in by zImage */

			EBC0: ebc {
				compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by zImage */
				interrupts = <0x5 0x1>;
				interrupt-parent = <&UIC1>;

				fpga@2,0 {
					compatible = "pika,fpga";
			   		reg = <0x00000002 0x00000000 0x00001000>;
					interrupts = <0x18 0x8>;
					interrupt-parent = <&UIC0>;
				};

				fpga@2,2000 {
					compatible = "pika,fpga-sgl";
			   		reg = <0x00000002 0x00002000 0x00000200>;
				};

				fpga@2,4000 {
					compatible = "pika,fpga-sd";
					reg = <0x00000002 0x00004000 0x00000A00>;
				};

				nor@0,0 {
					compatible = "amd,s29gl032a", "cfi-flash";
					bank-width = <2>;
					reg = <0x00000000 0x00000000 0x00400000>;
					#address-cells = <1>;
					#size-cells = <1>;

					partition@0 {
						label = "splash";
						reg = <0x00000000 0x00010000>;
					};
					partition@300000 {
						label = "fpga";
						reg = <0x0300000 0x00040000>;
					};
					partition@340000 {
						label = "env";
						reg = <0x0340000 0x00040000>;
					};
					partition@380000 {
						label = "u-boot";
						reg = <0x0380000 0x00080000>;
					};
				};

				ndfc@1,0 {
					compatible = "ibm,ndfc";
					reg = <0x00000001 0x00000000 0x00002000>;
					ccr = <0x00001000>;
					bank-settings = <0x80002222>;
					#address-cells = <1>;
					#size-cells = <1>;

					nand {
						#address-cells = <1>;
						#size-cells = <1>;

						partition@0 {
							label = "kernel";
							reg = <0x00000000 0x00200000>;
						};
						partition@200000 {
							label = "root";
							reg = <0x00200000 0x03E00000>;
						};
						partition@40000000 {
							label = "persistent";
							reg = <0x04000000 0x04000000>;
						};
						partition@80000000 {
							label = "persistent1";
							reg = <0x08000000 0x04000000>;
						};
						partition@C0000000 {
							label = "persistent2";
							reg = <0x0C000000 0x04000000>;
						};
					};
				};
			};

			UART0: serial@ef600300 {
		   		device_type = "serial";
		   		compatible = "ns16550";
		   		reg = <0xef600300 0x00000008>;
		   		virtual-reg = <0xef600300>;
		   		clock-frequency = <0>; /* Filled in by zImage */
		   		current-speed = <115200>;
		   		interrupt-parent = <&UIC0>;
		   		interrupts = <0x0 0x4>;
	   		};

			IIC0: i2c@ef600700 {
				compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
				reg = <0xef600700 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x2 0x4>;
				#address-cells = <1>;
				#size-cells = <0>;

				ad7414@4a {
					compatible = "adi,ad7414";
					reg = <0x4a>;
					interrupts = <0x19 0x8>;
					interrupt-parent = <&UIC0>;
				};

				/* This will create 52 and 53 */
				at24@52 {
					compatible = "at,24c04";
					reg = <0x52>;
				};
			};

			GPIO0: gpio@ef600b00 {
				compatible = "ibm,ppc4xx-gpio";
				reg = <0xef600b00 0x00000048>;
				#gpio-cells = <2>;
				gpio-controller;
			};

			GPIO1: gpio@ef600c00 {
				compatible = "ibm,ppc4xx-gpio";
				reg = <0xef600c00 0x00000048>;
				#gpio-cells = <2>;
				gpio-controller;
			};

			power-leds {
				compatible = "gpio-leds";
				green {
					gpios = <&GPIO1 0 0>;
					default-state = "on";
				};
				red {
					gpios = <&GPIO1 1 0>;
				};
			};

			ZMII0: emac-zmii@ef600d00 {
				compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
				reg = <0xef600d00 0x0000000c>;
			};

			EMAC0: ethernet@ef600e00 {
				device_type = "network";
				compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
				interrupt-parent = <&UIC1>;
				interrupts = <0x1c 0x4 0x1d 0x4>;
				reg = <0xef600e00 0x00000070>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <0 1>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <1500>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rmii";
				phy-map = <0x00000000>;
				zmii-device = <&ZMII0>;
				zmii-channel = <0>;
			};

			usb@ef601000 {
				compatible = "ohci-be";
				reg = <0xef601000 0x00000080>;
				interrupts = <0x8 0x1 0x9 0x1>;
				interrupt-parent = < &UIC1 >;
			};
		};
	};

	chosen {
		linux,stdout-path = "/plb/opb/serial@ef600300";
	};
};
Commit	Line	Data
99192af0 SM	1	/*
	2	* Device Tree Source for PIKA Warp
	3	*
805e324b	4	* Copyright (c) 2008-2009 PIKA Technologies
99192af0 SM	5	* Sean MacLennan <smaclennan@pikatech.com>
	6	*
	7	* This file is licensed under the terms of the GNU General Public
	8	* License version 2. This program is licensed "as is" without
	9	* any warranty of any kind, whether express or implied.
	10	*/
	11
71f34979 DG	12	/dts-v1/;
71f34979 DG	13
99192af0 SM	14	/ {
	15	#address-cells = <2>;
	16	#size-cells = <1>;
	17	model = "pika,warp";
	18	compatible = "pika,warp";
71f34979	19	dcr-parent = <&{/cpus/cpu@0}>;
99192af0 SM	20
	21	aliases {
	22	ethernet0 = &EMAC0;
	23	serial0 = &UART0;
	24	};
	25
	26	cpus {
	27	#address-cells = <1>;
	28	#size-cells = <0>;
	29
	30	cpu@0 {
	31	device_type = "cpu";
	32	model = "PowerPC,440EP";
71f34979	33	reg = <0x00000000>;
99192af0 SM	34	clock-frequency = <0>; /* Filled in by zImage */
99192af0 SM	35	timebase-frequency = <0>; /* Filled in by zImage */
71f34979 DG	36	i-cache-line-size = <32>;
	37	d-cache-line-size = <32>;
	38	i-cache-size = <32768>;
	39	d-cache-size = <32768>;
99192af0 SM	40	dcr-controller;
	41	dcr-access-method = "native";
	42	};
	43	};
	44
	45	memory {
	46	device_type = "memory";
71f34979	47	reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
99192af0 SM	48	};
	49
	50	UIC0: interrupt-controller0 {
	51	compatible = "ibm,uic-440ep","ibm,uic";
	52	interrupt-controller;
	53	cell-index = <0>;
71f34979	54	dcr-reg = <0x0c0 0x009>;
99192af0 SM	55	#address-cells = <0>;
	56	#size-cells = <0>;
	57	#interrupt-cells = <2>;
	58	};
	59
	60	UIC1: interrupt-controller1 {
	61	compatible = "ibm,uic-440ep","ibm,uic";
	62	interrupt-controller;
	63	cell-index = <1>;
71f34979	64	dcr-reg = <0x0d0 0x009>;
99192af0 SM	65	#address-cells = <0>;
	66	#size-cells = <0>;
	67	#interrupt-cells = <2>;
71f34979	68	interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
99192af0 SM	69	interrupt-parent = <&UIC0>;
	70	};
	71
	72	SDR0: sdr {
	73	compatible = "ibm,sdr-440ep";
71f34979	74	dcr-reg = <0x00e 0x002>;
99192af0 SM	75	};
	76
	77	CPR0: cpr {
	78	compatible = "ibm,cpr-440ep";
71f34979	79	dcr-reg = <0x00c 0x002>;
99192af0 SM	80	};
	81
	82	plb {
	83	compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
	84	#address-cells = <2>;
	85	#size-cells = <1>;
	86	ranges;
	87	clock-frequency = <0>; /* Filled in by zImage */
	88
	89	SDRAM0: sdram {
	90	compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
71f34979	91	dcr-reg = <0x010 0x002>;
99192af0 SM	92	};
	93
	94	DMA0: dma {
	95	compatible = "ibm,dma-440ep", "ibm,dma-440gp";
71f34979	96	dcr-reg = <0x100 0x027>;
99192af0 SM	97	};
	98
	99	MAL0: mcmal {
	100	compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
71f34979	101	dcr-reg = <0x180 0x062>;
99192af0 SM	102	num-tx-chans = <4>;
	103	num-rx-chans = <2>;
	104	interrupt-parent = <&MAL0>;
71f34979	105	interrupts = <0x0 0x1 0x2 0x3 0x4>;
99192af0 SM	106	#interrupt-cells = <1>;
	107	#address-cells = <0>;
	108	#size-cells = <0>;
71f34979 DG	109	interrupt-map = </TXEOB/ 0x0 &UIC0 0xa 0x4
	110	/RXEOB/ 0x1 &UIC0 0xb 0x4
	111	/SERR/ 0x2 &UIC1 0x0 0x4
	112	/TXDE/ 0x3 &UIC1 0x1 0x4
	113	/RXDE/ 0x4 &UIC1 0x2 0x4>;
99192af0 SM	114	};
	115
	116	POB0: opb {
	117	compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
	118	#address-cells = <1>;
	119	#size-cells = <1>;
71f34979 DG	120	ranges = <0x00000000 0x00000000 0x00000000 0x80000000
71f34979 DG	121	0x80000000 0x00000000 0x80000000 0x80000000>;
99192af0	122	interrupt-parent = <&UIC1>;
71f34979	123	interrupts = <0x7 0x4>;
99192af0 SM	124	clock-frequency = <0>; /* Filled in by zImage */
	125
	126	EBC0: ebc {
	127	compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
71f34979	128	dcr-reg = <0x012 0x002>;
99192af0 SM	129	#address-cells = <2>;
	130	#size-cells = <1>;
	131	clock-frequency = <0>; /* Filled in by zImage */
71f34979	132	interrupts = <0x5 0x1>;
99192af0 SM	133	interrupt-parent = <&UIC1>;
	134
	135	fpga@2,0 {
	136	compatible = "pika,fpga";
0393cb61	137	reg = <0x00000002 0x00000000 0x00001000>;
71f34979	138	interrupts = <0x18 0x8>;
99192af0 SM	139	interrupt-parent = <&UIC0>;
	140	};
	141
1d555cf1 SM	142	fpga@2,2000 {
	143	compatible = "pika,fpga-sgl";
	144	reg = <0x00000002 0x00002000 0x00000200>;
	145	};
	146
0393cb61 SM	147	fpga@2,4000 {
	148	compatible = "pika,fpga-sd";
	149	reg = <0x00000002 0x00004000 0x00000A00>;
	150	};
	151
e275e023	152	nor@0,0 {
0393cb61	153	compatible = "amd,s29gl032a", "cfi-flash";
99192af0	154	bank-width = <2>;
0393cb61	155	reg = <0x00000000 0x00000000 0x00400000>;
99192af0 SM	156	#address-cells = <1>;
99192af0 SM	157	#size-cells = <1>;
e275e023 SM	158
	159	partition@0 {
	160	label = "splash";
805e324b	161	reg = <0x00000000 0x00010000>;
e275e023	162	};
0393cb61	163	partition@300000 {
99192af0	164	label = "fpga";
929badad	165	reg = <0x0300000 0x00040000>;
99192af0	166	};
0393cb61	167	partition@340000 {
99192af0	168	label = "env";
0393cb61	169	reg = <0x0340000 0x00040000>;
99192af0	170	};
0393cb61	171	partition@380000 {
99192af0	172	label = "u-boot";
0393cb61	173	reg = <0x0380000 0x00080000>;
99192af0 SM	174	};
99192af0 SM	175	};
e275e023 SM	176
	177	ndfc@1,0 {
	178	compatible = "ibm,ndfc";
	179	reg = <0x00000001 0x00000000 0x00002000>;
	180	ccr = <0x00001000>;
	181	bank-settings = <0x80002222>;
	182	#address-cells = <1>;
	183	#size-cells = <1>;
	184
	185	nand {
	186	#address-cells = <1>;
	187	#size-cells = <1>;
	188
	189	partition@0 {
	190	label = "kernel";
	191	reg = <0x00000000 0x00200000>;
	192	};
	193	partition@200000 {
	194	label = "root";
	195	reg = <0x00200000 0x03E00000>;
	196	};
	197	partition@40000000 {
	198	label = "persistent";
	199	reg = <0x04000000 0x04000000>;
	200	};
	201	partition@80000000 {
	202	label = "persistent1";
	203	reg = <0x08000000 0x04000000>;
	204	};
	205	partition@C0000000 {
	206	label = "persistent2";
	207	reg = <0x0C000000 0x04000000>;
	208	};
	209	};
	210	};
99192af0 SM	211	};
	212
	213	UART0: serial@ef600300 {
	214	device_type = "serial";
	215	compatible = "ns16550";
71f34979 DG	216	reg = <0xef600300 0x00000008>;
71f34979 DG	217	virtual-reg = <0xef600300>;
99192af0	218	clock-frequency = <0>; /* Filled in by zImage */
71f34979	219	current-speed = <115200>;
99192af0	220	interrupt-parent = <&UIC0>;
71f34979	221	interrupts = <0x0 0x4>;
99192af0 SM	222	};
	223
	224	IIC0: i2c@ef600700 {
	225	compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
71f34979	226	reg = <0xef600700 0x00000014>;
99192af0	227	interrupt-parent = <&UIC0>;
71f34979	228	interrupts = <0x2 0x4>;
0393cb61 SM	229	#address-cells = <1>;
	230	#size-cells = <0>;
	231
	232	ad7414@4a {
	233	compatible = "adi,ad7414";
	234	reg = <0x4a>;
	235	interrupts = <0x19 0x8>;
	236	interrupt-parent = <&UIC0>;
	237	};
1d555cf1 SM	238
	239	/* This will create 52 and 53 */
	240	at24@52 {
	241	compatible = "at,24c04";
	242	reg = <0x52>;
	243	};
99192af0 SM	244	};
	245
	246	GPIO0: gpio@ef600b00 {
805e324b	247	compatible = "ibm,ppc4xx-gpio";
71f34979	248	reg = <0xef600b00 0x00000048>;
0393cb61 SM	249	#gpio-cells = <2>;
0393cb61 SM	250	gpio-controller;
99192af0 SM	251	};
	252
	253	GPIO1: gpio@ef600c00 {
805e324b	254	compatible = "ibm,ppc4xx-gpio";
71f34979	255	reg = <0xef600c00 0x00000048>;
0393cb61 SM	256	#gpio-cells = <2>;
0393cb61 SM	257	gpio-controller;
805e324b	258	};
0393cb61	259
805e324b SM	260	power-leds {
	261	compatible = "gpio-leds";
	262	green {
	263	gpios = <&GPIO1 0 0>;
	264	default-state = "on";
	265	};
	266	red {
	267	gpios = <&GPIO1 1 0>;
0393cb61	268	};
99192af0 SM	269	};
	270
	271	ZMII0: emac-zmii@ef600d00 {
	272	compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
71f34979	273	reg = <0xef600d00 0x0000000c>;
99192af0 SM	274	};
	275
	276	EMAC0: ethernet@ef600e00 {
99192af0 SM	277	device_type = "network";
	278	compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
	279	interrupt-parent = <&UIC1>;
71f34979 DG	280	interrupts = <0x1c 0x4 0x1d 0x4>;
71f34979 DG	281	reg = <0xef600e00 0x00000070>;
99192af0 SM	282	local-mac-address = [000000000000];
	283	mal-device = <&MAL0>;
	284	mal-tx-channel = <0 1>;
	285	mal-rx-channel = <0>;
	286	cell-index = <0>;
71f34979 DG	287	max-frame-size = <1500>;
	288	rx-fifo-size = <4096>;
	289	tx-fifo-size = <2048>;
99192af0	290	phy-mode = "rmii";
71f34979	291	phy-map = <0x00000000>;
99192af0 SM	292	zmii-device = <&ZMII0>;
	293	zmii-channel = <0>;
	294	};
	295
	296	usb@ef601000 {
	297	compatible = "ohci-be";
71f34979 DG	298	reg = <0xef601000 0x00000080>;
71f34979 DG	299	interrupts = <0x8 0x1 0x9 0x1>;
99192af0 SM	300	interrupt-parent = < &UIC1 >;
	301	};
	302	};
	303	};
	304
	305	chosen {
	306	linux,stdout-path = "/plb/opb/serial@ef600300";
	307	};
	308	};