Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
78b09735 SR |
2 | * Copyright (C) 2004 IBM |
3 | * | |
4 | * Implements the generic device dma API for powerpc. | |
5 | * the pci and vio busses | |
1da177e4 | 6 | */ |
78b09735 SR |
7 | #ifndef _ASM_DMA_MAPPING_H |
8 | #define _ASM_DMA_MAPPING_H | |
33ff910f AB |
9 | #ifdef __KERNEL__ |
10 | ||
11 | #include <linux/types.h> | |
12 | #include <linux/cache.h> | |
13 | /* need struct page definitions */ | |
14 | #include <linux/mm.h> | |
15 | #include <linux/scatterlist.h> | |
3affedc4 | 16 | #include <linux/dma-attrs.h> |
46bab4e4 | 17 | #include <linux/dma-debug.h> |
33ff910f | 18 | #include <asm/io.h> |
ec3cf2ec | 19 | #include <asm/swiotlb.h> |
33ff910f AB |
20 | |
21 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) | |
22 | ||
ec3cf2ec BB |
23 | /* Some dma direct funcs must be visible for use in other dma_ops */ |
24 | extern void *dma_direct_alloc_coherent(struct device *dev, size_t size, | |
25 | dma_addr_t *dma_handle, gfp_t flag); | |
26 | extern void dma_direct_free_coherent(struct device *dev, size_t size, | |
27 | void *vaddr, dma_addr_t dma_handle); | |
28 | ||
ec3cf2ec | 29 | |
33ff910f AB |
30 | #ifdef CONFIG_NOT_COHERENT_CACHE |
31 | /* | |
32 | * DMA-consistent mapping functions for PowerPCs that don't support | |
33 | * cache snooping. These allocate/free a region of uncached mapped | |
34 | * memory space for use with DMA devices. Alternatively, you could | |
35 | * allocate the space "normally" and use the cache management functions | |
36 | * to ensure it is consistent. | |
37 | */ | |
8b31e49d BH |
38 | struct device; |
39 | extern void *__dma_alloc_coherent(struct device *dev, size_t size, | |
40 | dma_addr_t *handle, gfp_t gfp); | |
33ff910f AB |
41 | extern void __dma_free_coherent(size_t size, void *vaddr); |
42 | extern void __dma_sync(void *vaddr, size_t size, int direction); | |
43 | extern void __dma_sync_page(struct page *page, unsigned long offset, | |
44 | size_t size, int direction); | |
45 | ||
46 | #else /* ! CONFIG_NOT_COHERENT_CACHE */ | |
47 | /* | |
48 | * Cache coherent cores. | |
49 | */ | |
50 | ||
8b31e49d | 51 | #define __dma_alloc_coherent(dev, gfp, size, handle) NULL |
33ff910f AB |
52 | #define __dma_free_coherent(size, addr) ((void)0) |
53 | #define __dma_sync(addr, size, rw) ((void)0) | |
54 | #define __dma_sync_page(pg, off, sz, rw) ((void)0) | |
55 | ||
56 | #endif /* ! CONFIG_NOT_COHERENT_CACHE */ | |
57 | ||
3a4c6f0b MN |
58 | static inline unsigned long device_to_mask(struct device *dev) |
59 | { | |
60 | if (dev->dma_mask && *dev->dma_mask) | |
61 | return *dev->dma_mask; | |
62 | /* Assume devices without mask can take 32 bit addresses */ | |
63 | return 0xfffffffful; | |
64 | } | |
65 | ||
4fc665b8 BB |
66 | /* |
67 | * Available generic sets of operations | |
68 | */ | |
69 | #ifdef CONFIG_PPC64 | |
45223c54 | 70 | extern struct dma_map_ops dma_iommu_ops; |
4fc665b8 | 71 | #endif |
45223c54 | 72 | extern struct dma_map_ops dma_direct_ops; |
4fc665b8 | 73 | |
45223c54 | 74 | static inline struct dma_map_ops *get_dma_ops(struct device *dev) |
33ff910f AB |
75 | { |
76 | /* We don't handle the NULL dev case for ISA for now. We could | |
77 | * do it via an out of line call but it is not needed for now. The | |
78 | * only ISA DMA device we support is the floppy and we have a hack | |
79 | * in the floppy driver directly to get a device for us. | |
80 | */ | |
4ae0ff60 | 81 | if (unlikely(dev == NULL)) |
33ff910f | 82 | return NULL; |
4fc665b8 | 83 | |
33ff910f | 84 | return dev->archdata.dma_ops; |
1f62a162 ME |
85 | } |
86 | ||
45223c54 | 87 | static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops) |
1f62a162 ME |
88 | { |
89 | dev->archdata.dma_ops = ops; | |
33ff910f AB |
90 | } |
91 | ||
1cebd7a0 BB |
92 | /* |
93 | * get_dma_offset() | |
94 | * | |
95 | * Get the dma offset on configurations where the dma address can be determined | |
96 | * from the physical address by looking at a simple offset. Direct dma and | |
97 | * swiotlb use this function, but it is typically not used by implementations | |
98 | * with an iommu. | |
99 | */ | |
738ef42e | 100 | static inline dma_addr_t get_dma_offset(struct device *dev) |
1cebd7a0 BB |
101 | { |
102 | if (dev) | |
738ef42e | 103 | return dev->archdata.dma_data.dma_offset; |
1cebd7a0 BB |
104 | |
105 | return PCI_DRAM_OFFSET; | |
106 | } | |
107 | ||
738ef42e BB |
108 | static inline void set_dma_offset(struct device *dev, dma_addr_t off) |
109 | { | |
110 | if (dev) | |
111 | dev->archdata.dma_data.dma_offset = off; | |
112 | } | |
113 | ||
46bab4e4 FT |
114 | /* this will be removed soon */ |
115 | #define flush_write_buffers() | |
116 | ||
117 | #include <asm-generic/dma-mapping-common.h> | |
118 | ||
33ff910f AB |
119 | static inline int dma_supported(struct device *dev, u64 mask) |
120 | { | |
45223c54 | 121 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
33ff910f AB |
122 | |
123 | if (unlikely(dma_ops == NULL)) | |
124 | return 0; | |
125 | if (dma_ops->dma_supported == NULL) | |
126 | return 1; | |
127 | return dma_ops->dma_supported(dev, mask); | |
128 | } | |
129 | ||
5b6e9ff6 | 130 | extern int dma_set_mask(struct device *dev, u64 dma_mask); |
33ff910f AB |
131 | |
132 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, | |
133 | dma_addr_t *dma_handle, gfp_t flag) | |
134 | { | |
45223c54 | 135 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
80d3e8ab | 136 | void *cpu_addr; |
33ff910f AB |
137 | |
138 | BUG_ON(!dma_ops); | |
80d3e8ab FT |
139 | |
140 | cpu_addr = dma_ops->alloc_coherent(dev, size, dma_handle, flag); | |
141 | ||
142 | debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); | |
143 | ||
144 | return cpu_addr; | |
33ff910f AB |
145 | } |
146 | ||
147 | static inline void dma_free_coherent(struct device *dev, size_t size, | |
148 | void *cpu_addr, dma_addr_t dma_handle) | |
149 | { | |
45223c54 | 150 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
33ff910f AB |
151 | |
152 | BUG_ON(!dma_ops); | |
80d3e8ab FT |
153 | |
154 | debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); | |
155 | ||
33ff910f AB |
156 | dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); |
157 | } | |
158 | ||
8d8bb39b | 159 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
78b09735 | 160 | { |
4a9a6bfe FT |
161 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
162 | ||
163 | if (dma_ops->mapping_error) | |
164 | return dma_ops->mapping_error(dev, dma_addr); | |
165 | ||
78b09735 SR |
166 | #ifdef CONFIG_PPC64 |
167 | return (dma_addr == DMA_ERROR_CODE); | |
168 | #else | |
169 | return 0; | |
170 | #endif | |
171 | } | |
172 | ||
9a937c91 FT |
173 | static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) |
174 | { | |
762afb73 FT |
175 | #ifdef CONFIG_SWIOTLB |
176 | struct dev_archdata *sd = &dev->archdata; | |
9a937c91 | 177 | |
762afb73 | 178 | if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr) |
9a937c91 | 179 | return 0; |
762afb73 | 180 | #endif |
9a937c91 FT |
181 | |
182 | if (!dev->dma_mask) | |
183 | return 0; | |
184 | ||
ac2b3e67 | 185 | return addr + size - 1 <= *dev->dma_mask; |
9a937c91 FT |
186 | } |
187 | ||
8d4f5339 FT |
188 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) |
189 | { | |
1cebd7a0 | 190 | return paddr + get_dma_offset(dev); |
8d4f5339 FT |
191 | } |
192 | ||
193 | static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) | |
194 | { | |
1cebd7a0 | 195 | return daddr - get_dma_offset(dev); |
8d4f5339 FT |
196 | } |
197 | ||
1da177e4 LT |
198 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
199 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | |
1da177e4 | 200 | |
d3fa72e4 | 201 | static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
78b09735 | 202 | enum dma_data_direction direction) |
1da177e4 | 203 | { |
78b09735 | 204 | BUG_ON(direction == DMA_NONE); |
1da177e4 LT |
205 | __dma_sync(vaddr, size, (int)direction); |
206 | } | |
207 | ||
88ced031 | 208 | #endif /* __KERNEL__ */ |
78b09735 | 209 | #endif /* _ASM_DMA_MAPPING_H */ |