Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
78b09735 SR |
2 | * Copyright (C) 2004 IBM |
3 | * | |
4 | * Implements the generic device dma API for powerpc. | |
5 | * the pci and vio busses | |
1da177e4 | 6 | */ |
78b09735 SR |
7 | #ifndef _ASM_DMA_MAPPING_H |
8 | #define _ASM_DMA_MAPPING_H | |
33ff910f AB |
9 | #ifdef __KERNEL__ |
10 | ||
11 | #include <linux/types.h> | |
12 | #include <linux/cache.h> | |
13 | /* need struct page definitions */ | |
14 | #include <linux/mm.h> | |
15 | #include <linux/scatterlist.h> | |
3affedc4 | 16 | #include <linux/dma-attrs.h> |
46bab4e4 | 17 | #include <linux/dma-debug.h> |
33ff910f | 18 | #include <asm/io.h> |
ec3cf2ec | 19 | #include <asm/swiotlb.h> |
33ff910f AB |
20 | |
21 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) | |
22 | ||
ec3cf2ec BB |
23 | /* Some dma direct funcs must be visible for use in other dma_ops */ |
24 | extern void *dma_direct_alloc_coherent(struct device *dev, size_t size, | |
bfbf7d61 AP |
25 | dma_addr_t *dma_handle, gfp_t flag, |
26 | struct dma_attrs *attrs); | |
ec3cf2ec | 27 | extern void dma_direct_free_coherent(struct device *dev, size_t size, |
bfbf7d61 AP |
28 | void *vaddr, dma_addr_t dma_handle, |
29 | struct dma_attrs *attrs); | |
ec3cf2ec | 30 | |
ec3cf2ec | 31 | |
33ff910f AB |
32 | #ifdef CONFIG_NOT_COHERENT_CACHE |
33 | /* | |
34 | * DMA-consistent mapping functions for PowerPCs that don't support | |
35 | * cache snooping. These allocate/free a region of uncached mapped | |
36 | * memory space for use with DMA devices. Alternatively, you could | |
37 | * allocate the space "normally" and use the cache management functions | |
38 | * to ensure it is consistent. | |
39 | */ | |
8b31e49d BH |
40 | struct device; |
41 | extern void *__dma_alloc_coherent(struct device *dev, size_t size, | |
42 | dma_addr_t *handle, gfp_t gfp); | |
33ff910f AB |
43 | extern void __dma_free_coherent(size_t size, void *vaddr); |
44 | extern void __dma_sync(void *vaddr, size_t size, int direction); | |
45 | extern void __dma_sync_page(struct page *page, unsigned long offset, | |
46 | size_t size, int direction); | |
6090912c | 47 | extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr); |
33ff910f AB |
48 | |
49 | #else /* ! CONFIG_NOT_COHERENT_CACHE */ | |
50 | /* | |
51 | * Cache coherent cores. | |
52 | */ | |
53 | ||
8b31e49d | 54 | #define __dma_alloc_coherent(dev, gfp, size, handle) NULL |
33ff910f AB |
55 | #define __dma_free_coherent(size, addr) ((void)0) |
56 | #define __dma_sync(addr, size, rw) ((void)0) | |
57 | #define __dma_sync_page(pg, off, sz, rw) ((void)0) | |
58 | ||
59 | #endif /* ! CONFIG_NOT_COHERENT_CACHE */ | |
60 | ||
3a4c6f0b MN |
61 | static inline unsigned long device_to_mask(struct device *dev) |
62 | { | |
63 | if (dev->dma_mask && *dev->dma_mask) | |
64 | return *dev->dma_mask; | |
65 | /* Assume devices without mask can take 32 bit addresses */ | |
66 | return 0xfffffffful; | |
67 | } | |
68 | ||
4fc665b8 BB |
69 | /* |
70 | * Available generic sets of operations | |
71 | */ | |
72 | #ifdef CONFIG_PPC64 | |
45223c54 | 73 | extern struct dma_map_ops dma_iommu_ops; |
4fc665b8 | 74 | #endif |
45223c54 | 75 | extern struct dma_map_ops dma_direct_ops; |
4fc665b8 | 76 | |
45223c54 | 77 | static inline struct dma_map_ops *get_dma_ops(struct device *dev) |
33ff910f AB |
78 | { |
79 | /* We don't handle the NULL dev case for ISA for now. We could | |
80 | * do it via an out of line call but it is not needed for now. The | |
81 | * only ISA DMA device we support is the floppy and we have a hack | |
82 | * in the floppy driver directly to get a device for us. | |
83 | */ | |
4ae0ff60 | 84 | if (unlikely(dev == NULL)) |
33ff910f | 85 | return NULL; |
4fc665b8 | 86 | |
33ff910f | 87 | return dev->archdata.dma_ops; |
1f62a162 ME |
88 | } |
89 | ||
45223c54 | 90 | static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops) |
1f62a162 ME |
91 | { |
92 | dev->archdata.dma_ops = ops; | |
33ff910f AB |
93 | } |
94 | ||
1cebd7a0 BB |
95 | /* |
96 | * get_dma_offset() | |
97 | * | |
98 | * Get the dma offset on configurations where the dma address can be determined | |
99 | * from the physical address by looking at a simple offset. Direct dma and | |
100 | * swiotlb use this function, but it is typically not used by implementations | |
101 | * with an iommu. | |
102 | */ | |
738ef42e | 103 | static inline dma_addr_t get_dma_offset(struct device *dev) |
1cebd7a0 BB |
104 | { |
105 | if (dev) | |
738ef42e | 106 | return dev->archdata.dma_data.dma_offset; |
1cebd7a0 BB |
107 | |
108 | return PCI_DRAM_OFFSET; | |
109 | } | |
110 | ||
738ef42e BB |
111 | static inline void set_dma_offset(struct device *dev, dma_addr_t off) |
112 | { | |
113 | if (dev) | |
114 | dev->archdata.dma_data.dma_offset = off; | |
115 | } | |
116 | ||
46bab4e4 FT |
117 | /* this will be removed soon */ |
118 | #define flush_write_buffers() | |
119 | ||
120 | #include <asm-generic/dma-mapping-common.h> | |
121 | ||
33ff910f AB |
122 | static inline int dma_supported(struct device *dev, u64 mask) |
123 | { | |
45223c54 | 124 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
33ff910f AB |
125 | |
126 | if (unlikely(dma_ops == NULL)) | |
127 | return 0; | |
128 | if (dma_ops->dma_supported == NULL) | |
129 | return 1; | |
130 | return dma_ops->dma_supported(dev, mask); | |
131 | } | |
132 | ||
5b6e9ff6 | 133 | extern int dma_set_mask(struct device *dev, u64 dma_mask); |
33ff910f | 134 | |
bfbf7d61 AP |
135 | #define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) |
136 | ||
137 | static inline void *dma_alloc_attrs(struct device *dev, size_t size, | |
138 | dma_addr_t *dma_handle, gfp_t flag, | |
139 | struct dma_attrs *attrs) | |
33ff910f | 140 | { |
45223c54 | 141 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
80d3e8ab | 142 | void *cpu_addr; |
33ff910f AB |
143 | |
144 | BUG_ON(!dma_ops); | |
80d3e8ab | 145 | |
bfbf7d61 | 146 | cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs); |
80d3e8ab FT |
147 | |
148 | debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); | |
149 | ||
150 | return cpu_addr; | |
33ff910f AB |
151 | } |
152 | ||
bfbf7d61 AP |
153 | #define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) |
154 | ||
155 | static inline void dma_free_attrs(struct device *dev, size_t size, | |
156 | void *cpu_addr, dma_addr_t dma_handle, | |
157 | struct dma_attrs *attrs) | |
33ff910f | 158 | { |
45223c54 | 159 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
33ff910f AB |
160 | |
161 | BUG_ON(!dma_ops); | |
80d3e8ab FT |
162 | |
163 | debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); | |
164 | ||
bfbf7d61 | 165 | dma_ops->free(dev, size, cpu_addr, dma_handle, attrs); |
33ff910f AB |
166 | } |
167 | ||
8d8bb39b | 168 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
78b09735 | 169 | { |
4a9a6bfe FT |
170 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
171 | ||
172 | if (dma_ops->mapping_error) | |
173 | return dma_ops->mapping_error(dev, dma_addr); | |
174 | ||
78b09735 SR |
175 | #ifdef CONFIG_PPC64 |
176 | return (dma_addr == DMA_ERROR_CODE); | |
177 | #else | |
178 | return 0; | |
179 | #endif | |
180 | } | |
181 | ||
9a937c91 FT |
182 | static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) |
183 | { | |
762afb73 FT |
184 | #ifdef CONFIG_SWIOTLB |
185 | struct dev_archdata *sd = &dev->archdata; | |
9a937c91 | 186 | |
762afb73 | 187 | if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr) |
9a937c91 | 188 | return 0; |
762afb73 | 189 | #endif |
9a937c91 FT |
190 | |
191 | if (!dev->dma_mask) | |
192 | return 0; | |
193 | ||
ac2b3e67 | 194 | return addr + size - 1 <= *dev->dma_mask; |
9a937c91 FT |
195 | } |
196 | ||
8d4f5339 FT |
197 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) |
198 | { | |
1cebd7a0 | 199 | return paddr + get_dma_offset(dev); |
8d4f5339 FT |
200 | } |
201 | ||
202 | static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) | |
203 | { | |
1cebd7a0 | 204 | return daddr - get_dma_offset(dev); |
8d4f5339 FT |
205 | } |
206 | ||
1da177e4 LT |
207 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) |
208 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | |
1da177e4 | 209 | |
6090912c BH |
210 | extern int dma_mmap_coherent(struct device *, struct vm_area_struct *, |
211 | void *, dma_addr_t, size_t); | |
212 | #define ARCH_HAS_DMA_MMAP_COHERENT | |
213 | ||
214 | ||
d3fa72e4 | 215 | static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
78b09735 | 216 | enum dma_data_direction direction) |
1da177e4 | 217 | { |
78b09735 | 218 | BUG_ON(direction == DMA_NONE); |
1da177e4 LT |
219 | __dma_sync(vaddr, size, (int)direction); |
220 | } | |
221 | ||
88ced031 | 222 | #endif /* __KERNEL__ */ |
78b09735 | 223 | #endif /* _ASM_DMA_MAPPING_H */ |