[deliverable/linux.git] / arch / powerpc / include / asm / exception-64s.h

#ifndef _ASM_POWERPC_EXCEPTION_H
#define _ASM_POWERPC_EXCEPTION_H
/*
 * Extracted from head_64.S
 *
 *  PowerPC version
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
 *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
 *  Adapted for Power Macintosh by Paul Mackerras.
 *  Low-level exception handlers and MMU support
 *  rewritten by Paul Mackerras.
 *    Copyright (C) 1996 Paul Mackerras.
 *
 *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
 *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
 *
 *  This file contains the low-level support and setup for the
 *  PowerPC-64 platform, including trap and interrupt dispatch.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */
/*
 * The following macros define the code that appears as
 * the prologue to each of the exception handlers.  They
 * are split into two parts to allow a single kernel binary
 * to be used for pSeries and iSeries.
 *
 * We make as much of the exception code common between native
 * exception handlers (including pSeries LPAR) and iSeries LPAR
 * implementations as possible.
 */

#define EX_R9		0
#define EX_R10		8
#define EX_R11		16
#define EX_R12		24
#define EX_R13		32
#define EX_SRR0		40
#define EX_DAR		48
#define EX_DSISR	56
#define EX_CCR		60
#define EX_R3		64
#define EX_LR		72
#define EX_CFAR		80

/*
 * We're short on space and time in the exception prolog, so we can't
 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
 * low halfword of the address, but for Kdump we need the whole low
 * word.
 */
#define LOAD_HANDLER(reg, label)					\
	addi	reg,reg,(label)-_stext;	/* virt addr of handler ... */

/* Exception register prefixes */
#define EXC_HV	H
#define EXC_STD

#define __EXCEPTION_PROLOG_1(area, extra, vec)				\
	GET_PACA(r13);							\
	std	r9,area+EX_R9(r13);	/* save r9 - r12 */		\
	std	r10,area+EX_R10(r13);					\
	BEGIN_FTR_SECTION_NESTED(66);					\
	mfspr	r10,SPRN_CFAR;						\
	std	r10,area+EX_CFAR(r13);					\
	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);		\
	mfcr	r9;							\
	extra(vec);							\
	std	r11,area+EX_R11(r13);					\
	std	r12,area+EX_R12(r13);					\
	GET_SCRATCH0(r10);						\
	std	r10,area+EX_R13(r13)
#define EXCEPTION_PROLOG_1(area, extra, vec)				\
	__EXCEPTION_PROLOG_1(area, extra, vec)

#define __EXCEPTION_PROLOG_PSERIES_1(label, h)				\
	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
	LOAD_HANDLER(r12,label)						\
	mtspr	SPRN_##h##SRR0,r12;					\
	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
	mtspr	SPRN_##h##SRR1,r10;					\
	h##rfid;							\
	b	.	/* prevent speculative execution */
#define EXCEPTION_PROLOG_PSERIES_1(label, h)				\
	__EXCEPTION_PROLOG_PSERIES_1(label, h)

#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec)		\
	EXCEPTION_PROLOG_1(area, extra, vec);				\
	EXCEPTION_PROLOG_PSERIES_1(label, h);

#define __KVMTEST(n)							\
	lbz	r10,HSTATE_IN_GUEST(r13);			\
	cmpwi	r10,0;							\
	bne	do_kvm_##n

#define __KVM_HANDLER(area, h, n)					\
do_kvm_##n:								\
	ld	r10,area+EX_R10(r13);					\
	stw	r9,HSTATE_SCRATCH1(r13);			\
	ld	r9,area+EX_R9(r13);					\
	std	r12,HSTATE_SCRATCH0(r13);			\
	li	r12,n;							\
	b	kvmppc_interrupt

#define __KVM_HANDLER_SKIP(area, h, n)					\
do_kvm_##n:								\
	cmpwi	r10,KVM_GUEST_MODE_SKIP;				\
	ld	r10,area+EX_R10(r13);					\
	beq	89f;							\
	stw	r9,HSTATE_SCRATCH1(r13);			\
	ld	r9,area+EX_R9(r13);					\
	std	r12,HSTATE_SCRATCH0(r13);			\
	li	r12,n;							\
	b	kvmppc_interrupt;					\
89:	mtocrf	0x80,r9;						\
	ld	r9,area+EX_R9(r13);					\
	b	kvmppc_skip_##h##interrupt

#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
#define KVMTEST(n)			__KVMTEST(n)
#define KVM_HANDLER(area, h, n)		__KVM_HANDLER(area, h, n)
#define KVM_HANDLER_SKIP(area, h, n)	__KVM_HANDLER_SKIP(area, h, n)

#else
#define KVMTEST(n)
#define KVM_HANDLER(area, h, n)
#define KVM_HANDLER_SKIP(area, h, n)
#endif

#ifdef CONFIG_KVM_BOOK3S_PR
#define KVMTEST_PR(n)			__KVMTEST(n)
#define KVM_HANDLER_PR(area, h, n)	__KVM_HANDLER(area, h, n)
#define KVM_HANDLER_PR_SKIP(area, h, n)	__KVM_HANDLER_SKIP(area, h, n)

#else
#define KVMTEST_PR(n)
#define KVM_HANDLER_PR(area, h, n)
#define KVM_HANDLER_PR_SKIP(area, h, n)
#endif

#define NOTEST(n)

/*
 * The common exception prolog is used for all except a few exceptions
 * such as a segment miss on a kernel address.  We have to be prepared
 * to take another exception from the point where we first touch the
 * kernel stack onwards.
 *
 * On entry r13 points to the paca, r9-r13 are saved in the paca,
 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
 * SRR1, and relocation is on.
 */
#define EXCEPTION_PROLOG_COMMON(n, area)				   \
	andi.	r10,r12,MSR_PR;		/* See if coming from user	*/ \
	mr	r10,r1;			/* Save r1			*/ \
	subi	r1,r1,INT_FRAME_SIZE;	/* alloc frame on kernel stack	*/ \
	beq-	1f;							   \
	ld	r1,PACAKSAVE(r13);	/* kernel stack to use		*/ \
1:	cmpdi	cr1,r1,0;		/* check if r1 is in userspace	*/ \
	blt+	cr1,3f;			/* abort if it is		*/ \
	li	r1,(n);			/* will be reloaded later	*/ \
	sth	r1,PACA_TRAP_SAVE(r13);					   \
	std	r3,area+EX_R3(r13);					   \
	addi	r3,r13,area;		/* r3 -> where regs are saved*/	   \
	b	bad_stack;						   \
3:	std	r9,_CCR(r1);		/* save CR in stackframe	*/ \
	std	r11,_NIP(r1);		/* save SRR0 in stackframe	*/ \
	std	r12,_MSR(r1);		/* save SRR1 in stackframe	*/ \
	std	r10,0(r1);		/* make stack chain pointer	*/ \
	std	r0,GPR0(r1);		/* save r0 in stackframe	*/ \
	std	r10,GPR1(r1);		/* save r1 in stackframe	*/ \
	ACCOUNT_CPU_USER_ENTRY(r9, r10);				   \
	std	r2,GPR2(r1);		/* save r2 in stackframe	*/ \
	SAVE_4GPRS(3, r1);		/* save r3 - r6 in stackframe	*/ \
	SAVE_2GPRS(7, r1);		/* save r7, r8 in stackframe	*/ \
	ld	r9,area+EX_R9(r13);	/* move r9, r10 to stackframe	*/ \
	ld	r10,area+EX_R10(r13);					   \
	std	r9,GPR9(r1);						   \
	std	r10,GPR10(r1);						   \
	ld	r9,area+EX_R11(r13);	/* move r11 - r13 to stackframe	*/ \
	ld	r10,area+EX_R12(r13);					   \
	ld	r11,area+EX_R13(r13);					   \
	std	r9,GPR11(r1);						   \
	std	r10,GPR12(r1);						   \
	std	r11,GPR13(r1);						   \
	BEGIN_FTR_SECTION_NESTED(66);					   \
	ld	r10,area+EX_CFAR(r13);					   \
	std	r10,ORIG_GPR3(r1);					   \
	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);		   \
	ld	r2,PACATOC(r13);	/* get kernel TOC into r2	*/ \
	mflr	r9;			/* save LR in stackframe	*/ \
	std	r9,_LINK(r1);						   \
	mfctr	r10;			/* save CTR in stackframe	*/ \
	std	r10,_CTR(r1);						   \
	lbz	r10,PACASOFTIRQEN(r13);				   \
	mfspr	r11,SPRN_XER;		/* save XER in stackframe	*/ \
	std	r10,SOFTE(r1);						   \
	std	r11,_XER(r1);						   \
	li	r9,(n)+1;						   \
	std	r9,_TRAP(r1);		/* set trap number		*/ \
	li	r10,0;							   \
	ld	r11,exception_marker@toc(r2);				   \
	std	r10,RESULT(r1);		/* clear regs->result		*/ \
	std	r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame	*/ \
	ACCOUNT_STOLEN_TIME

/*
 * Exception vectors.
 */
#define STD_EXCEPTION_PSERIES(loc, vec, label)		\
	. = loc;					\
	.globl label##_pSeries;				\
label##_pSeries:					\
	HMT_MEDIUM;					\
	SET_SCRATCH0(r13);		/* save r13 */		\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common,	\
				 EXC_STD, KVMTEST_PR, vec)

#define STD_EXCEPTION_HV(loc, vec, label)		\
	. = loc;					\
	.globl label##_hv;				\
label##_hv:						\
	HMT_MEDIUM;					\
	SET_SCRATCH0(r13);	/* save r13 */			\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common,	\
				 EXC_HV, KVMTEST, vec)

/* This associate vector numbers with bits in paca->irq_happened */
#define SOFTEN_VALUE_0x500	PACA_IRQ_EE
#define SOFTEN_VALUE_0x502	PACA_IRQ_EE
#define SOFTEN_VALUE_0x900	PACA_IRQ_DEC
#define SOFTEN_VALUE_0x982	PACA_IRQ_DEC

#define __SOFTEN_TEST(h, vec)						\
	lbz	r10,PACASOFTIRQEN(r13);					\
	cmpwi	r10,0;							\
	li	r10,SOFTEN_VALUE_##vec;					\
	beq	masked_##h##interrupt
#define _SOFTEN_TEST(h, vec)	__SOFTEN_TEST(h, vec)

#define SOFTEN_TEST_PR(vec)						\
	KVMTEST_PR(vec);						\
	_SOFTEN_TEST(EXC_STD, vec)

#define SOFTEN_TEST_HV(vec)						\
	KVMTEST(vec);							\
	_SOFTEN_TEST(EXC_HV, vec)

#define SOFTEN_TEST_HV_201(vec)						\
	KVMTEST(vec);							\
	_SOFTEN_TEST(EXC_STD, vec)

#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)		\
	HMT_MEDIUM;							\
	SET_SCRATCH0(r13);    /* save r13 */				\
	__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec);		\
	EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)		\
	__MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)

#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label)			\
	. = loc;							\
	.globl label##_pSeries;						\
label##_pSeries:							\
	_MASKABLE_EXCEPTION_PSERIES(vec, label,				\
				    EXC_STD, SOFTEN_TEST_PR)

#define MASKABLE_EXCEPTION_HV(loc, vec, label)				\
	. = loc;							\
	.globl label##_hv;						\
label##_hv:								\
	_MASKABLE_EXCEPTION_PSERIES(vec, label,				\
				    EXC_HV, SOFTEN_TEST_HV)

/*
 * Our exception common code can be passed various "additions"
 * to specify the behaviour of interrupts, whether to kick the
 * runlatch, etc...
 */

/* Exception addition: Hard disable interrupts */
#define DISABLE_INTS	SOFT_DISABLE_INTS(r10,r11)

#define ADD_NVGPRS				\
	bl	.save_nvgprs

#define RUNLATCH_ON				\
BEGIN_FTR_SECTION				\
	CURRENT_THREAD_INFO(r3, r1);		\
	ld	r4,TI_LOCAL_FLAGS(r3);		\
	andi.	r0,r4,_TLF_RUNLATCH;		\
	beql	ppc64_runlatch_on_trampoline;	\
END_FTR_SECTION_IFSET(CPU_FTR_CTRL)

#define EXCEPTION_COMMON(trap, label, hdlr, ret, additions)	\
	.align	7;						\
	.globl label##_common;					\
label##_common:							\
	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);		\
	additions;						\
	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
	bl	hdlr;						\
	b	ret

#define STD_EXCEPTION_COMMON(trap, label, hdlr)			\
	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except,	\
			 ADD_NVGPRS;DISABLE_INTS)

/*
 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
 * in the idle task and therefore need the special idle handling
 * (finish nap and runlatch)
 */
#define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr)		  \
	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
			 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)

/*
 * When the idle code in power4_idle puts the CPU into NAP mode,
 * it has to do so in a loop, and relies on the external interrupt
 * and decrementer interrupt entry code to get it out of the loop.
 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
 * to signal that it is in the loop and needs help to get out.
 */
#ifdef CONFIG_PPC_970_NAP
#define FINISH_NAP				\
BEGIN_FTR_SECTION				\
	CURRENT_THREAD_INFO(r11, r1);		\
	ld	r9,TI_LOCAL_FLAGS(r11);		\
	andi.	r10,r9,_TLF_NAPPING;		\
	bnel	power4_fixup_nap;		\
END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
#else
#define FINISH_NAP
#endif

#endif	/* _ASM_POWERPC_EXCEPTION_H */
Commit	Line	Data
f9ff0f30 SR	1	#ifndef _ASM_POWERPC_EXCEPTION_H
	2	#define _ASM_POWERPC_EXCEPTION_H
	3	/*
	4	* Extracted from head_64.S
	5	*
	6	* PowerPC version
	7	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	8	*
	9	* Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
	10	* Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
	11	* Adapted for Power Macintosh by Paul Mackerras.
	12	* Low-level exception handlers and MMU support
	13	* rewritten by Paul Mackerras.
	14	* Copyright (C) 1996 Paul Mackerras.
	15	*
	16	* Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
	17	* Mike Corrigan {engebret\|bergner\|mikejc}@us.ibm.com
	18	*
	19	* This file contains the low-level support and setup for the
	20	* PowerPC-64 platform, including trap and interrupt dispatch.
	21	*
	22	* This program is free software; you can redistribute it and/or
	23	* modify it under the terms of the GNU General Public License
	24	* as published by the Free Software Foundation; either version
	25	* 2 of the License, or (at your option) any later version.
	26	*/
	27	/*
	28	* The following macros define the code that appears as
	29	* the prologue to each of the exception handlers. They
	30	* are split into two parts to allow a single kernel binary
	31	* to be used for pSeries and iSeries.
	32	*
	33	* We make as much of the exception code common between native
	34	* exception handlers (including pSeries LPAR) and iSeries LPAR
	35	* implementations as possible.
	36	*/
	37
	38	#define EX_R9 0
	39	#define EX_R10 8
	40	#define EX_R11 16
	41	#define EX_R12 24
	42	#define EX_R13 32
	43	#define EX_SRR0 40
	44	#define EX_DAR 48
	45	#define EX_DSISR 56
	46	#define EX_CCR 60
	47	#define EX_R3 64
	48	#define EX_LR 72
48404f2e	49	#define EX_CFAR 80
f9ff0f30 SR	50
	51	/*
	52	* We're short on space and time in the exception prolog, so we can't
	53	* use the normal SET_REG_IMMEDIATE macro. Normally we just need the
	54	* low halfword of the address, but for Kdump we need the whole low
	55	* word.
	56	*/
f9ff0f30	57	#define LOAD_HANDLER(reg, label) \
1f6a93e4	58	addi reg,reg,(label)-_stext; /* virt addr of handler ... */
f9ff0f30	59
a5d4f3ad BH	60	/* Exception register prefixes */
	61	#define EXC_HV H
	62	#define EXC_STD
	63
b01c8b54	64	#define __EXCEPTION_PROLOG_1(area, extra, vec) \
2dd60d79	65	GET_PACA(r13); \
7180e3e6 SR	66	std r9,area+EX_R9(r13); /* save r9 - r12 */ \
7180e3e6 SR	67	std r10,area+EX_R10(r13); \
48404f2e PM	68	BEGIN_FTR_SECTION_NESTED(66); \
	69	mfspr r10,SPRN_CFAR; \
	70	std r10,area+EX_CFAR(r13); \
	71	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
b01c8b54 PM	72	mfcr r9; \
	73	extra(vec); \
	74	std r11,area+EX_R11(r13); \
	75	std r12,area+EX_R12(r13); \
	76	GET_SCRATCH0(r10); \
	77	std r10,area+EX_R13(r13)
	78	#define EXCEPTION_PROLOG_1(area, extra, vec) \
	79	__EXCEPTION_PROLOG_1(area, extra, vec)
7180e3e6	80
a5d4f3ad	81	#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
1f6a93e4 PM	82	ld r12,PACAKBASE(r13); /* get high part of &label */ \
1f6a93e4 PM	83	ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
a5d4f3ad	84	mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
f9ff0f30	85	LOAD_HANDLER(r12,label) \
a5d4f3ad BH	86	mtspr SPRN_##h##SRR0,r12; \
	87	mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
	88	mtspr SPRN_##h##SRR1,r10; \
	89	h##rfid; \
f9ff0f30	90	b . /* prevent speculative execution */
b01c8b54	91	#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
a5d4f3ad	92	__EXCEPTION_PROLOG_PSERIES_1(label, h)
f9ff0f30	93
b01c8b54 PM	94	#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
b01c8b54 PM	95	EXCEPTION_PROLOG_1(area, extra, vec); \
a5d4f3ad	96	EXCEPTION_PROLOG_PSERIES_1(label, h);
c5a8c0c9	97
b01c8b54	98	#define __KVMTEST(n) \
3c42bf8a	99	lbz r10,HSTATE_IN_GUEST(r13); \
b01c8b54 PM	100	cmpwi r10,0; \
	101	bne do_kvm_##n
	102
	103	#define __KVM_HANDLER(area, h, n) \
	104	do_kvm_##n: \
	105	ld r10,area+EX_R10(r13); \
3c42bf8a	106	stw r9,HSTATE_SCRATCH1(r13); \
b01c8b54	107	ld r9,area+EX_R9(r13); \
3c42bf8a	108	std r12,HSTATE_SCRATCH0(r13); \
b01c8b54 PM	109	li r12,n; \
	110	b kvmppc_interrupt
	111
	112	#define __KVM_HANDLER_SKIP(area, h, n) \
	113	do_kvm_##n: \
	114	cmpwi r10,KVM_GUEST_MODE_SKIP; \
	115	ld r10,area+EX_R10(r13); \
	116	beq 89f; \
3c42bf8a	117	stw r9,HSTATE_SCRATCH1(r13); \
b01c8b54	118	ld r9,area+EX_R9(r13); \
3c42bf8a	119	std r12,HSTATE_SCRATCH0(r13); \
b01c8b54 PM	120	li r12,n; \
	121	b kvmppc_interrupt; \
	122	89: mtocrf 0x80,r9; \
	123	ld r9,area+EX_R9(r13); \
	124	b kvmppc_skip_##h##interrupt
	125
	126	#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
	127	#define KVMTEST(n) __KVMTEST(n)
	128	#define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
	129	#define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
	130
	131	#else
	132	#define KVMTEST(n)
	133	#define KVM_HANDLER(area, h, n)
	134	#define KVM_HANDLER_SKIP(area, h, n)
	135	#endif
	136
de56a948 PM	137	#ifdef CONFIG_KVM_BOOK3S_PR
	138	#define KVMTEST_PR(n) __KVMTEST(n)
	139	#define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
	140	#define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
	141
	142	#else
	143	#define KVMTEST_PR(n)
	144	#define KVM_HANDLER_PR(area, h, n)
	145	#define KVM_HANDLER_PR_SKIP(area, h, n)
	146	#endif
	147
b01c8b54 PM	148	#define NOTEST(n)
b01c8b54 PM	149
f9ff0f30 SR	150	/*
	151	* The common exception prolog is used for all except a few exceptions
	152	* such as a segment miss on a kernel address. We have to be prepared
	153	* to take another exception from the point where we first touch the
	154	* kernel stack onwards.
	155	*
	156	* On entry r13 points to the paca, r9-r13 are saved in the paca,
	157	* r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
	158	* SRR1, and relocation is on.
	159	*/
	160	#define EXCEPTION_PROLOG_COMMON(n, area) \
	161	andi. r10,r12,MSR_PR; /* See if coming from user */ \
	162	mr r10,r1; /* Save r1 */ \
	163	subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
	164	beq- 1f; \
	165	ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
	166	1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
1977b502 PM	167	blt+ cr1,3f; /* abort if it is */ \
1977b502 PM	168	li r1,(n); /* will be reloaded later */ \
f9ff0f30	169	sth r1,PACA_TRAP_SAVE(r13); \
1977b502 PM	170	std r3,area+EX_R3(r13); \
1977b502 PM	171	addi r3,r13,area; /* r3 -> where regs are saved*/ \
f9ff0f30 SR	172	b bad_stack; \
	173	3: std r9,_CCR(r1); /* save CR in stackframe */ \
	174	std r11,_NIP(r1); /* save SRR0 in stackframe */ \
	175	std r12,_MSR(r1); /* save SRR1 in stackframe */ \
	176	std r10,0(r1); /* make stack chain pointer */ \
	177	std r0,GPR0(r1); /* save r0 in stackframe */ \
	178	std r10,GPR1(r1); /* save r1 in stackframe */ \
	179	ACCOUNT_CPU_USER_ENTRY(r9, r10); \
	180	std r2,GPR2(r1); /* save r2 in stackframe */ \
	181	SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
	182	SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
	183	ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
	184	ld r10,area+EX_R10(r13); \
	185	std r9,GPR9(r1); \
	186	std r10,GPR10(r1); \
	187	ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
	188	ld r10,area+EX_R12(r13); \
	189	ld r11,area+EX_R13(r13); \
	190	std r9,GPR11(r1); \
	191	std r10,GPR12(r1); \
	192	std r11,GPR13(r1); \
48404f2e PM	193	BEGIN_FTR_SECTION_NESTED(66); \
	194	ld r10,area+EX_CFAR(r13); \
	195	std r10,ORIG_GPR3(r1); \
	196	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
f9ff0f30 SR	197	ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
	198	mflr r9; /* save LR in stackframe */ \
	199	std r9,_LINK(r1); \
	200	mfctr r10; /* save CTR in stackframe */ \
	201	std r10,_CTR(r1); \
	202	lbz r10,PACASOFTIRQEN(r13); \
	203	mfspr r11,SPRN_XER; /* save XER in stackframe */ \
	204	std r10,SOFTE(r1); \
	205	std r11,_XER(r1); \
	206	li r9,(n)+1; \
	207	std r9,_TRAP(r1); /* set trap number */ \
	208	li r10,0; \
	209	ld r11,exception_marker@toc(r2); \
	210	std r10,RESULT(r1); /* clear regs->result */ \
cf9efce0 PM	211	std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
cf9efce0 PM	212	ACCOUNT_STOLEN_TIME
f9ff0f30 SR	213
	214	/*
	215	* Exception vectors.
	216	*/
b3e6b5df BH	217	#define STD_EXCEPTION_PSERIES(loc, vec, label) \
b3e6b5df BH	218	. = loc; \
f9ff0f30 SR	219	.globl label##_pSeries; \
	220	label##_pSeries: \
	221	HMT_MEDIUM; \
673b189a	222	SET_SCRATCH0(r13); /* save r13 */ \
b01c8b54	223	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
de56a948	224	EXC_STD, KVMTEST_PR, vec)
f9ff0f30	225
b3e6b5df BH	226	#define STD_EXCEPTION_HV(loc, vec, label) \
	227	. = loc; \
	228	.globl label##_hv; \
	229	label##_hv: \
f9ff0f30	230	HMT_MEDIUM; \
b01c8b54 PM	231	SET_SCRATCH0(r13); /* save r13 */ \
	232	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
	233	EXC_HV, KVMTEST, vec)
f9ff0f30	234
7230c564 BH	235	/* This associate vector numbers with bits in paca->irq_happened */
	236	#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
	237	#define SOFTEN_VALUE_0x502 PACA_IRQ_EE
	238	#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
	239	#define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
	240
	241	#define __SOFTEN_TEST(h, vec) \
f9ff0f30	242	lbz r10,PACASOFTIRQEN(r13); \
f9ff0f30	243	cmpwi r10,0; \
7230c564	244	li r10,SOFTEN_VALUE_##vec; \
b01c8b54	245	beq masked_##h##interrupt
7230c564	246	#define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
b01c8b54	247
de56a948 PM	248	#define SOFTEN_TEST_PR(vec) \
de56a948 PM	249	KVMTEST_PR(vec); \
7230c564	250	_SOFTEN_TEST(EXC_STD, vec)
b01c8b54 PM	251
	252	#define SOFTEN_TEST_HV(vec) \
	253	KVMTEST(vec); \
7230c564	254	_SOFTEN_TEST(EXC_HV, vec)
b01c8b54	255
9e368f29 PM	256	#define SOFTEN_TEST_HV_201(vec) \
9e368f29 PM	257	KVMTEST(vec); \
7230c564	258	_SOFTEN_TEST(EXC_STD, vec)
9e368f29	259
b01c8b54 PM	260	#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
	261	HMT_MEDIUM; \
	262	SET_SCRATCH0(r13); /* save r13 */ \
	263	__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
	264	EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
	265	#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
	266	__MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
b3e6b5df BH	267
	268	#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
	269	. = loc; \
	270	.globl label##_pSeries; \
	271	label##_pSeries: \
b01c8b54	272	_MASKABLE_EXCEPTION_PSERIES(vec, label, \
de56a948	273	EXC_STD, SOFTEN_TEST_PR)
b3e6b5df BH	274
	275	#define MASKABLE_EXCEPTION_HV(loc, vec, label) \
	276	. = loc; \
	277	.globl label##_hv; \
	278	label##_hv: \
b01c8b54 PM	279	_MASKABLE_EXCEPTION_PSERIES(vec, label, \
b01c8b54 PM	280	EXC_HV, SOFTEN_TEST_HV)
f9ff0f30	281
1b701179 BH	282	/*
	283	* Our exception common code can be passed various "additions"
	284	* to specify the behaviour of interrupts, whether to kick the
	285	* runlatch, etc...
	286	*/
	287
	288	/* Exception addition: Hard disable interrupts */
7230c564	289	#define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
f9ff0f30	290
fe1952fc BH	291	#define ADD_NVGPRS \
	292	bl .save_nvgprs
	293
	294	#define RUNLATCH_ON \
	295	BEGIN_FTR_SECTION \
9778b696	296	CURRENT_THREAD_INFO(r3, r1); \
fe1952fc BH	297	ld r4,TI_LOCAL_FLAGS(r3); \
	298	andi. r0,r4,_TLF_RUNLATCH; \
	299	beql ppc64_runlatch_on_trampoline; \
	300	END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
	301
	302	#define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
	303	.align 7; \
	304	.globl label##_common; \
	305	label##_common: \
	306	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
	307	additions; \
	308	addi r3,r1,STACK_FRAME_OVERHEAD; \
	309	bl hdlr; \
	310	b ret
	311
	312	#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
	313	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
	314	ADD_NVGPRS;DISABLE_INTS)
f9ff0f30 SR	315
	316	/*
	317	* Like STD_EXCEPTION_COMMON, but for exceptions that can occur
7450f6f0 BH	318	* in the idle task and therefore need the special idle handling
7450f6f0 BH	319	* (finish nap and runlatch)
f9ff0f30	320	*/
fe1952fc BH	321	#define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
	322	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
	323	FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)
f9ff0f30 SR	324
	325	/*
	326	* When the idle code in power4_idle puts the CPU into NAP mode,
	327	* it has to do so in a loop, and relies on the external interrupt
	328	* and decrementer interrupt entry code to get it out of the loop.
	329	* It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
	330	* to signal that it is in the loop and needs help to get out.
	331	*/
	332	#ifdef CONFIG_PPC_970_NAP
	333	#define FINISH_NAP \
	334	BEGIN_FTR_SECTION \
9778b696	335	CURRENT_THREAD_INFO(r11, r1); \
f9ff0f30 SR	336	ld r9,TI_LOCAL_FLAGS(r11); \
	337	andi. r10,r9,_TLF_NAPPING; \
	338	bnel power4_fixup_nap; \
	339	END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
	340	#else
	341	#define FINISH_NAP
	342	#endif
	343
	344	#endif /* _ASM_POWERPC_EXCEPTION_H */