[deliverable/linux.git] / arch / powerpc / include / asm / iommu.h

/*
 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
 * Rewrite, cleanup:
 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
 * 
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 * 
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

#ifndef _ASM_IOMMU_H
#define _ASM_IOMMU_H
#ifdef __KERNEL__

#include <linux/compiler.h>
#include <linux/spinlock.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/bitops.h>
#include <asm/machdep.h>
#include <asm/types.h>

#define IOMMU_PAGE_SHIFT_4K      12
#define IOMMU_PAGE_SIZE_4K       (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K)
#define IOMMU_PAGE_MASK_4K       (~((1 << IOMMU_PAGE_SHIFT_4K) - 1))
#define IOMMU_PAGE_ALIGN_4K(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE_4K)

#define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift)
#define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1))
#define IOMMU_PAGE_ALIGN(addr, tblptr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE(tblptr))

/* Boot time flags */
extern int iommu_is_off;
extern int iommu_force_on;

/*
 * IOMAP_MAX_ORDER defines the largest contiguous block
 * of dma space we can get.  IOMAP_MAX_ORDER = 13
 * allows up to 2**12 pages (4096 * 4096) = 16 MB
 */
#define IOMAP_MAX_ORDER		13

#define IOMMU_POOL_HASHBITS	2
#define IOMMU_NR_POOLS		(1 << IOMMU_POOL_HASHBITS)

struct iommu_pool {
	unsigned long start;
	unsigned long end;
	unsigned long hint;
	spinlock_t lock;
} ____cacheline_aligned_in_smp;

struct iommu_table {
	unsigned long  it_busno;     /* Bus number this table belongs to */
	unsigned long  it_size;      /* Size of iommu table in entries */
	unsigned long  it_offset;    /* Offset into global table */
	unsigned long  it_base;      /* mapped address of tce table */
	unsigned long  it_index;     /* which iommu table this is */
	unsigned long  it_type;      /* type: PCI or Virtual Bus */
	unsigned long  it_blocksize; /* Entries in each block (cacheline) */
	unsigned long  poolsize;
	unsigned long  nr_pools;
	struct iommu_pool large_pool;
	struct iommu_pool pools[IOMMU_NR_POOLS];
	unsigned long *it_map;       /* A simple allocation bitmap for now */
	unsigned long  it_page_shift;/* table iommu page size */
#ifdef CONFIG_IOMMU_API
	struct iommu_group *it_group;
#endif
	void (*set_bypass)(struct iommu_table *tbl, bool enable);
};

/* Pure 2^n version of get_order */
static inline __attribute_const__
int get_iommu_order(unsigned long size, struct iommu_table *tbl)
{
	return __ilog2((size - 1) >> tbl->it_page_shift) + 1;
}


struct scatterlist;

static inline void set_iommu_table_base(struct device *dev, void *base)
{
	dev->archdata.dma_data.iommu_table_base = base;
}

static inline void *get_iommu_table_base(struct device *dev)
{
	return dev->archdata.dma_data.iommu_table_base;
}

/* Frees table for an individual device node */
extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);

/* Initializes an iommu_table based in values set in the passed-in
 * structure
 */
extern struct iommu_table *iommu_init_table(struct iommu_table * tbl,
					    int nid);
#ifdef CONFIG_IOMMU_API
extern void iommu_register_group(struct iommu_table *tbl,
				 int pci_domain_number, unsigned long pe_num);
extern int iommu_add_device(struct device *dev);
extern void iommu_del_device(struct device *dev);
extern int __init tce_iommu_bus_notifier_init(void);
#else
static inline void iommu_register_group(struct iommu_table *tbl,
					int pci_domain_number,
					unsigned long pe_num)
{
}

static inline int iommu_add_device(struct device *dev)
{
	return 0;
}

static inline void iommu_del_device(struct device *dev)
{
}

static inline int __init tce_iommu_bus_notifier_init(void)
{
        return 0;
}
#endif /* !CONFIG_IOMMU_API */

static inline void set_iommu_table_base_and_group(struct device *dev,
						  void *base)
{
	set_iommu_table_base(dev, base);
	iommu_add_device(dev);
}

extern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,
			    struct scatterlist *sglist, int nelems,
			    unsigned long mask,
			    enum dma_data_direction direction,
			    struct dma_attrs *attrs);
extern void ppc_iommu_unmap_sg(struct iommu_table *tbl,
			       struct scatterlist *sglist,
			       int nelems,
			       enum dma_data_direction direction,
			       struct dma_attrs *attrs);

extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
				  size_t size, dma_addr_t *dma_handle,
				  unsigned long mask, gfp_t flag, int node);
extern void iommu_free_coherent(struct iommu_table *tbl, size_t size,
				void *vaddr, dma_addr_t dma_handle);
extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
				 struct page *page, unsigned long offset,
				 size_t size, unsigned long mask,
				 enum dma_data_direction direction,
				 struct dma_attrs *attrs);
extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
			     size_t size, enum dma_data_direction direction,
			     struct dma_attrs *attrs);

extern void iommu_init_early_pSeries(void);
extern void iommu_init_early_dart(void);
extern void iommu_init_early_pasemi(void);

extern void alloc_dart_table(void);
#if defined(CONFIG_PPC64) && defined(CONFIG_PM)
static inline void iommu_save(void)
{
	if (ppc_md.iommu_save)
		ppc_md.iommu_save();
}

static inline void iommu_restore(void)
{
	if (ppc_md.iommu_restore)
		ppc_md.iommu_restore();
}
#endif

/* The API to support IOMMU operations for VFIO */
extern int iommu_tce_clear_param_check(struct iommu_table *tbl,
		unsigned long ioba, unsigned long tce_value,
		unsigned long npages);
extern int iommu_tce_put_param_check(struct iommu_table *tbl,
		unsigned long ioba, unsigned long tce);
extern int iommu_tce_build(struct iommu_table *tbl, unsigned long entry,
		unsigned long hwaddr, enum dma_data_direction direction);
extern unsigned long iommu_clear_tce(struct iommu_table *tbl,
		unsigned long entry);
extern int iommu_clear_tces_and_put_pages(struct iommu_table *tbl,
		unsigned long entry, unsigned long pages);
extern int iommu_put_tce_user_mode(struct iommu_table *tbl,
		unsigned long entry, unsigned long tce);

extern void iommu_flush_tce(struct iommu_table *tbl);
extern int iommu_take_ownership(struct iommu_table *tbl);
extern void iommu_release_ownership(struct iommu_table *tbl);

extern enum dma_data_direction iommu_tce_direction(unsigned long tce);

#endif /* __KERNEL__ */
#endif /* _ASM_IOMMU_H */
Commit	Line	Data
9b6b563c PM	1	/*
	2	* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
	3	* Rewrite, cleanup:
91f14480	4	* Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
9b6b563c PM	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20
	21	#ifndef _ASM_IOMMU_H
	22	#define _ASM_IOMMU_H
88ced031	23	#ifdef __KERNEL__
9b6b563c	24
5d2efba6	25	#include <linux/compiler.h>
9b6b563c PM	26	#include <linux/spinlock.h>
	27	#include <linux/device.h>
	28	#include <linux/dma-mapping.h>
1977f032	29	#include <linux/bitops.h>
7e11580b	30	#include <asm/machdep.h>
5d2efba6	31	#include <asm/types.h>
5d2efba6	32
e589a440 AP	33	#define IOMMU_PAGE_SHIFT_4K 12
	34	#define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K)
	35	#define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1))
	36	#define IOMMU_PAGE_ALIGN_4K(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE_4K)
5d2efba6	37
d0847757 AP	38	#define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift)
	39	#define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1))
	40	#define IOMMU_PAGE_ALIGN(addr, tblptr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE(tblptr))
	41
165785e5 JK	42	/* Boot time flags */
	43	extern int iommu_is_off;
	44	extern int iommu_force_on;
5d2efba6	45
9b6b563c PM	46	/*
	47	* IOMAP_MAX_ORDER defines the largest contiguous block
	48	* of dma space we can get. IOMAP_MAX_ORDER = 13
	49	* allows up to 2*12 pages (4096 4096) = 16 MB
	50	*/
5d2efba6	51	#define IOMAP_MAX_ORDER 13
9b6b563c	52
b4c3a872 AB	53	#define IOMMU_POOL_HASHBITS 2
	54	#define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS)
	55
	56	struct iommu_pool {
	57	unsigned long start;
	58	unsigned long end;
	59	unsigned long hint;
	60	spinlock_t lock;
	61	} ____cacheline_aligned_in_smp;
	62
9b6b563c PM	63	struct iommu_table {
	64	unsigned long it_busno; /* Bus number this table belongs to */
	65	unsigned long it_size; /* Size of iommu table in entries */
	66	unsigned long it_offset; /* Offset into global table */
	67	unsigned long it_base; /* mapped address of tce table */
	68	unsigned long it_index; /* which iommu table this is */
	69	unsigned long it_type; /* type: PCI or Virtual Bus */
	70	unsigned long it_blocksize; /* Entries in each block (cacheline) */
b4c3a872 AB	71	unsigned long poolsize;
	72	unsigned long nr_pools;
	73	struct iommu_pool large_pool;
	74	struct iommu_pool pools[IOMMU_NR_POOLS];
9b6b563c	75	unsigned long it_map; / A simple allocation bitmap for now */
3a553170	76	unsigned long it_page_shift;/* table iommu page size */
4e13c1ac AK	77	#ifdef CONFIG_IOMMU_API
	78	struct iommu_group *it_group;
	79	#endif
cd15b048	80	void (set_bypass)(struct iommu_table tbl, bool enable);
9b6b563c PM	81	};
9b6b563c PM	82
d0847757 AP	83	/* Pure 2^n version of get_order */
	84	static inline __attribute_const__
	85	int get_iommu_order(unsigned long size, struct iommu_table *tbl)
	86	{
	87	return __ilog2((size - 1) >> tbl->it_page_shift) + 1;
	88	}
	89
	90
9b6b563c	91	struct scatterlist;
9b6b563c	92
738ef42e BB	93	static inline void set_iommu_table_base(struct device dev, void base)
	94	{
	95	dev->archdata.dma_data.iommu_table_base = base;
	96	}
	97
	98	static inline void get_iommu_table_base(struct device dev)
	99	{
	100	return dev->archdata.dma_data.iommu_table_base;
	101	}
	102
9b6b563c	103	/* Frees table for an individual device node */
68d315f5	104	extern void iommu_free_table(struct iommu_table tbl, const char node_name);
9b6b563c	105
9b6b563c PM	106	/* Initializes an iommu_table based in values set in the passed-in
	107	* structure
	108	*/
ca1588e7 AB	109	extern struct iommu_table iommu_init_table(struct iommu_table tbl,
ca1588e7 AB	110	int nid);
d905c5df	111	#ifdef CONFIG_IOMMU_API
4e13c1ac AK	112	extern void iommu_register_group(struct iommu_table *tbl,
4e13c1ac AK	113	int pci_domain_number, unsigned long pe_num);
d905c5df AK	114	extern int iommu_add_device(struct device *dev);
d905c5df AK	115	extern void iommu_del_device(struct device *dev);
4ad04e59	116	extern int __init tce_iommu_bus_notifier_init(void);
d905c5df AK	117	#else
	118	static inline void iommu_register_group(struct iommu_table *tbl,
	119	int pci_domain_number,
	120	unsigned long pe_num)
	121	{
	122	}
	123
	124	static inline int iommu_add_device(struct device *dev)
	125	{
	126	return 0;
	127	}
	128
	129	static inline void iommu_del_device(struct device *dev)
	130	{
	131	}
4ad04e59 NA	132
	133	static inline int __init tce_iommu_bus_notifier_init(void)
	134	{
	135	return 0;
	136	}
d905c5df AK	137	#endif /* !CONFIG_IOMMU_API */
	138
	139	static inline void set_iommu_table_base_and_group(struct device *dev,
	140	void *base)
	141	{
	142	set_iommu_table_base(dev, base);
	143	iommu_add_device(dev);
	144	}
9b6b563c	145
0690cbd2 JR	146	extern int ppc_iommu_map_sg(struct device dev, struct iommu_table tbl,
	147	struct scatterlist *sglist, int nelems,
	148	unsigned long mask,
	149	enum dma_data_direction direction,
	150	struct dma_attrs *attrs);
	151	extern void ppc_iommu_unmap_sg(struct iommu_table *tbl,
	152	struct scatterlist *sglist,
	153	int nelems,
	154	enum dma_data_direction direction,
	155	struct dma_attrs *attrs);
9b6b563c	156
fb3475e9 FT	157	extern void iommu_alloc_coherent(struct device dev, struct iommu_table *tbl,
	158	size_t size, dma_addr_t *dma_handle,
	159	unsigned long mask, gfp_t flag, int node);
9b6b563c	160	extern void iommu_free_coherent(struct iommu_table *tbl, size_t size,
12d04eef	161	void *vaddr, dma_addr_t dma_handle);
f9226d57 MN	162	extern dma_addr_t iommu_map_page(struct device dev, struct iommu_table tbl,
	163	struct page *page, unsigned long offset,
	164	size_t size, unsigned long mask,
	165	enum dma_data_direction direction,
	166	struct dma_attrs *attrs);
	167	extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
	168	size_t size, enum dma_data_direction direction,
	169	struct dma_attrs *attrs);
9b6b563c PM	170
9b6b563c PM	171	extern void iommu_init_early_pSeries(void);
1beb6a7d	172	extern void iommu_init_early_dart(void);
31c56d82	173	extern void iommu_init_early_pasemi(void);
9b6b563c	174
1beb6a7d	175	extern void alloc_dart_table(void);
7e11580b JB	176	#if defined(CONFIG_PPC64) && defined(CONFIG_PM)
	177	static inline void iommu_save(void)
	178	{
	179	if (ppc_md.iommu_save)
	180	ppc_md.iommu_save();
	181	}
	182
	183	static inline void iommu_restore(void)
	184	{
	185	if (ppc_md.iommu_restore)
	186	ppc_md.iommu_restore();
	187	}
	188	#endif
9b6b563c	189
4e13c1ac AK	190	/* The API to support IOMMU operations for VFIO */
	191	extern int iommu_tce_clear_param_check(struct iommu_table *tbl,
	192	unsigned long ioba, unsigned long tce_value,
	193	unsigned long npages);
	194	extern int iommu_tce_put_param_check(struct iommu_table *tbl,
	195	unsigned long ioba, unsigned long tce);
	196	extern int iommu_tce_build(struct iommu_table *tbl, unsigned long entry,
	197	unsigned long hwaddr, enum dma_data_direction direction);
	198	extern unsigned long iommu_clear_tce(struct iommu_table *tbl,
	199	unsigned long entry);
	200	extern int iommu_clear_tces_and_put_pages(struct iommu_table *tbl,
	201	unsigned long entry, unsigned long pages);
	202	extern int iommu_put_tce_user_mode(struct iommu_table *tbl,
	203	unsigned long entry, unsigned long tce);
	204
	205	extern void iommu_flush_tce(struct iommu_table *tbl);
	206	extern int iommu_take_ownership(struct iommu_table *tbl);
	207	extern void iommu_release_ownership(struct iommu_table *tbl);
	208
	209	extern enum dma_data_direction iommu_tce_direction(unsigned long tce);
	210
88ced031	211	#endif /* __KERNEL__ */
9b6b563c	212	#endif /* _ASM_IOMMU_H */