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1 | /* |
2 | * Copyright 2010-2011 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License, version 2, as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #ifndef ASM_KVM_BOOKE_HV_ASM_H | |
10 | #define ASM_KVM_BOOKE_HV_ASM_H | |
11 | ||
12 | #ifdef __ASSEMBLY__ | |
13 | ||
14 | /* | |
15 | * All exceptions from guest state must go through KVM | |
16 | * (except for those which are delivered directly to the guest) -- | |
17 | * there are no exceptions for which we fall through directly to | |
18 | * the normal host handler. | |
19 | * | |
e51f8f32 | 20 | * 32-bit host |
d30f6e48 SW |
21 | * Expected inputs (normal exceptions): |
22 | * SCRATCH0 = saved r10 | |
23 | * r10 = thread struct | |
24 | * r11 = appropriate SRR1 variant (currently used as scratch) | |
25 | * r13 = saved CR | |
26 | * *(r10 + THREAD_NORMSAVE(0)) = saved r11 | |
27 | * *(r10 + THREAD_NORMSAVE(2)) = saved r13 | |
28 | * | |
29 | * Expected inputs (crit/mcheck/debug exceptions): | |
30 | * appropriate SCRATCH = saved r8 | |
31 | * r8 = exception level stack frame | |
32 | * r9 = *(r8 + _CCR) = saved CR | |
33 | * r11 = appropriate SRR1 variant (currently used as scratch) | |
34 | * *(r8 + GPR9) = saved r9 | |
35 | * *(r8 + GPR10) = saved r10 (r10 not yet clobbered) | |
36 | * *(r8 + GPR11) = saved r11 | |
e51f8f32 MC |
37 | * |
38 | * 64-bit host | |
39 | * Expected inputs (GEN/GDBELL/DBG/MC exception types): | |
40 | * r10 = saved CR | |
41 | * r13 = PACA_POINTER | |
42 | * *(r13 + PACA_EX##type + EX_R10) = saved r10 | |
43 | * *(r13 + PACA_EX##type + EX_R11) = saved r11 | |
44 | * SPRN_SPRG_##type##_SCRATCH = saved r13 | |
45 | * | |
46 | * Expected inputs (CRIT exception type): | |
47 | * r10 = saved CR | |
48 | * r13 = PACA_POINTER | |
49 | * *(r13 + PACA_EX##type + EX_R10) = saved r10 | |
50 | * *(r13 + PACA_EX##type + EX_R11) = saved r11 | |
51 | * *(r13 + PACA_EX##type + EX_R13) = saved r13 | |
52 | * | |
53 | * Expected inputs (TLB exception type): | |
54 | * r10 = saved CR | |
55 | * r13 = PACA_POINTER | |
56 | * *(r13 + PACA_EX##type + EX_TLB_R10) = saved r10 | |
57 | * *(r13 + PACA_EX##type + EX_TLB_R11) = saved r11 | |
58 | * SPRN_SPRG_GEN_SCRATCH = saved r13 | |
59 | * | |
60 | * Only the bolted version of TLB miss exception handlers is supported now. | |
d30f6e48 SW |
61 | */ |
62 | .macro DO_KVM intno srr1 | |
63 | #ifdef CONFIG_KVM_BOOKE_HV | |
64 | BEGIN_FTR_SECTION | |
65 | mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */ | |
d61966fc | 66 | bf 3, 1975f |
d30f6e48 | 67 | b kvmppc_handler_\intno\()_\srr1 |
d61966fc | 68 | 1975: |
d30f6e48 SW |
69 | END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV) |
70 | #endif | |
71 | .endm | |
72 | ||
73 | #endif /*__ASSEMBLY__ */ | |
74 | #endif /* ASM_KVM_BOOKE_HV_ASM_H */ |