Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
8882a4da DG |
2 | * This control block defines the PACA which defines the processor |
3 | * specific data for each logical processor on the system. | |
1da177e4 LT |
4 | * There are some pointers defined that are utilized by PLIC. |
5 | * | |
6 | * C 2001 PPC 64 Team, IBM Corp | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * as published by the Free Software Foundation; either version | |
11 | * 2 of the License, or (at your option) any later version. | |
8882a4da DG |
12 | */ |
13 | #ifndef _ASM_POWERPC_PACA_H | |
14 | #define _ASM_POWERPC_PACA_H | |
88ced031 | 15 | #ifdef __KERNEL__ |
1da177e4 | 16 | |
1da177e4 LT |
17 | #include <asm/types.h> |
18 | #include <asm/lppaca.h> | |
1da177e4 LT |
19 | #include <asm/mmu.h> |
20 | ||
21 | register struct paca_struct *local_paca asm("r13"); | |
048c8bc9 HD |
22 | |
23 | #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP) | |
24 | extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */ | |
25 | /* | |
26 | * Add standard checks that preemption cannot occur when using get_paca(): | |
27 | * otherwise the paca_struct it points to may be the wrong one just after. | |
28 | */ | |
29 | #define get_paca() ((void) debug_smp_processor_id(), local_paca) | |
30 | #else | |
1da177e4 | 31 | #define get_paca() local_paca |
048c8bc9 HD |
32 | #endif |
33 | ||
3356bb9f | 34 | #define get_lppaca() (get_paca()->lppaca_ptr) |
2f6093c8 | 35 | #define get_slb_shadow() (get_paca()->slb_shadow_ptr) |
1da177e4 LT |
36 | |
37 | struct task_struct; | |
1da177e4 LT |
38 | |
39 | /* | |
40 | * Defines the layout of the paca. | |
41 | * | |
42 | * This structure is not directly accessed by firmware or the service | |
30ff2e87 | 43 | * processor. |
1da177e4 LT |
44 | */ |
45 | struct paca_struct { | |
91c60b5b | 46 | #ifdef CONFIG_PPC_BOOK3S |
1da177e4 LT |
47 | /* |
48 | * Because hw_cpu_id, unlike other paca fields, is accessed | |
49 | * routinely from other CPUs (from the IRQ code), we stick to | |
50 | * read-only (after boot) fields in the first cacheline to | |
51 | * avoid cacheline bouncing. | |
52 | */ | |
53 | ||
1da177e4 | 54 | struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ |
91c60b5b | 55 | #endif /* CONFIG_PPC_BOOK3S */ |
1da177e4 | 56 | /* |
2ef9481e | 57 | * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c |
1da177e4 LT |
58 | * load lock_token and paca_index with a single lwz |
59 | * instruction. They must travel together and be properly | |
60 | * aligned. | |
61 | */ | |
62 | u16 lock_token; /* Constant 0x8000, used in locks */ | |
63 | u16 paca_index; /* Logical processor number */ | |
64 | ||
1da177e4 | 65 | u64 kernel_toc; /* Kernel TOC address */ |
1f6a93e4 PM |
66 | u64 kernelbase; /* Base address of kernel */ |
67 | u64 kernel_msr; /* MSR while running in kernel */ | |
91c60b5b | 68 | #ifdef CONFIG_PPC_STD_MMU_64 |
1da177e4 LT |
69 | u64 stab_real; /* Absolute address of segment table */ |
70 | u64 stab_addr; /* Virtual address of segment table */ | |
91c60b5b | 71 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
1da177e4 | 72 | void *emergency_sp; /* pointer to emergency stack */ |
7a0268fa | 73 | u64 data_offset; /* per cpu data offset */ |
1da177e4 LT |
74 | s16 hw_cpu_id; /* Physical processor number */ |
75 | u8 cpu_start; /* At startup, processor spins until */ | |
76 | /* this becomes non-zero. */ | |
91c60b5b | 77 | #ifdef CONFIG_PPC_STD_MMU_64 |
e91948fd | 78 | struct slb_shadow *slb_shadow_ptr; |
1da177e4 LT |
79 | |
80 | /* | |
81 | * Now, starting in cacheline 2, the exception save areas | |
82 | */ | |
3c726f8d BH |
83 | /* used for most interrupts/exceptions */ |
84 | u64 exgen[10] __attribute__((aligned(0x80))); | |
85 | u64 exmc[10]; /* used for machine checks */ | |
86 | u64 exslb[10]; /* used for SLB/segment table misses | |
87 | * on the linear mapping */ | |
91c60b5b | 88 | /* SLB related definitions */ |
bf72aeba | 89 | u16 vmalloc_sllp; |
1da177e4 | 90 | u16 slb_cache_ptr; |
d0f13e3c | 91 | u16 slb_cache[SLB_CACHE_ENTRIES]; |
91c60b5b BH |
92 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
93 | ||
94 | mm_context_t context; | |
1da177e4 LT |
95 | |
96 | /* | |
97 | * then miscellaneous read-write fields | |
98 | */ | |
99 | struct task_struct *__current; /* Pointer to current */ | |
100 | u64 kstack; /* Saved Kernel stack addr */ | |
101 | u64 stab_rr; /* stab/slb round-robin counter */ | |
1da177e4 LT |
102 | u64 saved_r1; /* r1 save for RTAS calls */ |
103 | u64 saved_msr; /* MSR saved here by enter_rtas */ | |
68730401 | 104 | u16 trap_save; /* Used when bad stack is encountered */ |
d04c56f7 PM |
105 | u8 soft_enabled; /* irq soft-enable flag */ |
106 | u8 hard_enabled; /* set if irqs are enabled in MSR */ | |
f007cacf | 107 | u8 io_sync; /* writel() needs spin_unlock sync */ |
c6622f63 PM |
108 | |
109 | /* Stuff for accurate time accounting */ | |
110 | u64 user_time; /* accumulated usermode TB ticks */ | |
111 | u64 system_time; /* accumulated system TB ticks */ | |
112 | u64 startpurr; /* PURR/TB value snapshot */ | |
4603ac18 | 113 | u64 startspurr; /* SPURR value snapshot */ |
1da177e4 LT |
114 | }; |
115 | ||
116 | extern struct paca_struct paca[]; | |
90035fe3 | 117 | extern void initialise_pacas(void); |
1da177e4 | 118 | |
88ced031 | 119 | #endif /* __KERNEL__ */ |
8882a4da | 120 | #endif /* _ASM_POWERPC_PACA_H */ |