powernv/cpuidle: Redesign idle states management
[deliverable/linux.git] / arch / powerpc / include / asm / paca.h
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1da177e4 1/*
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2 * This control block defines the PACA which defines the processor
3 * specific data for each logical processor on the system.
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4 * There are some pointers defined that are utilized by PLIC.
5 *
6 * C 2001 PPC 64 Team, IBM Corp
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
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12 */
13#ifndef _ASM_POWERPC_PACA_H
14#define _ASM_POWERPC_PACA_H
88ced031 15#ifdef __KERNEL__
1da177e4 16
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17#ifdef CONFIG_PPC64
18
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19#include <asm/types.h>
20#include <asm/lppaca.h>
21#include <asm/mmu.h>
22#include <asm/page.h>
23#include <asm/exception-64e.h>
7e57cba0 24#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
2191d657 25#include <asm/kvm_book3s_asm.h>
7e57cba0 26#endif
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27
28register struct paca_struct *local_paca asm("r13");
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29
30#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
31extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
32/*
33 * Add standard checks that preemption cannot occur when using get_paca():
34 * otherwise the paca_struct it points to may be the wrong one just after.
35 */
36#define get_paca() ((void) debug_smp_processor_id(), local_paca)
37#else
1da177e4 38#define get_paca() local_paca
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39#endif
40
3356bb9f 41#define get_lppaca() (get_paca()->lppaca_ptr)
2f6093c8 42#define get_slb_shadow() (get_paca()->slb_shadow_ptr)
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43
44struct task_struct;
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45
46/*
47 * Defines the layout of the paca.
48 *
49 * This structure is not directly accessed by firmware or the service
30ff2e87 50 * processor.
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51 */
52struct paca_struct {
91c60b5b 53#ifdef CONFIG_PPC_BOOK3S
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54 /*
55 * Because hw_cpu_id, unlike other paca fields, is accessed
56 * routinely from other CPUs (from the IRQ code), we stick to
57 * read-only (after boot) fields in the first cacheline to
58 * avoid cacheline bouncing.
59 */
60
1da177e4 61 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
91c60b5b 62#endif /* CONFIG_PPC_BOOK3S */
1da177e4 63 /*
2ef9481e 64 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
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65 * load lock_token and paca_index with a single lwz
66 * instruction. They must travel together and be properly
67 * aligned.
68 */
54bb7f4b 69#ifdef __BIG_ENDIAN__
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70 u16 lock_token; /* Constant 0x8000, used in locks */
71 u16 paca_index; /* Logical processor number */
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72#else
73 u16 paca_index; /* Logical processor number */
74 u16 lock_token; /* Constant 0x8000, used in locks */
75#endif
1da177e4 76
1da177e4 77 u64 kernel_toc; /* Kernel TOC address */
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78 u64 kernelbase; /* Base address of kernel */
79 u64 kernel_msr; /* MSR while running in kernel */
1da177e4 80 void *emergency_sp; /* pointer to emergency stack */
7a0268fa 81 u64 data_offset; /* per cpu data offset */
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82 s16 hw_cpu_id; /* Physical processor number */
83 u8 cpu_start; /* At startup, processor spins until */
84 /* this becomes non-zero. */
1fc711f7 85 u8 kexec_state; /* set when kexec down has irqs off */
91c60b5b 86#ifdef CONFIG_PPC_STD_MMU_64
e91948fd 87 struct slb_shadow *slb_shadow_ptr;
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88 struct dtl_entry *dispatch_log;
89 struct dtl_entry *dispatch_log_end;
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90#endif /* CONFIG_PPC_STD_MMU_64 */
91 u64 dscr_default; /* per-CPU default DSCR */
1da177e4 92
1739ea9e 93#ifdef CONFIG_PPC_STD_MMU_64
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94 /*
95 * Now, starting in cacheline 2, the exception save areas
96 */
3c726f8d 97 /* used for most interrupts/exceptions */
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98 u64 exgen[13] __attribute__((aligned(0x80)));
99 u64 exmc[13]; /* used for machine checks */
100 u64 exslb[13]; /* used for SLB/segment table misses
3c726f8d 101 * on the linear mapping */
91c60b5b 102 /* SLB related definitions */
bf72aeba 103 u16 vmalloc_sllp;
1da177e4 104 u16 slb_cache_ptr;
735cafc3 105 u32 slb_cache[SLB_CACHE_ENTRIES];
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106#endif /* CONFIG_PPC_STD_MMU_64 */
107
dce6670a 108#ifdef CONFIG_PPC_BOOK3E
dce6670a 109 u64 exgen[8] __attribute__((aligned(0x80)));
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110 /* Keep pgd in the same cacheline as the start of extlb */
111 pgd_t *pgd __attribute__((aligned(0x80))); /* Current PGD */
112 pgd_t *kernel_pgd; /* Kernel PGD */
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113
114 /* Shared by all threads of a core -- points to tcd of first thread */
115 struct tlb_core_data *tcd_ptr;
116
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117 /*
118 * We can have up to 3 levels of reentrancy in the TLB miss handler,
119 * in each of four exception levels (normal, crit, mcheck, debug).
120 */
121 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
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122 u64 exmc[8]; /* used for machine checks */
123 u64 excrit[8]; /* used for crit interrupts */
124 u64 exdbg[8]; /* used for debug interrupts */
125
126 /* Kernel stack pointers for use by special exceptions */
127 void *mc_kstack;
128 void *crit_kstack;
129 void *dbg_kstack;
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130
131 struct tlb_core_data tcd;
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132#endif /* CONFIG_PPC_BOOK3E */
133
91c60b5b 134 mm_context_t context;
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135
136 /*
137 * then miscellaneous read-write fields
138 */
139 struct task_struct *__current; /* Pointer to current */
140 u64 kstack; /* Saved Kernel stack addr */
141 u64 stab_rr; /* stab/slb round-robin counter */
948cf67c 142 u64 saved_r1; /* r1 save for RTAS calls or PM */
1da177e4 143 u64 saved_msr; /* MSR saved here by enter_rtas */
68730401 144 u16 trap_save; /* Used when bad stack is encountered */
d04c56f7 145 u8 soft_enabled; /* irq soft-enable flag */
7230c564 146 u8 irq_happened; /* irq happened while soft-disabled */
f007cacf 147 u8 io_sync; /* writel() needs spin_unlock sync */
e360adbe 148 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
2fde6d20 149 u8 nap_state_lost; /* NV GPR values lost in power7_idle */
9d378dfa 150 u64 sprg_vdso; /* Saved user-visible sprg */
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151#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
152 u64 tm_scratch; /* TM scratch area for reclaim */
153#endif
c6622f63 154
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155#ifdef CONFIG_PPC_POWERNV
156 /* Per-core mask tracking idle threads and a lock bit-[L][TTTTTTTT] */
157 u32 *core_idle_state_ptr;
158 u8 thread_idle_state; /* PNV_THREAD_RUNNING/NAP/SLEEP */
159 /* Mask to indicate thread id in core */
160 u8 thread_mask;
161#endif
162
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163#ifdef CONFIG_PPC_BOOK3S_64
164 /* Exclusive emergency stack pointer for machine check exception. */
165 void *mc_emergency_sp;
166 /*
167 * Flag to check whether we are in machine check early handler
168 * and already using emergency stack.
169 */
170 u16 in_mce;
0ef95b41 171 u8 hmi_event_available; /* HMI event is available */
729b0f71 172#endif
ed79ba9e 173
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174 /* Stuff for accurate time accounting */
175 u64 user_time; /* accumulated usermode TB ticks */
176 u64 system_time; /* accumulated system TB ticks */
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177 u64 user_time_scaled; /* accumulated usermode SPURR ticks */
178 u64 starttime; /* TB value snapshot */
179 u64 starttime_user; /* TB value on exit to usermode */
4603ac18 180 u64 startspurr; /* SPURR value snapshot */
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181 u64 utime_sspurr; /* ->user_time when ->startspurr set */
182 u64 stolen_time; /* TB ticks taken by hypervisor */
183 u64 dtl_ridx; /* read index in dispatch log */
184 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
4b7ae55d 185
c14dea04 186#ifdef CONFIG_KVM_BOOK3S_HANDLER
7aa79938 187#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
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188 /* We use this to store guest state in */
189 struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
de56a948 190#endif
3c42bf8a 191 struct kvmppc_host_state kvm_hstate;
4b7ae55d 192#endif
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193};
194
1426d5a3 195extern struct paca_struct *paca;
1426d5a3 196extern void initialise_paca(struct paca_struct *new_paca, int cpu);
fc53b420 197extern void setup_paca(struct paca_struct *new_paca);
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198extern void allocate_pacas(void);
199extern void free_unused_pacas(void);
200
201#else /* CONFIG_PPC64 */
202
203static inline void allocate_pacas(void) { };
204static inline void free_unused_pacas(void) { };
205
206#endif /* CONFIG_PPC64 */
1da177e4 207
88ced031 208#endif /* __KERNEL__ */
8882a4da 209#endif /* _ASM_POWERPC_PACA_H */
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