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1 | /* |
2 | * Copyright 2009 Freescale Semicondutor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | * | |
9 | * provides masks and opcode images for use by code generation, emulation | |
10 | * and for instructions that older assemblers might not know about | |
11 | */ | |
12 | #ifndef _ASM_POWERPC_PPC_OPCODE_H | |
13 | #define _ASM_POWERPC_PPC_OPCODE_H | |
14 | ||
15 | #include <linux/stringify.h> | |
16 | #include <asm/asm-compat.h> | |
17 | ||
18 | /* sorted alphabetically */ | |
19 | #define PPC_INST_DCBA 0x7c0005ec | |
20 | #define PPC_INST_DCBA_MASK 0xfc0007fe | |
21 | #define PPC_INST_DCBAL 0x7c2005ec | |
22 | #define PPC_INST_DCBZL 0x7c2007ec | |
23 | #define PPC_INST_ISEL 0x7c00001e | |
24 | #define PPC_INST_ISEL_MASK 0xfc00003e | |
25 | #define PPC_INST_LSWI 0x7c0004aa | |
26 | #define PPC_INST_LSWX 0x7c00042a | |
27 | #define PPC_INST_LWSYNC 0x7c2004ac | |
28 | #define PPC_INST_MCRXR 0x7c000400 | |
29 | #define PPC_INST_MCRXR_MASK 0xfc0007fe | |
30 | #define PPC_INST_MFSPR_PVR 0x7c1f42a6 | |
31 | #define PPC_INST_MFSPR_PVR_MASK 0xfc1fffff | |
32 | #define PPC_INST_MSGSND 0x7c00019c | |
33 | #define PPC_INST_NOP 0x60000000 | |
34 | #define PPC_INST_POPCNTB 0x7c0000f4 | |
35 | #define PPC_INST_POPCNTB_MASK 0xfc0007fe | |
36 | #define PPC_INST_RFCI 0x4c000066 | |
37 | #define PPC_INST_RFDI 0x4c00004e | |
38 | #define PPC_INST_RFMCI 0x4c00004c | |
39 | ||
40 | #define PPC_INST_STRING 0x7c00042a | |
41 | #define PPC_INST_STRING_MASK 0xfc0007fe | |
42 | #define PPC_INST_STRING_GEN_MASK 0xfc00067e | |
43 | ||
44 | #define PPC_INST_STSWI 0x7c0005aa | |
45 | #define PPC_INST_STSWX 0x7c00052a | |
46 | #define PPC_INST_TLBILX 0x7c000626 | |
47 | #define PPC_INST_WAIT 0x7c00007c | |
48 | ||
49 | /* macros to insert fields into opcodes */ | |
50 | #define __PPC_RA(a) ((a & 0x1f) << 16) | |
51 | #define __PPC_RB(b) ((b & 0x1f) << 11) | |
52 | #define __PPC_T_TLB(t) ((t & 0x3) << 21) | |
53 | #define __PPC_WC(w) ((w & 0x3) << 21) | |
54 | ||
55 | /* Deal with instructions that older assemblers aren't aware of */ | |
56 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ | |
57 | __PPC_RA(a) | __PPC_RB(b)) | |
58 | #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ | |
59 | __PPC_RA(a) | __PPC_RB(b)) | |
60 | #define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ | |
61 | __PPC_RB(b)) | |
62 | #define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI) | |
63 | #define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI) | |
64 | #define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI) | |
65 | #define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \ | |
66 | __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b)) | |
67 | #define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b) | |
68 | #define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b) | |
69 | #define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) | |
70 | #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ | |
71 | __PPC_WC(w)) | |
72 | ||
73 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ |