projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 16c57b36 KG |
1 | /* |
| 2 | * Copyright 2009 Freescale Semicondutor, Inc. | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or | |
| 5 | * modify it under the terms of the GNU General Public License | |
| 6 | * as published by the Free Software Foundation; either version | |
| 7 | * 2 of the License, or (at your option) any later version. | |
| 8 | * | |
| 9 | * provides masks and opcode images for use by code generation, emulation | |
| 10 | * and for instructions that older assemblers might not know about | |
| 11 | */ | |
| 12 | #ifndef _ASM_POWERPC_PPC_OPCODE_H | |
| 13 | #define _ASM_POWERPC_PPC_OPCODE_H | |
| 14 | ||
| 15 | #include <linux/stringify.h> | |
| 16 | #include <asm/asm-compat.h> | |
| 17 | ||
| 18 | /* sorted alphabetically */ | |
| 19 | #define PPC_INST_DCBA 0x7c0005ec | |
| 20 | #define PPC_INST_DCBA_MASK 0xfc0007fe | |
| 21 | #define PPC_INST_DCBAL 0x7c2005ec | |
| 22 | #define PPC_INST_DCBZL 0x7c2007ec | |
| 23 | #define PPC_INST_ISEL 0x7c00001e | |
| 24 | #define PPC_INST_ISEL_MASK 0xfc00003e | |
| 25 | #define PPC_INST_LSWI 0x7c0004aa | |
| 26 | #define PPC_INST_LSWX 0x7c00042a | |
| 27 | #define PPC_INST_LWSYNC 0x7c2004ac | |
| dfb432cb | 28 | #define PPC_INST_LXVD2X 0x7c000698 |
| 16c57b36 KG |
29 | #define PPC_INST_MCRXR 0x7c000400 |
| 30 | #define PPC_INST_MCRXR_MASK 0xfc0007fe | |
| 31 | #define PPC_INST_MFSPR_PVR 0x7c1f42a6 | |
| 32 | #define PPC_INST_MFSPR_PVR_MASK 0xfc1fffff | |
| 33 | #define PPC_INST_MSGSND 0x7c00019c | |
| 34 | #define PPC_INST_NOP 0x60000000 | |
| 35 | #define PPC_INST_POPCNTB 0x7c0000f4 | |
| 36 | #define PPC_INST_POPCNTB_MASK 0xfc0007fe | |
| 37 | #define PPC_INST_RFCI 0x4c000066 | |
| 38 | #define PPC_INST_RFDI 0x4c00004e | |
| 39 | #define PPC_INST_RFMCI 0x4c00004c | |
| 40 | ||
| 41 | #define PPC_INST_STRING 0x7c00042a | |
| 42 | #define PPC_INST_STRING_MASK 0xfc0007fe | |
| 43 | #define PPC_INST_STRING_GEN_MASK 0xfc00067e | |
| 44 | ||
| 45 | #define PPC_INST_STSWI 0x7c0005aa | |
| 46 | #define PPC_INST_STSWX 0x7c00052a | |
| dfb432cb | 47 | #define PPC_INST_STXVD2X 0x7c000798 |
| 60dbf438 | 48 | #define PPC_INST_TLBIE 0x7c000264 |
| 7281f5dc | 49 | #define PPC_INST_TLBILX 0x7c000024 |
| 16c57b36 KG |
50 | #define PPC_INST_WAIT 0x7c00007c |
| 51 | ||
| 52 | /* macros to insert fields into opcodes */ | |
| da6b43c8 MN |
53 | #define __PPC_RA(a) (((a) & 0x1f) << 16) |
| 54 | #define __PPC_RB(b) (((b) & 0x1f) << 11) | |
| 60dbf438 | 55 | #define __PPC_RS(s) (((s) & 0x1f) << 21) |
| dfb432cb | 56 | #define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5)) |
| da6b43c8 MN |
57 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) |
| 58 | #define __PPC_WC(w) (((w) & 0x3) << 21) | |
| 16c57b36 KG |
59 | |
| 60 | /* Deal with instructions that older assemblers aren't aware of */ | |
| 61 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ | |
| 62 | __PPC_RA(a) | __PPC_RB(b)) | |
| 63 | #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ | |
| 64 | __PPC_RA(a) | __PPC_RB(b)) | |
| 65 | #define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ | |
| 66 | __PPC_RB(b)) | |
| 67 | #define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI) | |
| 68 | #define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI) | |
| 69 | #define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI) | |
| 70 | #define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \ | |
| 323d23ae | 71 | __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b)) |
| 16c57b36 KG |
72 | #define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b) |
| 73 | #define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b) | |
| 74 | #define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) | |
| 75 | #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ | |
| 76 | __PPC_WC(w)) | |
| 60dbf438 MM |
77 | #define PPC_TLBIE(lp,a) stringify_in_c(.long PPC_INST_TLBIE | \ |
| 78 | __PPC_RB(a) | __PPC_RS(lp)) | |
| 16c57b36 | 79 | |
| dfb432cb MN |
80 | /* |
| 81 | * Define what the VSX XX1 form instructions will look like, then add | |
| 82 | * the 128 bit load store instructions based on that. | |
| 83 | */ | |
| 84 | #define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b)) | |
| 85 | #define STXVD2X(s, a, b) stringify_in_c(.long PPC_INST_STXVD2X | \ | |
| 86 | VSX_XX1((s), (a), (b))) | |
| 87 | #define LXVD2X(s, a, b) stringify_in_c(.long PPC_INST_LXVD2X | \ | |
| 88 | VSX_XX1((s), (a), (b))) | |
| 89 | ||
| 16c57b36 | 90 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ |