percpu: make percpu symbols in powerpc unique
[deliverable/linux.git] / arch / powerpc / include / asm / smp.h
CommitLineData
1da177e4 1/*
5ad57078 2 * smp.h: PowerPC-specific SMP code.
1da177e4
LT
3 *
4 * Original was a copy of sparc smp.h. Now heavily modified
5 * for PPC.
6 *
7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
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16#ifndef _ASM_POWERPC_SMP_H
17#define _ASM_POWERPC_SMP_H
1da177e4 18#ifdef __KERNEL__
1da177e4 19
1da177e4
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20#include <linux/threads.h>
21#include <linux/cpumask.h>
22#include <linux/kernel.h>
23
24#ifndef __ASSEMBLY__
25
5ad57078 26#ifdef CONFIG_PPC64
1da177e4 27#include <asm/paca.h>
5ad57078 28#endif
d5a7430d 29#include <asm/percpu.h>
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30
31extern int boot_cpuid;
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32
33extern void cpu_die(void);
34
35#ifdef CONFIG_SMP
36
37extern void smp_send_debugger_break(int cpu);
7d12e780 38extern void smp_message_recv(int);
1da177e4 39
6b7487fc 40DECLARE_PER_CPU(unsigned int, cpu_pvr);
1c21a293 41
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42#ifdef CONFIG_HOTPLUG_CPU
43extern void fixup_irqs(cpumask_t map);
44int generic_cpu_disable(void);
45int generic_cpu_enable(unsigned int cpu);
46void generic_cpu_die(unsigned int cpu);
47void generic_mach_cpu_die(void);
48#endif
49
5ad57078 50#ifdef CONFIG_PPC64
048c8bc9 51#define raw_smp_processor_id() (local_paca->paca_index)
1da177e4 52#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
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53#else
54/* 32-bit */
55extern int smp_hw_index[];
56
57#define raw_smp_processor_id() (current_thread_info()->cpu)
58#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
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59
60static inline int get_hard_smp_processor_id(int cpu)
61{
62 return smp_hw_index[cpu];
63}
64
65static inline void set_hard_smp_processor_id(int cpu, int phys)
66{
67 smp_hw_index[cpu] = phys;
68}
5ad57078 69#endif
1da177e4 70
d5a7430d 71DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
440a0857 72DECLARE_PER_CPU(cpumask_t, cpu_core_map);
e9efed3b 73extern int cpu_to_core_id(int cpu);
1da177e4
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74
75/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
76 *
77 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
78 * in /proc/interrupts will be wrong!!! --Troy */
79#define PPC_MSG_CALL_FUNCTION 0
80#define PPC_MSG_RESCHEDULE 1
b7d7a240 81#define PPC_MSG_CALL_FUNC_SINGLE 2
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82#define PPC_MSG_DEBUGGER_BREAK 3
83
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84/*
85 * irq controllers that have dedicated ipis per message and don't
86 * need additional code in the action handler may use this
87 */
88extern int smp_request_message_ipi(int virq, int message);
89extern const char *smp_ipi_name[];
90
1da177e4
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91void smp_init_iSeries(void);
92void smp_init_pSeries(void);
19fe0475 93void smp_init_cell(void);
c347b798 94void smp_init_celleb(void);
5ad57078 95void smp_setup_cpu_maps(void);
d5a7430d 96void smp_setup_cpu_sibling_map(void);
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97
98extern int __cpu_disable(void);
99extern void __cpu_die(unsigned int cpu);
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100
101#else
102/* for UP */
78b5b626 103#define hard_smp_processor_id() get_hard_smp_processor_id(0)
5ad57078 104#define smp_setup_cpu_maps()
5ad57078 105
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106#endif /* CONFIG_SMP */
107
5ad57078 108#ifdef CONFIG_PPC64
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109static inline int get_hard_smp_processor_id(int cpu)
110{
111 return paca[cpu].hw_cpu_id;
112}
113
114static inline void set_hard_smp_processor_id(int cpu, int phys)
115{
116 paca[cpu].hw_cpu_id = phys;
117}
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118
119extern void smp_release_cpus(void);
120
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121#else
122/* 32-bit */
123#ifndef CONFIG_SMP
4df20460 124extern int boot_cpuid_phys;
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125static inline int get_hard_smp_processor_id(int cpu)
126{
127 return boot_cpuid_phys;
128}
129
130static inline void set_hard_smp_processor_id(int cpu, int phys)
131{
78b5b626 132 boot_cpuid_phys = phys;
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133}
134#endif /* !CONFIG_SMP */
135#endif /* !CONFIG_PPC64 */
1da177e4
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136
137extern int smt_enabled_at_boot;
138
139extern int smp_mpic_probe(void);
140extern void smp_mpic_setup_cpu(int cpu);
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141extern void smp_generic_kick_cpu(int nr);
142
143extern void smp_generic_give_timebase(void);
144extern void smp_generic_take_timebase(void);
145
146extern struct smp_ops_t *smp_ops;
147
b7d7a240 148extern void arch_send_call_function_single_ipi(int cpu);
f063ea02 149extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
b7d7a240 150
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151/* Definitions relative to the secondary CPU spin loop
152 * and entry point. Not all of them exist on both 32 and
153 * 64-bit but defining them all here doesn't harm
154 */
155extern void generic_secondary_smp_init(void);
2d27cfd3 156extern void generic_secondary_thread_init(void);
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157extern unsigned long __secondary_hold_spinloop;
158extern unsigned long __secondary_hold_acknowledge;
159extern char __secondary_hold;
160
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161#endif /* __ASSEMBLY__ */
162
1da177e4 163#endif /* __KERNEL__ */
5ad57078 164#endif /* _ASM_POWERPC_SMP_H) */
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