Commit | Line | Data |
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ae3a197e DH |
1 | /* |
2 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | |
3 | */ | |
4 | #ifndef _ASM_POWERPC_SWITCH_TO_H | |
5 | #define _ASM_POWERPC_SWITCH_TO_H | |
6 | ||
3eb5d588 AB |
7 | #include <asm/reg.h> |
8 | ||
ae3a197e DH |
9 | struct thread_struct; |
10 | struct task_struct; | |
11 | struct pt_regs; | |
12 | ||
13 | extern struct task_struct *__switch_to(struct task_struct *, | |
14 | struct task_struct *); | |
15 | #define switch_to(prev, next, last) ((last) = __switch_to((prev), (next))) | |
16 | ||
ae3a197e DH |
17 | extern struct task_struct *_switch(struct thread_struct *prev, |
18 | struct thread_struct *next); | |
19 | ||
d1e1cf2e AB |
20 | extern void switch_booke_debug_regs(struct debug_reg *new_debug); |
21 | ||
ae3a197e | 22 | extern int emulate_altivec(struct pt_regs *); |
d1e1cf2e | 23 | |
579e633e | 24 | extern void flush_all_to_thread(struct task_struct *); |
d1e1cf2e | 25 | extern void giveup_all(struct task_struct *); |
ae3a197e | 26 | |
037f0eed | 27 | #ifdef CONFIG_PPC_FPU |
d1e1cf2e | 28 | extern void enable_kernel_fp(void); |
037f0eed | 29 | extern void flush_fp_to_thread(struct task_struct *); |
5f20be44 | 30 | extern void giveup_fpu(struct task_struct *); |
8792468d | 31 | extern void save_fpu(struct task_struct *); |
3eb5d588 AB |
32 | static inline void disable_kernel_fp(void) |
33 | { | |
34 | msr_check_and_clear(MSR_FP); | |
35 | } | |
037f0eed | 36 | #else |
de2a20aa | 37 | static inline void __giveup_fpu(struct task_struct *t) { } |
8792468d | 38 | static inline void save_fpu(struct task_struct *t) { } |
037f0eed KH |
39 | static inline void flush_fp_to_thread(struct task_struct *t) { } |
40 | #endif | |
41 | ||
ae3a197e | 42 | #ifdef CONFIG_ALTIVEC |
d1e1cf2e | 43 | extern void enable_kernel_altivec(void); |
ae3a197e | 44 | extern void flush_altivec_to_thread(struct task_struct *); |
8cd3c23d | 45 | extern void giveup_altivec(struct task_struct *); |
6f515d84 | 46 | extern void save_altivec(struct task_struct *); |
3eb5d588 AB |
47 | static inline void disable_kernel_altivec(void) |
48 | { | |
49 | msr_check_and_clear(MSR_VEC); | |
50 | } | |
de2a20aa | 51 | #else |
6f515d84 | 52 | static inline void save_altivec(struct task_struct *t) { } |
de2a20aa | 53 | static inline void __giveup_altivec(struct task_struct *t) { } |
ae3a197e DH |
54 | #endif |
55 | ||
56 | #ifdef CONFIG_VSX | |
d1e1cf2e | 57 | extern void enable_kernel_vsx(void); |
ae3a197e | 58 | extern void flush_vsx_to_thread(struct task_struct *); |
3eb5d588 AB |
59 | static inline void disable_kernel_vsx(void) |
60 | { | |
61 | msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); | |
62 | } | |
ae3a197e DH |
63 | #endif |
64 | ||
65 | #ifdef CONFIG_SPE | |
d1e1cf2e | 66 | extern void enable_kernel_spe(void); |
ae3a197e | 67 | extern void flush_spe_to_thread(struct task_struct *); |
98da581e AB |
68 | extern void giveup_spe(struct task_struct *); |
69 | extern void __giveup_spe(struct task_struct *); | |
3eb5d588 AB |
70 | static inline void disable_kernel_spe(void) |
71 | { | |
72 | msr_check_and_clear(MSR_SPE); | |
73 | } | |
de2a20aa CB |
74 | #else |
75 | static inline void __giveup_spe(struct task_struct *t) { } | |
ae3a197e DH |
76 | #endif |
77 | ||
330a1eb7 ME |
78 | static inline void clear_task_ebb(struct task_struct *t) |
79 | { | |
80 | #ifdef CONFIG_PPC_BOOK3S_64 | |
81 | /* EBB perf events are not inherited, so clear all EBB state. */ | |
3df48c98 ME |
82 | t->thread.ebbrr = 0; |
83 | t->thread.ebbhr = 0; | |
330a1eb7 ME |
84 | t->thread.bescr = 0; |
85 | t->thread.mmcr2 = 0; | |
86 | t->thread.mmcr0 = 0; | |
87 | t->thread.siar = 0; | |
88 | t->thread.sdar = 0; | |
89 | t->thread.sier = 0; | |
90 | t->thread.used_ebb = 0; | |
91 | #endif | |
92 | } | |
93 | ||
ae3a197e | 94 | #endif /* _ASM_POWERPC_SWITCH_TO_H */ |