cputime: Consolidate vtime handling on context switch
[deliverable/linux.git] / arch / powerpc / include / asm / time.h
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1/*
2 * Common time prototypes and such for all ppc machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef __POWERPC_TIME_H
14#define __POWERPC_TIME_H
15
16#ifdef __KERNEL__
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17#include <linux/types.h>
18#include <linux/percpu.h>
19
20#include <asm/processor.h>
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21
22/* time.c */
23extern unsigned long tb_ticks_per_jiffy;
24extern unsigned long tb_ticks_per_usec;
25extern unsigned long tb_ticks_per_sec;
6e35994d 26extern struct clock_event_device decrementer_clockevent;
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27
28struct rtc_time;
29extern void to_tm(int tim, struct rtc_time * tm);
1c21a293 30extern void GregorianDay(struct rtc_time *tm);
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31
32extern void generic_calibrate_decr(void);
f2783c15 33
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34extern void set_dec_cpu6(unsigned int val);
35
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36/* Some sane defaults: 125 MHz timebase, 1GHz processor */
37extern unsigned long ppc_proc_freq;
38#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
39extern unsigned long ppc_tb_freq;
40#define DEFAULT_TB_FREQ 125000000UL
41
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42struct div_result {
43 u64 result_high;
44 u64 result_low;
45};
46
47/* Accessor functions for the timebase (RTC on 601) registers. */
48/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
49#ifdef CONFIG_6xx
5d14a18d 50#define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
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51#else
52#define __USE_RTC() 0
53#endif
54
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55#ifdef CONFIG_PPC64
56
57/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
58#define get_tbl get_tb
59
60#else
61
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62static inline unsigned long get_tbl(void)
63{
f2783c15 64#if defined(CONFIG_403GCX)
859deea9 65 unsigned long tbl;
f2783c15 66 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
859deea9 67 return tbl;
f2783c15 68#else
859deea9 69 return mftbl();
f2783c15 70#endif
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71}
72
73static inline unsigned int get_tbu(void)
74{
859deea9 75#ifdef CONFIG_403GCX
f2783c15 76 unsigned int tbu;
f2783c15 77 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
859deea9 78 return tbu;
f2783c15 79#else
859deea9 80 return mftbu();
f2783c15 81#endif
f2783c15 82}
859deea9 83#endif /* !CONFIG_PPC64 */
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84
85static inline unsigned int get_rtcl(void)
86{
87 unsigned int rtcl;
88
89 asm volatile("mfrtcl %0" : "=r" (rtcl));
90 return rtcl;
91}
92
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93static inline u64 get_rtc(void)
94{
95 unsigned int hi, lo, hi2;
96
97 do {
98 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
99 : "=r" (hi), "=r" (lo), "=r" (hi2));
100 } while (hi2 != hi);
101 return (u64)hi * 1000000000 + lo;
102}
103
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104#ifdef CONFIG_PPC64
105static inline u64 get_tb(void)
106{
107 return mftb();
108}
859deea9 109#else /* CONFIG_PPC64 */
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110static inline u64 get_tb(void)
111{
112 unsigned int tbhi, tblo, tbhi2;
113
114 do {
115 tbhi = get_tbu();
116 tblo = get_tbl();
117 tbhi2 = get_tbu();
118 } while (tbhi != tbhi2);
119
120 return ((u64)tbhi << 32) | tblo;
121}
859deea9 122#endif /* !CONFIG_PPC64 */
f2783c15 123
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124static inline u64 get_tb_or_rtc(void)
125{
126 return __USE_RTC() ? get_rtc() : get_tb();
127}
128
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129static inline void set_tb(unsigned int upper, unsigned int lower)
130{
131 mtspr(SPRN_TBWL, 0);
132 mtspr(SPRN_TBWU, upper);
133 mtspr(SPRN_TBWL, lower);
134}
135
136/* Accessor functions for the decrementer register.
137 * The 4xx doesn't even have a decrementer. I tried to use the
138 * generic timer interrupt code, which seems OK, with the 4xx PIT
139 * in auto-reload mode. The problem is PIT stops counting when it
140 * hits zero. If it would wrap, we could use it just like a decrementer.
141 */
142static inline unsigned int get_dec(void)
143{
144#if defined(CONFIG_40x)
145 return (mfspr(SPRN_PIT));
146#else
147 return (mfspr(SPRN_DEC));
148#endif
149}
150
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151/*
152 * Note: Book E and 4xx processors differ from other PowerPC processors
153 * in when the decrementer generates its interrupt: on the 1 to 0
154 * transition for Book E/4xx, but on the 0 to -1 transition for others.
155 */
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156static inline void set_dec(int val)
157{
158#if defined(CONFIG_40x)
aab69292 159 mtspr(SPRN_PIT, val);
f2783c15 160#elif defined(CONFIG_8xx_CPU6)
43875cc0 161 set_dec_cpu6(val - 1);
f2783c15 162#else
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163#ifndef CONFIG_BOOKE
164 --val;
f2783c15 165#endif
43875cc0 166 mtspr(SPRN_DEC, val);
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167#endif /* not 40x or 8xx_CPU6 */
168}
169
170static inline unsigned long tb_ticks_since(unsigned long tstamp)
171{
172 if (__USE_RTC()) {
173 int delta = get_rtcl() - (unsigned int) tstamp;
174 return delta < 0 ? delta + 1000000000 : delta;
175 }
176 return get_tbl() - tstamp;
177}
178
179#define mulhwu(x,y) \
180({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
181
182#ifdef CONFIG_PPC64
183#define mulhdu(x,y) \
184({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
185#else
186extern u64 mulhdu(u64, u64);
187#endif
188
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189extern void div128_by_32(u64 dividend_high, u64 dividend_low,
190 unsigned divisor, struct div_result *dr);
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191
192/* Used to store Processor Utilization register (purr) values */
193
194struct cpu_usage {
195 u64 current_tb; /* Holds the current purr register values */
196};
197
198DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
199
d831d0b8 200extern void secondary_cpu_time_init(void);
71712b45 201
7df10275 202DECLARE_PER_CPU(u64, decrementers_next_tb);
37fb9a02 203
f2783c15 204#endif /* __KERNEL__ */
7a69af63 205#endif /* __POWERPC_TIME_H */
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