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Merge git://git.infradead.org/battery-2.6
[deliverable/linux.git] / arch / powerpc / kernel / asm-offsets.c
CommitLineData
14cf11af
PM		 1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
14cf11af
PM		 16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
14cf11af
PM		 22#include <linux/mman.h>
23#include <linux/mm.h>
543b9fd3 24#include <linux/suspend.h>
ad7f7167 25#include <linux/hrtimer.h>
d1dead5c 26#ifdef CONFIG_PPC64
14cf11af
PM		 27#include <linux/time.h>
28#include <linux/hardirq.h>
d1dead5c 29#endif
d4d298fe 30#include <linux/kbuild.h>
d1dead5c 31
14cf11af
PM		 32#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
14cf11af
PM		 36#include <asm/cputable.h>
37#include <asm/thread_info.h>
033ef338 38#include <asm/rtas.h>
a7f290da 39#include <asm/vdso_datapage.h>
14cf11af
PM		 40#ifdef CONFIG_PPC64
41#include <asm/paca.h>
42#include <asm/lppaca.h>
14cf11af 43#include <asm/cache.h>
14cf11af 44#include <asm/compat.h>
11a27ad7 45#include <asm/mmu.h>
f04da0bc 46#include <asm/hvcall.h>
14cf11af 47#endif
3eb9cf07
SR		 48#ifdef CONFIG_PPC_ISERIES
49#include <asm/iseries/alpaca.h>
50#endif
db93f574 51#ifdef CONFIG_KVM
366d4b9b 52#include <linux/kvm_host.h>
db93f574 53#endif
14cf11af 54
fca622c5
KG		 55#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
56#include "head_booke.h"
57#endif
58
19f5465e
TP		 59#if defined(CONFIG_FSL_BOOKE)
60#include "../mm/mmu_decl.h"
61#endif
62
14cf11af
PM		 63int main(void)
64{
d1dead5c
SR		 65 DEFINE(THREAD, offsetof(struct task_struct, thread));
66 DEFINE(MM, offsetof(struct task_struct, mm));
5e696617 67 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
14cf11af 68#ifdef CONFIG_PPC64
d1dead5c
SR		 69 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
70#else
f7e4217b 71 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
d1dead5c
SR		 72#endif /* CONFIG_PPC64 */
73
14cf11af 74 DEFINE(KSP, offsetof(struct thread_struct, ksp));
85218827 75 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
14cf11af
PM		 76 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
77 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
78 DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
79 DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
14cf11af
PM		 80#ifdef CONFIG_ALTIVEC
81 DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
82 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
83 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
84 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
85#endif /* CONFIG_ALTIVEC */
c6e6771b
MN		 86#ifdef CONFIG_VSX
87 DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
88 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
89#endif /* CONFIG_VSX */
d1dead5c
SR		 90#ifdef CONFIG_PPC64
91 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
92#else /* CONFIG_PPC64 */
93 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
d1dead5c
SR		 94#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
95 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
d1dead5c 96#endif
14cf11af
PM		 97#ifdef CONFIG_SPE
98 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
99 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
100 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
101 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
102#endif /* CONFIG_SPE */
d1dead5c
SR		 103#endif /* CONFIG_PPC64 */
104
105 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
f39224a8 106 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
d1dead5c 107 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
d1dead5c 108 DEFINE(TI_TASK, offsetof(struct thread_info, task));
d1dead5c 109 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
d1dead5c
SR		 110
111#ifdef CONFIG_PPC64
112 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
113 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
114 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
115 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
116 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
117 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
d1dead5c
SR		 118 /* paca */
119 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
120 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
121 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
122 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
123 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
124 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
125 DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
126 DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
127 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
128 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
129 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
1f6a93e4
PM		 130 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
131 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
d04c56f7
PM		 132 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
133 DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
d1dead5c
SR		 134 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
135 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
136 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
bf72aeba 137 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
d0f13e3c
BH		 138#ifdef CONFIG_PPC_MM_SLICES
139 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
140 context.low_slices_psize));
141 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
142 context.high_slices_psize));
143 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
144 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
145#else
146 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
147
148#endif /* CONFIG_PPC_MM_SLICES */
d1dead5c
SR		 149 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
150 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
151 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
d1dead5c 152 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
3356bb9f 153 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
d1dead5c 154 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
c6622f63 155 DEFINE(PACA_STARTPURR, offsetof(struct paca_struct, startpurr));
4603ac18 156 DEFINE(PACA_STARTSPURR, offsetof(struct paca_struct, startspurr));
c6622f63
PM		 157 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
158 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
2f6093c8 159 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
57852a85 160 DEFINE(PACA_DATA_OFFSET, offsetof(struct paca_struct, data_offset));
68730401 161 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
d1dead5c 162
11a27ad7
MN		 163 DEFINE(SLBSHADOW_STACKVSID,
164 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
165 DEFINE(SLBSHADOW_STACKESID,
166 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
d1dead5c
SR		 167 DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
168 DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
169 DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
170 DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));
2f6093c8 171 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
033ef338 172#endif /* CONFIG_PPC64 */
d1dead5c
SR		 173
174 /* RTAS */
175 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
176 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
d1dead5c 177
14cf11af
PM		 178 /* Interrupt register frame */
179 DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
91120cc8
KG		 180 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
181#ifdef CONFIG_PPC64
14cf11af 182 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
d1dead5c
SR		 183 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
184 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
185 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
57852a85
MK		 186
187 /* hcall statistics */
188 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
189 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
190 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
191 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
d1dead5c 192#endif /* CONFIG_PPC64 */
14cf11af
PM		 193 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
194 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
195 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
196 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
197 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
198 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
199 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
200 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
201 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
202 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
203 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
204 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
205 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
206 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
d1dead5c 207#ifndef CONFIG_PPC64
14cf11af
PM		 208 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
209 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
210 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
211 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
212 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
213 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
214 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
215 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
216 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
217 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
218 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
219 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
220 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
221 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
222 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
223 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
224 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
225 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
d1dead5c 226#endif /* CONFIG_PPC64 */
14cf11af
PM		 227 /*
228 * Note: these symbols include _ because they overlap with special
229 * register names
230 */
231 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
232 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
233 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
234 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
235 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
14cf11af
PM		 236 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
237 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
238 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c
SR		 239 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
240 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
d73e0c99 241 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
d1dead5c
SR		 242#ifndef CONFIG_PPC64
243 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
244 /*
245 * The PowerPC 400-class & Book-E processors have neither the DAR
246 * nor the DSISR SPRs. Hence, we overload them to hold the similar
247 * DEAR and ESR SPRs for such processors. For critical interrupts
248 * we use them to hold SRR0 and SRR1.
14cf11af
PM		 249 */
250 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
251 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c 252#else /* CONFIG_PPC64 */
d1dead5c
SR		 253 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
254
255 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
256 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
257 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
258#endif /* CONFIG_PPC64 */
259
fca622c5
KG		 260#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
261 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
262 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
263 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
264 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
265 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
266 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
267 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
268 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
269 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
270 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
271 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
272 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
273 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
274 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
275 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
276 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
277#endif
278
14cf11af
PM		 279 DEFINE(CLONE_VM, CLONE_VM);
280 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
d1dead5c
SR		 281
282#ifndef CONFIG_PPC64
14cf11af 283 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
d1dead5c 284#endif /* ! CONFIG_PPC64 */
14cf11af
PM		 285
286 /* About the CPU features table */
14cf11af
PM		 287 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
288 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
f39b7a55 289 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
14cf11af 290
d1dead5c
SR		 291 DEFINE(pbe_address, offsetof(struct pbe, address));
292 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
293 DEFINE(pbe_next, offsetof(struct pbe, next));
14cf11af 294
543b9fd3 295#ifndef CONFIG_PPC64
fd582ec8 296 DEFINE(TASK_SIZE, TASK_SIZE);
d1dead5c 297 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
a7f290da 298#endif /* ! CONFIG_PPC64 */
14cf11af 299
a7f290da
BH		 300 /* datapage offsets for use by vdso */
301 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
302 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
303 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
304 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
305 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
306 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
307 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
308 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
309 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
310 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
597bc5c0 311 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
fbe48175
OJ		 312 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
313 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
314 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
315 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
a7f290da
BH		 316#ifdef CONFIG_PPC64
317 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
14cf11af
PM		 318 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
319 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
320 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
321 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
0c37ec2a
BH		 322 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
323 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 324 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
325 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
326#else
327 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
328 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
0c37ec2a
BH		 329 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
330 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 331#endif
332 /* timeval/timezone offsets for use by vdso */
14cf11af
PM		 333 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
334 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
a7f290da
BH		 335
336 /* Other bits used by the vdso */
337 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
338 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
339 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
151db1fc 340 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
a7f290da 341
007d88d0
DW		 342#ifdef CONFIG_BUG
343 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
344#endif
16a15a30
SR		 345
346#ifdef CONFIG_PPC_ISERIES
347 /* the assembler miscalculates the VSID values */
348 DEFINE(PAGE_OFFSET_ESID, GET_ESID(PAGE_OFFSET));
349 DEFINE(PAGE_OFFSET_VSID, KERNEL_VSID(PAGE_OFFSET));
350 DEFINE(VMALLOC_START_ESID, GET_ESID(VMALLOC_START));
351 DEFINE(VMALLOC_START_VSID, KERNEL_VSID(VMALLOC_START));
3eb9cf07
SR		 352
353 /* alpaca */
354 DEFINE(ALPACA_SIZE, sizeof(struct alpaca));
16a15a30 355#endif
ee7a76da 356
ee7a76da 357 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
4ee7084e 358 DEFINE(PTE_SIZE, sizeof(pte_t));
bee86f14 359
bbf45ba5 360#ifdef CONFIG_KVM
bbf45ba5
HB		 361 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
362 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
bbf45ba5
HB		 363 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
364 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
365 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
366 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
367 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
368 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
369 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.msr));
370 DEFINE(VCPU_SPRG4, offsetof(struct kvm_vcpu, arch.sprg4));
371 DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5));
372 DEFINE(VCPU_SPRG6, offsetof(struct kvm_vcpu, arch.sprg6));
373 DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7));
49dd2c49 374 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
bbf45ba5
HB		 375
376 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
377 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
378 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
379#endif
ca9153a3
IY		 380#ifdef CONFIG_44x
381 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
382 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
383#endif
19f5465e
TP		 384#ifdef CONFIG_FSL_BOOKE
385 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
386#endif
bbf45ba5 387
73e75b41
HB		 388#ifdef CONFIG_KVM_EXIT_TIMING
389 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
390 arch.timing_exit.tv32.tbu));
391 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
392 arch.timing_exit.tv32.tbl));
393 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
394 arch.timing_last_enter.tv32.tbu));
395 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
396 arch.timing_last_enter.tv32.tbl));
397#endif
398
14cf11af
PM		 399 return 0;
400}
Linux kernel - Deliverables
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