projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
KVM: PPC: Book3S HV: Align physical and virtual CPU thread numbers
[deliverable/linux.git] / arch / powerpc / kernel / asm-offsets.c
CommitLineData
14cf11af
PM		 1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
14cf11af
PM		 16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
14cf11af
PM		 22#include <linux/mman.h>
23#include <linux/mm.h>
543b9fd3 24#include <linux/suspend.h>
ad7f7167 25#include <linux/hrtimer.h>
d1dead5c 26#ifdef CONFIG_PPC64
14cf11af
PM		 27#include <linux/time.h>
28#include <linux/hardirq.h>
d1dead5c 29#endif
d4d298fe 30#include <linux/kbuild.h>
d1dead5c 31
14cf11af
PM		 32#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
14cf11af
PM		 36#include <asm/cputable.h>
37#include <asm/thread_info.h>
033ef338 38#include <asm/rtas.h>
a7f290da 39#include <asm/vdso_datapage.h>
14cf11af
PM		 40#ifdef CONFIG_PPC64
41#include <asm/paca.h>
42#include <asm/lppaca.h>
14cf11af 43#include <asm/cache.h>
14cf11af 44#include <asm/compat.h>
11a27ad7 45#include <asm/mmu.h>
f04da0bc 46#include <asm/hvcall.h>
19ccb76a 47#include <asm/xics.h>
14cf11af 48#endif
ed79ba9e
BH		 49#ifdef CONFIG_PPC_POWERNV
50#include <asm/opal.h>
51#endif
989044ee 52#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
366d4b9b 53#include <linux/kvm_host.h>
0604675f 54#endif
989044ee
AG		 55#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
56#include <asm/kvm_book3s.h>
db93f574 57#endif
14cf11af 58
57e2a99f 59#ifdef CONFIG_PPC32
fca622c5
KG		 60#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
61#include "head_booke.h"
62#endif
57e2a99f 63#endif
fca622c5 64
55fd766b 65#if defined(CONFIG_PPC_FSL_BOOK3E)
19f5465e
TP		 66#include "../mm/mmu_decl.h"
67#endif
68
14cf11af
PM		 69int main(void)
70{
d1dead5c
SR		 71 DEFINE(THREAD, offsetof(struct task_struct, thread));
72 DEFINE(MM, offsetof(struct task_struct, mm));
5e696617 73 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
14cf11af 74#ifdef CONFIG_PPC64
d1dead5c 75 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
9c1e1052
PM		 76 DEFINE(SIGSEGV, SIGSEGV);
77 DEFINE(NMI_MASK, NMI_MASK);
efcac658 78 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
71433285 79 DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
92779245 80 DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
d1dead5c 81#else
f7e4217b 82 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
cbc9565e
BH		 83 DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
84 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
d1dead5c
SR		 85#endif /* CONFIG_PPC64 */
86
14cf11af 87 DEFINE(KSP, offsetof(struct thread_struct, ksp));
14cf11af 88 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
1325a684
AK		 89#ifdef CONFIG_BOOKE
90 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
91#endif
14cf11af 92 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
de79f7b9 93 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fp_state));
18461960 94 DEFINE(THREAD_FPSAVEAREA, offsetof(struct thread_struct, fp_save_area));
de79f7b9 95 DEFINE(FPSTATE_FPSCR, offsetof(struct thread_fp_state, fpscr));
14cf11af 96#ifdef CONFIG_ALTIVEC
de79f7b9 97 DEFINE(THREAD_VRSTATE, offsetof(struct thread_struct, vr_state));
18461960 98 DEFINE(THREAD_VRSAVEAREA, offsetof(struct thread_struct, vr_save_area));
14cf11af 99 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
14cf11af 100 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
de79f7b9 101 DEFINE(VRSTATE_VSCR, offsetof(struct thread_vr_state, vscr));
14cf11af 102#endif /* CONFIG_ALTIVEC */
c6e6771b 103#ifdef CONFIG_VSX
c6e6771b
MN		 104 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
105#endif /* CONFIG_VSX */
d1dead5c
SR		 106#ifdef CONFIG_PPC64
107 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
108#else /* CONFIG_PPC64 */
109 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
14cf11af
PM		 110#ifdef CONFIG_SPE
111 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
112 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
113 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
114 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
115#endif /* CONFIG_SPE */
d1dead5c 116#endif /* CONFIG_PPC64 */
13d543cd 117#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
51ae8d4a 118 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, debug.dbcr0));
13d543cd 119#endif
97e49255
AG		 120#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
121 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
122#endif
ffe129ec 123#if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
d30f6e48
SW		 124 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
125#endif
d1dead5c 126
2468dcf6
IM		 127#ifdef CONFIG_PPC_BOOK3S_64
128 DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar));
9353374b
ME		 129 DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr));
130 DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr));
131 DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr));
59affcd3
ME		 132 DEFINE(THREAD_SIAR, offsetof(struct thread_struct, siar));
133 DEFINE(THREAD_SDAR, offsetof(struct thread_struct, sdar));
134 DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier));
135 DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0));
136 DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2));
2468dcf6 137#endif
8b3c34cf 138#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
afc07701 139 DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
8b3c34cf
MN		 140 DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
141 DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
142 DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
28e61cc4
MN		 143 DEFINE(THREAD_TM_TAR, offsetof(struct thread_struct, tm_tar));
144 DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr));
145 DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr));
8b3c34cf 146 DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
de79f7b9
PM		 147 DEFINE(THREAD_TRANSACT_VRSTATE, offsetof(struct thread_struct,
148 transact_vr));
8b3c34cf
MN		 149 DEFINE(THREAD_TRANSACT_VRSAVE, offsetof(struct thread_struct,
150 transact_vrsave));
de79f7b9
PM		 151 DEFINE(THREAD_TRANSACT_FPSTATE, offsetof(struct thread_struct,
152 transact_fp));
8b3c34cf
MN		 153 /* Local pt_regs on stack for Transactional Memory funcs. */
154 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
155 sizeof(struct pt_regs) + 16);
156#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
2468dcf6 157
d1dead5c 158 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
f39224a8 159 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
d1dead5c 160 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
d1dead5c 161 DEFINE(TI_TASK, offsetof(struct thread_info, task));
d1dead5c 162 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
d1dead5c
SR		 163
164#ifdef CONFIG_PPC64
165 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
166 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
167 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
168 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
169 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
170 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
d1dead5c
SR		 171 /* paca */
172 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
9e368f29 173 DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token));
d1dead5c
SR		 174 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
175 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
176 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
177 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
178 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
d1dead5c
SR		 179 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
180 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
181 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
1f6a93e4
PM		 182 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
183 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
d04c56f7 184 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
7230c564 185 DEFINE(PACAIRQHAPPENED, offsetof(struct paca_struct, irq_happened));
d1dead5c 186 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
d0f13e3c
BH		 187#ifdef CONFIG_PPC_MM_SLICES
188 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
189 context.low_slices_psize));
190 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
191 context.high_slices_psize));
192 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
91c60b5b 193#endif /* CONFIG_PPC_MM_SLICES */
dce6670a
BH		 194
195#ifdef CONFIG_PPC_BOOK3E
196 DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
197 DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
198 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
199 DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
200 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
201 DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
202 DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
203 DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
204 DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
205 DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
206#endif /* CONFIG_PPC_BOOK3E */
207
91c60b5b
BH		 208#ifdef CONFIG_PPC_STD_MMU_64
209 DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
210 DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
211 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
212 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
213 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
214#ifdef CONFIG_PPC_MM_SLICES
d0f13e3c
BH		 215 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
216#else
217 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
d0f13e3c 218#endif /* CONFIG_PPC_MM_SLICES */
d1dead5c
SR		 219 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
220 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
221 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
3356bb9f 222 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
2f6093c8 223 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
11a27ad7
MN		 224 DEFINE(SLBSHADOW_STACKVSID,
225 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
226 DEFINE(SLBSHADOW_STACKESID,
227 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
cf9efce0 228 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
de56a948 229 DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));
cf9efce0 230 DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
a8606e20 231 DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));
cf9efce0 232 DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
91c60b5b
BH		 233#endif /* CONFIG_PPC_STD_MMU_64 */
234 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
235 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
1fc711f7 236 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
cf9efce0
PM		 237 DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));
238 DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));
91c60b5b
BH		 239 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
240 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
91c60b5b 241 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
2fde6d20 242 DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
0127262c 243 DEFINE(PACA_SPRG3, offsetof(struct paca_struct, sprg3));
033ef338 244#endif /* CONFIG_PPC64 */
d1dead5c
SR		 245
246 /* RTAS */
247 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
248 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
d1dead5c 249
14cf11af 250 /* Interrupt register frame */
91120cc8 251 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
14cf11af 252 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
218d169c 253#ifdef CONFIG_PPC64
d1dead5c
SR		 254 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
255 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
256 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
57852a85
MK		 257
258 /* hcall statistics */
259 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
260 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
261 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
262 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
d1dead5c 263#endif /* CONFIG_PPC64 */
14cf11af
PM		 264 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
265 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
266 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
267 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
268 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
269 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
270 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
271 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
272 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
273 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
274 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
275 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
276 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
277 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
d1dead5c 278#ifndef CONFIG_PPC64
14cf11af
PM		 279 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
280 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
281 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
282 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
283 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
284 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
285 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
286 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
287 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
288 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
289 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
290 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
291 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
292 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
293 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
294 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
295 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
296 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
d1dead5c 297#endif /* CONFIG_PPC64 */
14cf11af
PM		 298 /*
299 * Note: these symbols include _ because they overlap with special
300 * register names
301 */
302 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
303 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
304 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
305 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
306 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
14cf11af
PM		 307 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
308 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
309 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c
SR		 310 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
311 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
d73e0c99 312 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
d1dead5c
SR		 313#ifndef CONFIG_PPC64
314 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
315 /*
316 * The PowerPC 400-class & Book-E processors have neither the DAR
317 * nor the DSISR SPRs. Hence, we overload them to hold the similar
318 * DEAR and ESR SPRs for such processors. For critical interrupts
319 * we use them to hold SRR0 and SRR1.
14cf11af
PM		 320 */
321 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
322 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
d1dead5c 323#else /* CONFIG_PPC64 */
d1dead5c
SR		 324 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
325
326 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
327 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
328 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
329#endif /* CONFIG_PPC64 */
330
57e2a99f 331#if defined(CONFIG_PPC32)
fca622c5
KG		 332#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
333 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
334 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
335 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
336 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
337 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
338 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
339 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
340 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
341 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
342 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
343 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
344 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
345 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
346 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
347 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
348 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
349#endif
57e2a99f 350#endif
14cf11af
PM		 351 DEFINE(CLONE_VM, CLONE_VM);
352 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
d1dead5c
SR		 353
354#ifndef CONFIG_PPC64
14cf11af 355 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
d1dead5c 356#endif /* ! CONFIG_PPC64 */
14cf11af
PM		 357
358 /* About the CPU features table */
14cf11af
PM		 359 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
360 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
f39b7a55 361 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
14cf11af 362
d1dead5c
SR		 363 DEFINE(pbe_address, offsetof(struct pbe, address));
364 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
365 DEFINE(pbe_next, offsetof(struct pbe, next));
14cf11af 366
543b9fd3 367#ifndef CONFIG_PPC64
fd582ec8 368 DEFINE(TASK_SIZE, TASK_SIZE);
d1dead5c 369 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
a7f290da 370#endif /* ! CONFIG_PPC64 */
14cf11af 371
a7f290da
BH		 372 /* datapage offsets for use by vdso */
373 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
374 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
375 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
376 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
377 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
378 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
379 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
380 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
381 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
382 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
597bc5c0 383 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
8fd63a9e 384 DEFINE(STAMP_SEC_FRAC, offsetof(struct vdso_data, stamp_sec_fraction));
fbe48175
OJ		 385 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
386 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
387 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
388 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
a7f290da
BH		 389#ifdef CONFIG_PPC64
390 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
14cf11af
PM		 391 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
392 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
393 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
394 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
0c37ec2a
BH		 395 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
396 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 397 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
398 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
399#else
400 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
401 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
0c37ec2a
BH		 402 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
403 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
a7f290da
BH		 404#endif
405 /* timeval/timezone offsets for use by vdso */
14cf11af
PM		 406 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
407 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
a7f290da
BH		 408
409 /* Other bits used by the vdso */
410 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
411 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
412 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
151db1fc 413 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
a7f290da 414
007d88d0
DW		 415#ifdef CONFIG_BUG
416 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
417#endif
16a15a30 418
ee7a76da 419 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
4ee7084e 420 DEFINE(PTE_SIZE, sizeof(pte_t));
bee86f14 421
bbf45ba5 422#ifdef CONFIG_KVM
bbf45ba5
HB		 423 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
424 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
d30f6e48 425 DEFINE(VCPU_GUEST_PID, offsetof(struct kvm_vcpu, arch.pid));
bbf45ba5 426 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
eab17672 427 DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
efff1912 428 DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fp.fpr));
de56a948 429#ifdef CONFIG_ALTIVEC
efff1912 430 DEFINE(VCPU_VRS, offsetof(struct kvm_vcpu, arch.vr.vr));
de56a948
PM		 431#endif
432 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
433 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
434 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
435 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
436 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
9975f5e3 437#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
de56a948
PM		 438 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.shregs.msr));
439 DEFINE(VCPU_SRR0, offsetof(struct kvm_vcpu, arch.shregs.srr0));
440 DEFINE(VCPU_SRR1, offsetof(struct kvm_vcpu, arch.shregs.srr1));
441 DEFINE(VCPU_SPRG0, offsetof(struct kvm_vcpu, arch.shregs.sprg0));
442 DEFINE(VCPU_SPRG1, offsetof(struct kvm_vcpu, arch.shregs.sprg1));
443 DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));
444 DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));
445#endif
c8ae0ace 446 DEFINE(VCPU_SHARED_SPRG3, offsetof(struct kvm_vcpu_arch_shared, sprg3));
b5904972
SW		 447 DEFINE(VCPU_SHARED_SPRG4, offsetof(struct kvm_vcpu_arch_shared, sprg4));
448 DEFINE(VCPU_SHARED_SPRG5, offsetof(struct kvm_vcpu_arch_shared, sprg5));
449 DEFINE(VCPU_SHARED_SPRG6, offsetof(struct kvm_vcpu_arch_shared, sprg6));
450 DEFINE(VCPU_SHARED_SPRG7, offsetof(struct kvm_vcpu_arch_shared, sprg7));
49dd2c49 451 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
dd9ebf1f 452 DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));
96bc451a 453 DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
666e7252 454 DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
ecee273f 455 DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
bbf45ba5 456
b5904972
SW		 457 DEFINE(VCPU_SHARED_MAS0, offsetof(struct kvm_vcpu_arch_shared, mas0));
458 DEFINE(VCPU_SHARED_MAS1, offsetof(struct kvm_vcpu_arch_shared, mas1));
459 DEFINE(VCPU_SHARED_MAS2, offsetof(struct kvm_vcpu_arch_shared, mas2));
460 DEFINE(VCPU_SHARED_MAS7_3, offsetof(struct kvm_vcpu_arch_shared, mas7_3));
461 DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));
462 DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));
463
d30f6e48
SW		 464 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
465 DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));
466
00c3a37c 467 /* book3s */
9975f5e3 468#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
de56a948
PM		 469 DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));
470 DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));
471 DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));
472 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
473 DEFINE(KVM_TLBIE_LOCK, offsetof(struct kvm, arch.tlbie_lock));
1b400ba0 474 DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits));
aa04b4cc
PM		 475 DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr));
476 DEFINE(KVM_RMOR, offsetof(struct kvm, arch.rmor));
697d3899 477 DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));
de56a948
PM		 478 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
479 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
7657f408 480 DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
c35635ef 481 DEFINE(VCPU_VPA_DIRTY, offsetof(struct kvm_vcpu, arch.vpa.dirty));
de56a948 482#endif
00c3a37c 483#ifdef CONFIG_PPC_BOOK3S
de56a948 484 DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
de56a948
PM		 485 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
486 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
487 DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
488 DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
489 DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
490 DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
491 DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
62908905 492 DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
de56a948
PM		 493 DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
494 DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
aa04b4cc 495 DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));
19ccb76a
PM		 496 DEFINE(VCPU_CEDED, offsetof(struct kvm_vcpu, arch.ceded));
497 DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
de56a948
PM		 498 DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
499 DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
14941789
PM		 500 DEFINE(VCPU_SIAR, offsetof(struct kvm_vcpu, arch.siar));
501 DEFINE(VCPU_SDAR, offsetof(struct kvm_vcpu, arch.sdar));
de56a948
PM		 502 DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
503 DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
504 DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
de56a948
PM		 505 DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
506 DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
507 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
508 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
0acb9111 509 DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
4b8473c9 510 DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
a2d56020 511 DEFINE(VCPU_SHADOW_SRR1, offsetof(struct kvm_vcpu, arch.shadow_srr1));
371fefd6
PM		 512 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
513 DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
514 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
19ccb76a 515 DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads));
e0b7ec05 516 DEFINE(VCORE_KVM, offsetof(struct kvmppc_vcore, kvm));
93b0f4dc 517 DEFINE(VCORE_TB_OFFSET, offsetof(struct kvmppc_vcore, tb_offset));
a0144e2a 518 DEFINE(VCORE_LPCR, offsetof(struct kvmppc_vcore, lpcr));
388cc6e1 519 DEFINE(VCORE_PCR, offsetof(struct kvmppc_vcore, pcr));
de56a948
PM		 520 DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
521 DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
522 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
3c42bf8a
PM		 523
524#ifdef CONFIG_PPC_BOOK3S_64
7aa79938 525#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
a2d56020 526 DEFINE(PACA_SVCPU, offsetof(struct paca_struct, shadow_vcpu));
3c42bf8a 527# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
de56a948
PM		 528#else
529# define SVCPU_FIELD(x, f)
530#endif
3c42bf8a
PM		 531# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
532#else /* 32-bit */
533# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
534# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
535#endif
536
537 SVCPU_FIELD(SVCPU_CR, cr);
538 SVCPU_FIELD(SVCPU_XER, xer);
539 SVCPU_FIELD(SVCPU_CTR, ctr);
540 SVCPU_FIELD(SVCPU_LR, lr);
541 SVCPU_FIELD(SVCPU_PC, pc);
542 SVCPU_FIELD(SVCPU_R0, gpr[0]);
543 SVCPU_FIELD(SVCPU_R1, gpr[1]);
544 SVCPU_FIELD(SVCPU_R2, gpr[2]);
545 SVCPU_FIELD(SVCPU_R3, gpr[3]);
546 SVCPU_FIELD(SVCPU_R4, gpr[4]);
547 SVCPU_FIELD(SVCPU_R5, gpr[5]);
548 SVCPU_FIELD(SVCPU_R6, gpr[6]);
549 SVCPU_FIELD(SVCPU_R7, gpr[7]);
550 SVCPU_FIELD(SVCPU_R8, gpr[8]);
551 SVCPU_FIELD(SVCPU_R9, gpr[9]);
552 SVCPU_FIELD(SVCPU_R10, gpr[10]);
553 SVCPU_FIELD(SVCPU_R11, gpr[11]);
554 SVCPU_FIELD(SVCPU_R12, gpr[12]);
555 SVCPU_FIELD(SVCPU_R13, gpr[13]);
556 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
557 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
558 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
559 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
0604675f 560#ifdef CONFIG_PPC_BOOK3S_32
3c42bf8a 561 SVCPU_FIELD(SVCPU_SR, sr);
0604675f 562#endif
3c42bf8a
PM		 563#ifdef CONFIG_PPC64
564 SVCPU_FIELD(SVCPU_SLB, slb);
565 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
566#endif
567
568 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
569 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
de56a948 570 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
3c42bf8a
PM		 571 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
572 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
573 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
574 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
02143947 575 HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
19ccb76a 576 HSTATE_FIELD(HSTATE_NAPPING, napping);
3c42bf8a 577
9975f5e3 578#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
7657f408
PM		 579 HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
580 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
de56a948 581 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
371fefd6
PM		 582 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
583 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
54695c30
BH		 584 HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
585 HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
e0b7ec05 586 HSTATE_FIELD(HSTATE_PTID, ptid);
de56a948
PM		 587 HSTATE_FIELD(HSTATE_MMCR, host_mmcr);
588 HSTATE_FIELD(HSTATE_PMC, host_pmc);
589 HSTATE_FIELD(HSTATE_PURR, host_purr);
590 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
591 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
592 HSTATE_FIELD(HSTATE_DABR, dabr);
593 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
19ccb76a 594 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
9975f5e3 595#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
de56a948 596
0acb9111
PM		 597#ifdef CONFIG_PPC_BOOK3S_64
598 HSTATE_FIELD(HSTATE_CFAR, cfar);
4b8473c9 599 HSTATE_FIELD(HSTATE_PPR, ppr);
0acb9111
PM		 600#endif /* CONFIG_PPC_BOOK3S_64 */
601
3c42bf8a 602#else /* CONFIG_PPC_BOOK3S */
7e57cba0
AG		 603 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
604 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
0604675f
AG		 605 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
606 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
607 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
608 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
609 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
610 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
15b708be 611 DEFINE(VCPU_CRIT_SAVE, offsetof(struct kvm_vcpu, arch.crit_save));
00c3a37c 612#endif /* CONFIG_PPC_BOOK3S */
3c42bf8a 613#endif /* CONFIG_KVM */
d17051cb
AG		 614
615#ifdef CONFIG_KVM_GUEST
616 DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
617 scratch1));
618 DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
619 scratch2));
620 DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
621 scratch3));
622 DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
623 int_pending));
624 DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
625 DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
626 critical));
cbe487fa 627 DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
d17051cb
AG		 628#endif
629
ca9153a3
IY		 630#ifdef CONFIG_44x
631 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
632 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
633#endif
55fd766b 634#ifdef CONFIG_PPC_FSL_BOOK3E
78f62237
KG		 635 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
636 DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
637 DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
638 DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
639 DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
640 DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
641#endif
bbf45ba5 642
4cd35f67
SW		 643#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
644 DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
645 DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
646 DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
647 DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
648#endif
649
d30f6e48
SW		 650#ifdef CONFIG_KVM_BOOKE_HV
651 DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
652 DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
653 DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));
654#endif
655
73e75b41
HB		 656#ifdef CONFIG_KVM_EXIT_TIMING
657 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
658 arch.timing_exit.tv32.tbu));
659 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
660 arch.timing_exit.tv32.tbl));
661 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
662 arch.timing_last_enter.tv32.tbu));
663 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
664 arch.timing_last_enter.tv32.tbl));
665#endif
666
ed79ba9e
BH		 667#ifdef CONFIG_PPC_POWERNV
668 DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
669 DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
670 DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
671 DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
672#endif
673
14cf11af
PM		 674 return 0;
675}
Linux kernel - Deliverables
This page took 0.709902 seconds and 5 git commands to generate.