Commit | Line | Data |
---|---|---|
0ebc4cda BH |
1 | /* |
2 | * This file contains the 64-bit "server" PowerPC variant | |
3 | * of the low level exception handling including exception | |
4 | * vectors, exception return, part of the slb and stab | |
5 | * handling and other fixed offset specific things. | |
6 | * | |
7 | * This file is meant to be #included from head_64.S due to | |
25985edc | 8 | * position dependent assembly. |
0ebc4cda BH |
9 | * |
10 | * Most of this originates from head_64.S and thus has the same | |
11 | * copyright history. | |
12 | * | |
13 | */ | |
14 | ||
7230c564 | 15 | #include <asm/hw_irq.h> |
8aa34ab8 | 16 | #include <asm/exception-64s.h> |
46f52210 | 17 | #include <asm/ptrace.h> |
7cba160a | 18 | #include <asm/cpuidle.h> |
8aa34ab8 | 19 | |
0ebc4cda BH |
20 | /* |
21 | * We layout physical memory as follows: | |
22 | * 0x0000 - 0x00ff : Secondary processor spin code | |
c1fb6816 MN |
23 | * 0x0100 - 0x17ff : pSeries Interrupt prologs |
24 | * 0x1800 - 0x4000 : interrupt support common interrupt prologs | |
25 | * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1 | |
26 | * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1 | |
0ebc4cda | 27 | * 0x7000 - 0x7fff : FWNMI data area |
c1fb6816 MN |
28 | * 0x8000 - 0x8fff : Initial (CPU0) segment table |
29 | * 0x9000 - : Early init and support code | |
0ebc4cda | 30 | */ |
742415d6 MN |
31 | /* Syscall routine is used twice, in reloc-off and reloc-on paths */ |
32 | #define SYSCALL_PSERIES_1 \ | |
33 | BEGIN_FTR_SECTION \ | |
34 | cmpdi r0,0x1ebe ; \ | |
35 | beq- 1f ; \ | |
36 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \ | |
37 | mr r9,r13 ; \ | |
38 | GET_PACA(r13) ; \ | |
39 | mfspr r11,SPRN_SRR0 ; \ | |
40 | 0: | |
41 | ||
42 | #define SYSCALL_PSERIES_2_RFID \ | |
43 | mfspr r12,SPRN_SRR1 ; \ | |
44 | ld r10,PACAKBASE(r13) ; \ | |
45 | LOAD_HANDLER(r10, system_call_entry) ; \ | |
46 | mtspr SPRN_SRR0,r10 ; \ | |
47 | ld r10,PACAKMSR(r13) ; \ | |
48 | mtspr SPRN_SRR1,r10 ; \ | |
49 | rfid ; \ | |
50 | b . ; /* prevent speculative execution */ | |
51 | ||
52 | #define SYSCALL_PSERIES_3 \ | |
53 | /* Fast LE/BE switch system call */ \ | |
54 | 1: mfspr r12,SPRN_SRR1 ; \ | |
55 | xori r12,r12,MSR_LE ; \ | |
56 | mtspr SPRN_SRR1,r12 ; \ | |
57 | rfid ; /* return to userspace */ \ | |
742415d6 MN |
58 | b . ; /* prevent speculative execution */ |
59 | ||
4700dfaf MN |
60 | #if defined(CONFIG_RELOCATABLE) |
61 | /* | |
05b05f28 AB |
62 | * We can't branch directly so we do it via the CTR which |
63 | * is volatile across system calls. | |
4700dfaf MN |
64 | */ |
65 | #define SYSCALL_PSERIES_2_DIRECT \ | |
66 | mflr r10 ; \ | |
67 | ld r12,PACAKBASE(r13) ; \ | |
05b05f28 | 68 | LOAD_HANDLER(r12, system_call_entry) ; \ |
6a404806 | 69 | mtctr r12 ; \ |
4700dfaf MN |
70 | mfspr r12,SPRN_SRR1 ; \ |
71 | /* Re-use of r13... No spare regs to do this */ \ | |
72 | li r13,MSR_RI ; \ | |
73 | mtmsrd r13,1 ; \ | |
74 | GET_PACA(r13) ; /* get r13 back */ \ | |
6a404806 | 75 | bctr ; |
4700dfaf MN |
76 | #else |
77 | /* We can branch directly */ | |
78 | #define SYSCALL_PSERIES_2_DIRECT \ | |
79 | mfspr r12,SPRN_SRR1 ; \ | |
80 | li r10,MSR_RI ; \ | |
81 | mtmsrd r10,1 ; /* Set RI (EE=0) */ \ | |
d20be433 | 82 | b system_call_common ; |
4700dfaf | 83 | #endif |
0ebc4cda | 84 | |
0ebc4cda BH |
85 | /* |
86 | * This is the start of the interrupt handlers for pSeries | |
87 | * This code runs with relocation off. | |
88 | * Code from here to __end_interrupts gets copied down to real | |
89 | * address 0x100 when we are running a relocatable kernel. | |
90 | * Therefore any relative branches in this section must only | |
91 | * branch to labels in this section. | |
92 | */ | |
93 | . = 0x100 | |
94 | .globl __start_interrupts | |
95 | __start_interrupts: | |
96 | ||
948cf67c BH |
97 | .globl system_reset_pSeries; |
98 | system_reset_pSeries: | |
948cf67c BH |
99 | SET_SCRATCH0(r13) |
100 | #ifdef CONFIG_PPC_P7_NAP | |
101 | BEGIN_FTR_SECTION | |
102 | /* Running native on arch 2.06 or later, check if we are | |
77b54e9f | 103 | * waking up from nap/sleep/winkle. |
948cf67c BH |
104 | */ |
105 | mfspr r13,SPRN_SRR1 | |
371fefd6 PM |
106 | rlwinm. r13,r13,47-31,30,31 |
107 | beq 9f | |
108 | ||
7cba160a SP |
109 | cmpwi cr3,r13,2 |
110 | ||
77b54e9f SP |
111 | /* |
112 | * Check if last bit of HSPGR0 is set. This indicates whether we are | |
113 | * waking up from winkle. | |
114 | */ | |
371fefd6 | 115 | GET_PACA(r13) |
77b54e9f SP |
116 | clrldi r5,r13,63 |
117 | clrrdi r13,r13,1 | |
118 | cmpwi cr4,r5,1 | |
119 | mtspr SPRN_HSPRG0,r13 | |
120 | ||
7cba160a SP |
121 | lbz r0,PACA_THREAD_IDLE_STATE(r13) |
122 | cmpwi cr2,r0,PNV_THREAD_NAP | |
123 | bgt cr2,8f /* Either sleep or Winkle */ | |
124 | ||
125 | /* Waking up from nap should not cause hypervisor state loss */ | |
126 | bgt cr3,. | |
127 | ||
128 | /* Waking up from nap */ | |
129 | li r0,PNV_THREAD_RUNNING | |
130 | stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ | |
371fefd6 | 131 | |
3a167bea | 132 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
f0888f70 PM |
133 | li r0,KVM_HWTHREAD_IN_KERNEL |
134 | stb r0,HSTATE_HWTHREAD_STATE(r13) | |
135 | /* Order setting hwthread_state vs. testing hwthread_req */ | |
136 | sync | |
137 | lbz r0,HSTATE_HWTHREAD_REQ(r13) | |
138 | cmpwi r0,0 | |
139 | beq 1f | |
371fefd6 PM |
140 | b kvm_start_guest |
141 | 1: | |
142 | #endif | |
143 | ||
56548fc0 PM |
144 | /* Return SRR1 from power7_nap() */ |
145 | mfspr r3,SPRN_SRR1 | |
7cba160a | 146 | beq cr3,2f |
b1576fec AB |
147 | b power7_wakeup_noloss |
148 | 2: b power7_wakeup_loss | |
aca79d2b VS |
149 | |
150 | /* Fast Sleep wakeup on PowerNV */ | |
151 | 8: GET_PACA(r13) | |
b1576fec | 152 | b power7_wakeup_tb_loss |
aca79d2b | 153 | |
371fefd6 | 154 | 9: |
969391c5 | 155 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
948cf67c | 156 | #endif /* CONFIG_PPC_P7_NAP */ |
b01c8b54 PM |
157 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
158 | NOTEST, 0x100) | |
0ebc4cda BH |
159 | |
160 | . = 0x200 | |
b01c8b54 PM |
161 | machine_check_pSeries_1: |
162 | /* This is moved out of line as it can be patched by FW, but | |
163 | * some code path might still want to branch into the original | |
164 | * vector | |
165 | */ | |
1707dd16 | 166 | SET_SCRATCH0(r13) /* save r13 */ |
1c51089f MS |
167 | #ifdef CONFIG_PPC_P7_NAP |
168 | BEGIN_FTR_SECTION | |
169 | /* Running native on arch 2.06 or later, check if we are | |
170 | * waking up from nap. We only handle no state loss and | |
171 | * supervisor state loss. We do -not- handle hypervisor | |
172 | * state loss at this time. | |
173 | */ | |
174 | mfspr r13,SPRN_SRR1 | |
175 | rlwinm. r13,r13,47-31,30,31 | |
d410ae21 | 176 | OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) |
1c51089f MS |
177 | beq 9f |
178 | ||
d410ae21 MS |
179 | mfspr r13,SPRN_SRR1 |
180 | rlwinm. r13,r13,47-31,30,31 | |
1c51089f MS |
181 | /* waking up from powersave (nap) state */ |
182 | cmpwi cr1,r13,2 | |
183 | /* Total loss of HV state is fatal. let's just stay stuck here */ | |
d410ae21 | 184 | OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) |
1c51089f MS |
185 | bgt cr1,. |
186 | 9: | |
d410ae21 | 187 | OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) |
1c51089f MS |
188 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
189 | #endif /* CONFIG_PPC_P7_NAP */ | |
1707dd16 | 190 | EXCEPTION_PROLOG_0(PACA_EXMC) |
1e9b4507 | 191 | BEGIN_FTR_SECTION |
2513767d | 192 | b machine_check_powernv_early |
1e9b4507 | 193 | FTR_SECTION_ELSE |
1707dd16 | 194 | b machine_check_pSeries_0 |
1e9b4507 | 195 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
0ebc4cda BH |
196 | |
197 | . = 0x300 | |
198 | .globl data_access_pSeries | |
199 | data_access_pSeries: | |
673b189a | 200 | SET_SCRATCH0(r13) |
b01c8b54 | 201 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, |
697d3899 | 202 | KVMTEST, 0x300) |
0ebc4cda BH |
203 | |
204 | . = 0x380 | |
205 | .globl data_access_slb_pSeries | |
206 | data_access_slb_pSeries: | |
673b189a | 207 | SET_SCRATCH0(r13) |
1707dd16 | 208 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
697d3899 | 209 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) |
0ebc4cda BH |
210 | std r3,PACA_EXSLB+EX_R3(r13) |
211 | mfspr r3,SPRN_DAR | |
b01c8b54 | 212 | mfspr r12,SPRN_SRR1 |
0ebc4cda | 213 | #ifndef CONFIG_RELOCATABLE |
b1576fec | 214 | b slb_miss_realmode |
0ebc4cda BH |
215 | #else |
216 | /* | |
ad0289e4 | 217 | * We can't just use a direct branch to slb_miss_realmode |
0ebc4cda BH |
218 | * because the distance from here to there depends on where |
219 | * the kernel ends up being put. | |
220 | */ | |
221 | mfctr r11 | |
222 | ld r10,PACAKBASE(r13) | |
ad0289e4 | 223 | LOAD_HANDLER(r10, slb_miss_realmode) |
0ebc4cda BH |
224 | mtctr r10 |
225 | bctr | |
226 | #endif | |
227 | ||
2613265c | 228 | STD_EXCEPTION_PSERIES(0x400, instruction_access) |
0ebc4cda BH |
229 | |
230 | . = 0x480 | |
231 | .globl instruction_access_slb_pSeries | |
232 | instruction_access_slb_pSeries: | |
673b189a | 233 | SET_SCRATCH0(r13) |
1707dd16 | 234 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
31a40e2b | 235 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x480) |
0ebc4cda BH |
236 | std r3,PACA_EXSLB+EX_R3(r13) |
237 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | |
b01c8b54 | 238 | mfspr r12,SPRN_SRR1 |
0ebc4cda | 239 | #ifndef CONFIG_RELOCATABLE |
b1576fec | 240 | b slb_miss_realmode |
0ebc4cda BH |
241 | #else |
242 | mfctr r11 | |
243 | ld r10,PACAKBASE(r13) | |
ad0289e4 | 244 | LOAD_HANDLER(r10, slb_miss_realmode) |
0ebc4cda BH |
245 | mtctr r10 |
246 | bctr | |
247 | #endif | |
248 | ||
b3e6b5df BH |
249 | /* We open code these as we can't have a ". = x" (even with |
250 | * x = "." within a feature section | |
251 | */ | |
a5d4f3ad | 252 | . = 0x500; |
b3e6b5df BH |
253 | .globl hardware_interrupt_pSeries; |
254 | .globl hardware_interrupt_hv; | |
a5d4f3ad | 255 | hardware_interrupt_pSeries: |
b3e6b5df | 256 | hardware_interrupt_hv: |
a5d4f3ad | 257 | BEGIN_FTR_SECTION |
b01c8b54 PM |
258 | _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, |
259 | EXC_HV, SOFTEN_TEST_HV) | |
260 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) | |
de56a948 PM |
261 | FTR_SECTION_ELSE |
262 | _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, | |
31a40e2b | 263 | EXC_STD, SOFTEN_TEST_PR) |
de56a948 | 264 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) |
969391c5 | 265 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
a5d4f3ad | 266 | |
2613265c | 267 | STD_EXCEPTION_PSERIES(0x600, alignment) |
31a40e2b | 268 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x600) |
b01c8b54 | 269 | |
2613265c | 270 | STD_EXCEPTION_PSERIES(0x700, program_check) |
31a40e2b | 271 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x700) |
b01c8b54 | 272 | |
2613265c | 273 | STD_EXCEPTION_PSERIES(0x800, fp_unavailable) |
31a40e2b | 274 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x800) |
a5d4f3ad | 275 | |
a485c709 PM |
276 | . = 0x900 |
277 | .globl decrementer_pSeries | |
278 | decrementer_pSeries: | |
279 | _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR) | |
280 | ||
dabe859e | 281 | STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) |
a5d4f3ad | 282 | |
1dbdafec | 283 | MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super) |
31a40e2b | 284 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xa00) |
b01c8b54 | 285 | |
2613265c | 286 | STD_EXCEPTION_PSERIES(0xb00, trap_0b) |
31a40e2b | 287 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xb00) |
0ebc4cda BH |
288 | |
289 | . = 0xc00 | |
290 | .globl system_call_pSeries | |
291 | system_call_pSeries: | |
8b91a255 SW |
292 | /* |
293 | * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems | |
294 | * that support it) before changing to HMT_MEDIUM. That allows the KVM | |
295 | * code to save that value into the guest state (it is the guest's PPR | |
296 | * value). Otherwise just change to HMT_MEDIUM as userspace has | |
297 | * already saved the PPR. | |
298 | */ | |
b01c8b54 PM |
299 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
300 | SET_SCRATCH0(r13) | |
301 | GET_PACA(r13) | |
302 | std r9,PACA_EXGEN+EX_R9(r13) | |
8b91a255 SW |
303 | OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); |
304 | HMT_MEDIUM; | |
b01c8b54 | 305 | std r10,PACA_EXGEN+EX_R10(r13) |
8b91a255 | 306 | OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR); |
b01c8b54 PM |
307 | mfcr r9 |
308 | KVMTEST(0xc00) | |
309 | GET_SCRATCH0(r13) | |
8b91a255 SW |
310 | #else |
311 | HMT_MEDIUM; | |
b01c8b54 | 312 | #endif |
742415d6 MN |
313 | SYSCALL_PSERIES_1 |
314 | SYSCALL_PSERIES_2_RFID | |
315 | SYSCALL_PSERIES_3 | |
b01c8b54 PM |
316 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) |
317 | ||
2613265c | 318 | STD_EXCEPTION_PSERIES(0xd00, single_step) |
31a40e2b | 319 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xd00) |
b3e6b5df BH |
320 | |
321 | /* At 0xe??? we have a bunch of hypervisor exceptions, we branch | |
322 | * out of line to handle them | |
323 | */ | |
324 | . = 0xe00 | |
d671ddd6 | 325 | hv_data_storage_trampoline: |
1707dd16 PM |
326 | SET_SCRATCH0(r13) |
327 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 328 | b h_data_storage_hv |
1707dd16 | 329 | |
b3e6b5df | 330 | . = 0xe20 |
d671ddd6 | 331 | hv_instr_storage_trampoline: |
1707dd16 PM |
332 | SET_SCRATCH0(r13) |
333 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 334 | b h_instr_storage_hv |
1707dd16 | 335 | |
b3e6b5df | 336 | . = 0xe40 |
d671ddd6 | 337 | emulation_assist_trampoline: |
1707dd16 PM |
338 | SET_SCRATCH0(r13) |
339 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 340 | b emulation_assist_hv |
1707dd16 | 341 | |
b3e6b5df | 342 | . = 0xe60 |
d671ddd6 | 343 | hv_exception_trampoline: |
1707dd16 PM |
344 | SET_SCRATCH0(r13) |
345 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0869b6fd | 346 | b hmi_exception_early |
1707dd16 | 347 | |
655bb3f4 | 348 | . = 0xe80 |
d671ddd6 | 349 | hv_doorbell_trampoline: |
1707dd16 PM |
350 | SET_SCRATCH0(r13) |
351 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
655bb3f4 | 352 | b h_doorbell_hv |
0ebc4cda BH |
353 | |
354 | /* We need to deal with the Altivec unavailable exception | |
355 | * here which is at 0xf20, thus in the middle of the | |
356 | * prolog code of the PerformanceMonitor one. A little | |
357 | * trickery is thus necessary | |
358 | */ | |
359 | . = 0xf00 | |
fa111f1f | 360 | performance_monitor_pseries_trampoline: |
1707dd16 PM |
361 | SET_SCRATCH0(r13) |
362 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
363 | b performance_monitor_pSeries |
364 | ||
365 | . = 0xf20 | |
fa111f1f | 366 | altivec_unavailable_pseries_trampoline: |
1707dd16 PM |
367 | SET_SCRATCH0(r13) |
368 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
369 | b altivec_unavailable_pSeries |
370 | ||
371 | . = 0xf40 | |
fa111f1f | 372 | vsx_unavailable_pseries_trampoline: |
1707dd16 PM |
373 | SET_SCRATCH0(r13) |
374 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
375 | b vsx_unavailable_pSeries |
376 | ||
d0c0c9a1 | 377 | . = 0xf60 |
fa111f1f | 378 | facility_unavailable_trampoline: |
d0c0c9a1 MN |
379 | SET_SCRATCH0(r13) |
380 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
021424a1 | 381 | b facility_unavailable_pSeries |
d0c0c9a1 | 382 | |
b14b6260 | 383 | . = 0xf80 |
fa111f1f | 384 | hv_facility_unavailable_trampoline: |
b14b6260 ME |
385 | SET_SCRATCH0(r13) |
386 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
387 | b facility_unavailable_hv | |
388 | ||
0ebc4cda | 389 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 390 | STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) |
5ccf55dd | 391 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) |
0ebc4cda | 392 | #endif /* CONFIG_CBE_RAS */ |
b01c8b54 | 393 | |
2613265c | 394 | STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint) |
31a40e2b | 395 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1300) |
b01c8b54 | 396 | |
b92a66a6 | 397 | . = 0x1500 |
51cf2b30 | 398 | .global denorm_exception_hv |
b92a66a6 | 399 | denorm_exception_hv: |
b92a66a6 | 400 | mtspr SPRN_SPRG_HSCRATCH0,r13 |
1707dd16 | 401 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
630573c1 | 402 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500) |
b92a66a6 MN |
403 | |
404 | #ifdef CONFIG_PPC_DENORMALISATION | |
405 | mfspr r10,SPRN_HSRR1 | |
406 | mfspr r11,SPRN_HSRR0 /* save HSRR0 */ | |
407 | andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */ | |
408 | addi r11,r11,-4 /* HSRR0 is next instruction */ | |
409 | bne+ denorm_assist | |
410 | #endif | |
411 | ||
630573c1 | 412 | KVMTEST(0x1500) |
b92a66a6 MN |
413 | EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV) |
414 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500) | |
415 | ||
0ebc4cda | 416 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 417 | STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) |
5ccf55dd | 418 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) |
0ebc4cda | 419 | #endif /* CONFIG_CBE_RAS */ |
b01c8b54 | 420 | |
2613265c | 421 | STD_EXCEPTION_PSERIES(0x1700, altivec_assist) |
31a40e2b | 422 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x1700) |
b01c8b54 | 423 | |
0ebc4cda | 424 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 425 | STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) |
5ccf55dd | 426 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) |
faab4dd2 MN |
427 | #else |
428 | . = 0x1800 | |
0ebc4cda BH |
429 | #endif /* CONFIG_CBE_RAS */ |
430 | ||
0ebc4cda | 431 | |
b3e6b5df BH |
432 | /*** Out of line interrupts support ***/ |
433 | ||
faab4dd2 | 434 | .align 7 |
b01c8b54 | 435 | /* moved from 0x200 */ |
2513767d | 436 | machine_check_powernv_early: |
1e9b4507 MS |
437 | BEGIN_FTR_SECTION |
438 | EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200) | |
439 | /* | |
440 | * Register contents: | |
441 | * R13 = PACA | |
442 | * R9 = CR | |
443 | * Original R9 to R13 is saved on PACA_EXMC | |
444 | * | |
e75ad93a MS |
445 | * Switch to mc_emergency stack and handle re-entrancy (we limit |
446 | * the nested MCE upto level 4 to avoid stack overflow). | |
447 | * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1 | |
1e9b4507 MS |
448 | * |
449 | * We use paca->in_mce to check whether this is the first entry or | |
450 | * nested machine check. We increment paca->in_mce to track nested | |
451 | * machine checks. | |
452 | * | |
453 | * If this is the first entry then set stack pointer to | |
454 | * paca->mc_emergency_sp, otherwise r1 is already pointing to | |
455 | * stack frame on mc_emergency stack. | |
456 | * | |
457 | * NOTE: We are here with MSR_ME=0 (off), which means we risk a | |
458 | * checkstop if we get another machine check exception before we do | |
459 | * rfid with MSR_ME=1. | |
460 | */ | |
461 | mr r11,r1 /* Save r1 */ | |
462 | lhz r10,PACA_IN_MCE(r13) | |
463 | cmpwi r10,0 /* Are we in nested machine check */ | |
464 | bne 0f /* Yes, we are. */ | |
465 | /* First machine check entry */ | |
466 | ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ | |
467 | 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ | |
468 | addi r10,r10,1 /* increment paca->in_mce */ | |
469 | sth r10,PACA_IN_MCE(r13) | |
e75ad93a MS |
470 | /* Limit nested MCE to level 4 to avoid stack overflow */ |
471 | cmpwi r10,4 | |
472 | bgt 2f /* Check if we hit limit of 4 */ | |
1e9b4507 MS |
473 | std r11,GPR1(r1) /* Save r1 on the stack. */ |
474 | std r11,0(r1) /* make stack chain pointer */ | |
475 | mfspr r11,SPRN_SRR0 /* Save SRR0 */ | |
476 | std r11,_NIP(r1) | |
477 | mfspr r11,SPRN_SRR1 /* Save SRR1 */ | |
478 | std r11,_MSR(r1) | |
479 | mfspr r11,SPRN_DAR /* Save DAR */ | |
480 | std r11,_DAR(r1) | |
481 | mfspr r11,SPRN_DSISR /* Save DSISR */ | |
482 | std r11,_DSISR(r1) | |
483 | std r9,_CCR(r1) /* Save CR in stackframe */ | |
484 | /* Save r9 through r13 from EXMC save area to stack frame. */ | |
485 | EXCEPTION_PROLOG_COMMON_2(PACA_EXMC) | |
486 | mfmsr r11 /* get MSR value */ | |
487 | ori r11,r11,MSR_ME /* turn on ME bit */ | |
488 | ori r11,r11,MSR_RI /* turn on RI bit */ | |
489 | ld r12,PACAKBASE(r13) /* get high part of &label */ | |
490 | LOAD_HANDLER(r12, machine_check_handle_early) | |
e75ad93a | 491 | 1: mtspr SPRN_SRR0,r12 |
1e9b4507 MS |
492 | mtspr SPRN_SRR1,r11 |
493 | rfid | |
494 | b . /* prevent speculative execution */ | |
e75ad93a MS |
495 | 2: |
496 | /* Stack overflow. Stay on emergency stack and panic. | |
497 | * Keep the ME bit off while panic-ing, so that if we hit | |
498 | * another machine check we checkstop. | |
499 | */ | |
500 | addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */ | |
501 | ld r11,PACAKMSR(r13) | |
502 | ld r12,PACAKBASE(r13) | |
503 | LOAD_HANDLER(r12, unrecover_mce) | |
504 | li r10,MSR_ME | |
505 | andc r11,r11,r10 /* Turn off MSR_ME */ | |
506 | b 1b | |
507 | b . /* prevent speculative execution */ | |
1e9b4507 MS |
508 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) |
509 | ||
b01c8b54 PM |
510 | machine_check_pSeries: |
511 | .globl machine_check_fwnmi | |
512 | machine_check_fwnmi: | |
b01c8b54 | 513 | SET_SCRATCH0(r13) /* save r13 */ |
1707dd16 PM |
514 | EXCEPTION_PROLOG_0(PACA_EXMC) |
515 | machine_check_pSeries_0: | |
516 | EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200) | |
517 | EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD) | |
b01c8b54 | 518 | KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) |
697d3899 PM |
519 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) |
520 | KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) | |
31a40e2b PM |
521 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x400) |
522 | KVM_HANDLER(PACA_EXSLB, EXC_STD, 0x480) | |
523 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x900) | |
b01c8b54 PM |
524 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) |
525 | ||
b92a66a6 MN |
526 | #ifdef CONFIG_PPC_DENORMALISATION |
527 | denorm_assist: | |
528 | BEGIN_FTR_SECTION | |
529 | /* | |
530 | * To denormalise we need to move a copy of the register to itself. | |
531 | * For POWER6 do that here for all FP regs. | |
532 | */ | |
533 | mfmsr r10 | |
534 | ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) | |
535 | xori r10,r10,(MSR_FE0|MSR_FE1) | |
536 | mtmsrd r10 | |
537 | sync | |
d7c67fb1 MN |
538 | |
539 | #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 | |
540 | #define FMR4(n) FMR2(n) ; FMR2(n+2) | |
541 | #define FMR8(n) FMR4(n) ; FMR4(n+4) | |
542 | #define FMR16(n) FMR8(n) ; FMR8(n+8) | |
543 | #define FMR32(n) FMR16(n) ; FMR16(n+16) | |
544 | FMR32(0) | |
545 | ||
b92a66a6 MN |
546 | FTR_SECTION_ELSE |
547 | /* | |
548 | * To denormalise we need to move a copy of the register to itself. | |
549 | * For POWER7 do that here for the first 32 VSX registers only. | |
550 | */ | |
551 | mfmsr r10 | |
552 | oris r10,r10,MSR_VSX@h | |
553 | mtmsrd r10 | |
554 | sync | |
d7c67fb1 MN |
555 | |
556 | #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) | |
557 | #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) | |
558 | #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) | |
559 | #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) | |
560 | #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) | |
561 | XVCPSGNDP32(0) | |
562 | ||
b92a66a6 | 563 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) |
fb0fce3e MN |
564 | |
565 | BEGIN_FTR_SECTION | |
566 | b denorm_done | |
567 | END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) | |
568 | /* | |
569 | * To denormalise we need to move a copy of the register to itself. | |
570 | * For POWER8 we need to do that for all 64 VSX registers | |
571 | */ | |
572 | XVCPSGNDP32(32) | |
573 | denorm_done: | |
b92a66a6 MN |
574 | mtspr SPRN_HSRR0,r11 |
575 | mtcrf 0x80,r9 | |
576 | ld r9,PACA_EXGEN+EX_R9(r13) | |
44e9309f | 577 | RESTORE_PPR_PACA(PACA_EXGEN, r10) |
630573c1 PM |
578 | BEGIN_FTR_SECTION |
579 | ld r10,PACA_EXGEN+EX_CFAR(r13) | |
580 | mtspr SPRN_CFAR,r10 | |
581 | END_FTR_SECTION_IFSET(CPU_FTR_CFAR) | |
b92a66a6 MN |
582 | ld r10,PACA_EXGEN+EX_R10(r13) |
583 | ld r11,PACA_EXGEN+EX_R11(r13) | |
584 | ld r12,PACA_EXGEN+EX_R12(r13) | |
585 | ld r13,PACA_EXGEN+EX_R13(r13) | |
586 | HRFID | |
587 | b . | |
588 | #endif | |
589 | ||
b01c8b54 | 590 | .align 7 |
b3e6b5df | 591 | /* moved from 0xe00 */ |
1707dd16 | 592 | STD_EXCEPTION_HV_OOL(0xe02, h_data_storage) |
b01c8b54 | 593 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) |
1707dd16 | 594 | STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage) |
b01c8b54 | 595 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) |
1707dd16 | 596 | STD_EXCEPTION_HV_OOL(0xe42, emulation_assist) |
b01c8b54 | 597 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) |
0869b6fd | 598 | MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception) |
b01c8b54 | 599 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) |
0869b6fd | 600 | |
1707dd16 | 601 | MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) |
655bb3f4 | 602 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) |
0ebc4cda BH |
603 | |
604 | /* moved from 0xf00 */ | |
1707dd16 | 605 | STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
31a40e2b | 606 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) |
1707dd16 | 607 | STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) |
31a40e2b | 608 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf20) |
1707dd16 | 609 | STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) |
31a40e2b | 610 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf40) |
021424a1 | 611 | STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) |
31a40e2b | 612 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf60) |
b14b6260 ME |
613 | STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable) |
614 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82) | |
0ebc4cda BH |
615 | |
616 | /* | |
fe9e1d54 IM |
617 | * An interrupt came in while soft-disabled. We set paca->irq_happened, then: |
618 | * - If it was a decrementer interrupt, we bump the dec to max and and return. | |
619 | * - If it was a doorbell we return immediately since doorbells are edge | |
620 | * triggered and won't automatically refire. | |
0869b6fd MS |
621 | * - If it was a HMI we return immediately since we handled it in realmode |
622 | * and it won't refire. | |
fe9e1d54 IM |
623 | * - else we hard disable and return. |
624 | * This is called with r10 containing the value to OR to the paca field. | |
0ebc4cda | 625 | */ |
7230c564 BH |
626 | #define MASKED_INTERRUPT(_H) \ |
627 | masked_##_H##interrupt: \ | |
628 | std r11,PACA_EXGEN+EX_R11(r13); \ | |
629 | lbz r11,PACAIRQHAPPENED(r13); \ | |
630 | or r11,r11,r10; \ | |
631 | stb r11,PACAIRQHAPPENED(r13); \ | |
fe9e1d54 IM |
632 | cmpwi r10,PACA_IRQ_DEC; \ |
633 | bne 1f; \ | |
7230c564 BH |
634 | lis r10,0x7fff; \ |
635 | ori r10,r10,0xffff; \ | |
636 | mtspr SPRN_DEC,r10; \ | |
637 | b 2f; \ | |
fe9e1d54 | 638 | 1: cmpwi r10,PACA_IRQ_DBELL; \ |
0869b6fd MS |
639 | beq 2f; \ |
640 | cmpwi r10,PACA_IRQ_HMI; \ | |
fe9e1d54 IM |
641 | beq 2f; \ |
642 | mfspr r10,SPRN_##_H##SRR1; \ | |
7230c564 BH |
643 | rldicl r10,r10,48,1; /* clear MSR_EE */ \ |
644 | rotldi r10,r10,16; \ | |
645 | mtspr SPRN_##_H##SRR1,r10; \ | |
646 | 2: mtcrf 0x80,r9; \ | |
647 | ld r9,PACA_EXGEN+EX_R9(r13); \ | |
648 | ld r10,PACA_EXGEN+EX_R10(r13); \ | |
649 | ld r11,PACA_EXGEN+EX_R11(r13); \ | |
650 | GET_SCRATCH0(r13); \ | |
651 | ##_H##rfid; \ | |
0ebc4cda | 652 | b . |
7230c564 BH |
653 | |
654 | MASKED_INTERRUPT() | |
655 | MASKED_INTERRUPT(H) | |
0ebc4cda | 656 | |
7230c564 BH |
657 | /* |
658 | * Called from arch_local_irq_enable when an interrupt needs | |
fe9e1d54 IM |
659 | * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate |
660 | * which kind of interrupt. MSR:EE is already off. We generate a | |
7230c564 BH |
661 | * stackframe like if a real interrupt had happened. |
662 | * | |
663 | * Note: While MSR:EE is off, we need to make sure that _MSR | |
664 | * in the generated frame has EE set to 1 or the exception | |
665 | * handler will not properly re-enable them. | |
666 | */ | |
667 | _GLOBAL(__replay_interrupt) | |
668 | /* We are going to jump to the exception common code which | |
669 | * will retrieve various register values from the PACA which | |
670 | * we don't give a damn about, so we don't bother storing them. | |
671 | */ | |
672 | mfmsr r12 | |
673 | mflr r11 | |
674 | mfcr r9 | |
675 | ori r12,r12,MSR_EE | |
fe9e1d54 IM |
676 | cmpwi r3,0x900 |
677 | beq decrementer_common | |
678 | cmpwi r3,0x500 | |
679 | beq hardware_interrupt_common | |
680 | BEGIN_FTR_SECTION | |
681 | cmpwi r3,0xe80 | |
682 | beq h_doorbell_common | |
683 | FTR_SECTION_ELSE | |
684 | cmpwi r3,0xa00 | |
685 | beq doorbell_super_common | |
686 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) | |
687 | blr | |
a5d4f3ad | 688 | |
0ebc4cda BH |
689 | #ifdef CONFIG_PPC_PSERIES |
690 | /* | |
691 | * Vectors for the FWNMI option. Share common code. | |
692 | */ | |
693 | .globl system_reset_fwnmi | |
694 | .align 7 | |
695 | system_reset_fwnmi: | |
673b189a | 696 | SET_SCRATCH0(r13) /* save r13 */ |
b01c8b54 PM |
697 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
698 | NOTEST, 0x100) | |
0ebc4cda BH |
699 | |
700 | #endif /* CONFIG_PPC_PSERIES */ | |
701 | ||
4f6c11db PM |
702 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
703 | kvmppc_skip_interrupt: | |
704 | /* | |
705 | * Here all GPRs are unchanged from when the interrupt happened | |
706 | * except for r13, which is saved in SPRG_SCRATCH0. | |
707 | */ | |
708 | mfspr r13, SPRN_SRR0 | |
709 | addi r13, r13, 4 | |
710 | mtspr SPRN_SRR0, r13 | |
711 | GET_SCRATCH0(r13) | |
712 | rfid | |
713 | b . | |
714 | ||
715 | kvmppc_skip_Hinterrupt: | |
716 | /* | |
717 | * Here all GPRs are unchanged from when the interrupt happened | |
718 | * except for r13, which is saved in SPRG_SCRATCH0. | |
719 | */ | |
720 | mfspr r13, SPRN_HSRR0 | |
721 | addi r13, r13, 4 | |
722 | mtspr SPRN_HSRR0, r13 | |
723 | GET_SCRATCH0(r13) | |
724 | hrfid | |
725 | b . | |
726 | #endif | |
727 | ||
0ebc4cda | 728 | /* |
057b6d7e HB |
729 | * Ensure that any handlers that get invoked from the exception prologs |
730 | * above are below the first 64KB (0x10000) of the kernel image because | |
731 | * the prologs assemble the addresses of these handlers using the | |
732 | * LOAD_HANDLER macro, which uses an ori instruction. | |
0ebc4cda BH |
733 | */ |
734 | ||
735 | /*** Common interrupt handlers ***/ | |
736 | ||
35425501 | 737 | STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception) |
0ebc4cda | 738 | |
7450f6f0 | 739 | STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) |
35425501 AB |
740 | STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt) |
741 | STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt) | |
1dbdafec | 742 | #ifdef CONFIG_PPC_DOORBELL |
35425501 | 743 | STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception) |
1dbdafec | 744 | #else |
35425501 | 745 | STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception) |
1dbdafec | 746 | #endif |
35425501 AB |
747 | STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception) |
748 | STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception) | |
749 | STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception) | |
750 | STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt) | |
0869b6fd | 751 | STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception) |
655bb3f4 | 752 | #ifdef CONFIG_PPC_DOORBELL |
35425501 | 753 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception) |
655bb3f4 | 754 | #else |
35425501 | 755 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) |
655bb3f4 | 756 | #endif |
35425501 AB |
757 | STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) |
758 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) | |
759 | STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) | |
0ebc4cda | 760 | #ifdef CONFIG_ALTIVEC |
35425501 | 761 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception) |
0ebc4cda | 762 | #else |
35425501 | 763 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) |
0ebc4cda BH |
764 | #endif |
765 | #ifdef CONFIG_CBE_RAS | |
35425501 AB |
766 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) |
767 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) | |
768 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) | |
0ebc4cda BH |
769 | #endif /* CONFIG_CBE_RAS */ |
770 | ||
c1fb6816 MN |
771 | /* |
772 | * Relocation-on interrupts: A subset of the interrupts can be delivered | |
773 | * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering | |
774 | * it. Addresses are the same as the original interrupt addresses, but | |
775 | * offset by 0xc000000000004000. | |
776 | * It's impossible to receive interrupts below 0x300 via this mechanism. | |
777 | * KVM: None of these traps are from the guest ; anything that escalated | |
778 | * to HV=1 from HV=0 is delivered via real mode handlers. | |
779 | */ | |
780 | ||
781 | /* | |
782 | * This uses the standard macro, since the original 0x300 vector | |
783 | * only has extra guff for STAB-based processors -- which never | |
784 | * come here. | |
785 | */ | |
786 | STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access) | |
787 | . = 0x4380 | |
788 | .globl data_access_slb_relon_pSeries | |
789 | data_access_slb_relon_pSeries: | |
c1fb6816 | 790 | SET_SCRATCH0(r13) |
1707dd16 | 791 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
c1fb6816 MN |
792 | EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) |
793 | std r3,PACA_EXSLB+EX_R3(r13) | |
794 | mfspr r3,SPRN_DAR | |
795 | mfspr r12,SPRN_SRR1 | |
796 | #ifndef CONFIG_RELOCATABLE | |
b1576fec | 797 | b slb_miss_realmode |
c1fb6816 MN |
798 | #else |
799 | /* | |
ad0289e4 | 800 | * We can't just use a direct branch to slb_miss_realmode |
c1fb6816 MN |
801 | * because the distance from here to there depends on where |
802 | * the kernel ends up being put. | |
803 | */ | |
804 | mfctr r11 | |
805 | ld r10,PACAKBASE(r13) | |
ad0289e4 | 806 | LOAD_HANDLER(r10, slb_miss_realmode) |
c1fb6816 MN |
807 | mtctr r10 |
808 | bctr | |
809 | #endif | |
810 | ||
811 | STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access) | |
812 | . = 0x4480 | |
813 | .globl instruction_access_slb_relon_pSeries | |
814 | instruction_access_slb_relon_pSeries: | |
c1fb6816 | 815 | SET_SCRATCH0(r13) |
1707dd16 | 816 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
c1fb6816 MN |
817 | EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) |
818 | std r3,PACA_EXSLB+EX_R3(r13) | |
819 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | |
820 | mfspr r12,SPRN_SRR1 | |
821 | #ifndef CONFIG_RELOCATABLE | |
b1576fec | 822 | b slb_miss_realmode |
c1fb6816 MN |
823 | #else |
824 | mfctr r11 | |
825 | ld r10,PACAKBASE(r13) | |
ad0289e4 | 826 | LOAD_HANDLER(r10, slb_miss_realmode) |
c1fb6816 MN |
827 | mtctr r10 |
828 | bctr | |
829 | #endif | |
830 | ||
831 | . = 0x4500 | |
832 | .globl hardware_interrupt_relon_pSeries; | |
833 | .globl hardware_interrupt_relon_hv; | |
834 | hardware_interrupt_relon_pSeries: | |
835 | hardware_interrupt_relon_hv: | |
836 | BEGIN_FTR_SECTION | |
837 | _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV) | |
838 | FTR_SECTION_ELSE | |
839 | _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR) | |
3e96ca7f | 840 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
c1fb6816 MN |
841 | STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment) |
842 | STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check) | |
843 | STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) | |
844 | MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) | |
845 | STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) | |
1dbdafec | 846 | MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super) |
c1fb6816 MN |
847 | STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) |
848 | ||
849 | . = 0x4c00 | |
850 | .globl system_call_relon_pSeries | |
851 | system_call_relon_pSeries: | |
852 | HMT_MEDIUM | |
853 | SYSCALL_PSERIES_1 | |
854 | SYSCALL_PSERIES_2_DIRECT | |
855 | SYSCALL_PSERIES_3 | |
856 | ||
857 | STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) | |
858 | ||
859 | . = 0x4e00 | |
1d567cb4 | 860 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 MN |
861 | |
862 | . = 0x4e20 | |
1d567cb4 | 863 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 MN |
864 | |
865 | . = 0x4e40 | |
d671ddd6 | 866 | emulation_assist_relon_trampoline: |
1707dd16 PM |
867 | SET_SCRATCH0(r13) |
868 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
869 | b emulation_assist_relon_hv |
870 | ||
c1fb6816 | 871 | . = 0x4e60 |
1d567cb4 | 872 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 | 873 | |
655bb3f4 | 874 | . = 0x4e80 |
d671ddd6 | 875 | h_doorbell_relon_trampoline: |
1707dd16 PM |
876 | SET_SCRATCH0(r13) |
877 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
655bb3f4 | 878 | b h_doorbell_relon_hv |
c1fb6816 | 879 | |
c1fb6816 | 880 | . = 0x4f00 |
fa111f1f | 881 | performance_monitor_relon_pseries_trampoline: |
1707dd16 PM |
882 | SET_SCRATCH0(r13) |
883 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
884 | b performance_monitor_relon_pSeries |
885 | ||
c1fb6816 | 886 | . = 0x4f20 |
fa111f1f | 887 | altivec_unavailable_relon_pseries_trampoline: |
1707dd16 PM |
888 | SET_SCRATCH0(r13) |
889 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
890 | b altivec_unavailable_relon_pSeries |
891 | ||
c1fb6816 | 892 | . = 0x4f40 |
fa111f1f | 893 | vsx_unavailable_relon_pseries_trampoline: |
1707dd16 PM |
894 | SET_SCRATCH0(r13) |
895 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
896 | b vsx_unavailable_relon_pSeries |
897 | ||
d0c0c9a1 | 898 | . = 0x4f60 |
fa111f1f | 899 | facility_unavailable_relon_trampoline: |
d0c0c9a1 MN |
900 | SET_SCRATCH0(r13) |
901 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
021424a1 | 902 | b facility_unavailable_relon_pSeries |
d0c0c9a1 | 903 | |
b14b6260 | 904 | . = 0x4f80 |
fa111f1f | 905 | hv_facility_unavailable_relon_trampoline: |
b14b6260 ME |
906 | SET_SCRATCH0(r13) |
907 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
88f09412 | 908 | b hv_facility_unavailable_relon_hv |
b14b6260 | 909 | |
c1fb6816 MN |
910 | STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) |
911 | #ifdef CONFIG_PPC_DENORMALISATION | |
912 | . = 0x5500 | |
913 | b denorm_exception_hv | |
914 | #endif | |
c1fb6816 | 915 | STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) |
c1fb6816 | 916 | |
0ebc4cda BH |
917 | .align 7 |
918 | system_call_entry: | |
919 | b system_call_common | |
920 | ||
fe1952fc | 921 | ppc64_runlatch_on_trampoline: |
b1576fec | 922 | b __ppc64_runlatch_on |
fe1952fc | 923 | |
0ebc4cda BH |
924 | /* |
925 | * Here r13 points to the paca, r9 contains the saved CR, | |
926 | * SRR0 and SRR1 are saved in r11 and r12, | |
927 | * r9 - r13 are saved in paca->exgen. | |
928 | */ | |
929 | .align 7 | |
930 | .globl data_access_common | |
931 | data_access_common: | |
932 | mfspr r10,SPRN_DAR | |
933 | std r10,PACA_EXGEN+EX_DAR(r13) | |
934 | mfspr r10,SPRN_DSISR | |
935 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
936 | EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) | |
9daf112b | 937 | RECONCILE_IRQ_STATE(r10, r11) |
a546498f | 938 | ld r12,_MSR(r1) |
0ebc4cda BH |
939 | ld r3,PACA_EXGEN+EX_DAR(r13) |
940 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | |
941 | li r5,0x300 | |
caca285e AK |
942 | std r3,_DAR(r1) |
943 | std r4,_DSISR(r1) | |
944 | BEGIN_MMU_FTR_SECTION | |
b1576fec | 945 | b do_hash_page /* Try to handle as hpte fault */ |
caca285e AK |
946 | MMU_FTR_SECTION_ELSE |
947 | b handle_page_fault | |
948 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_RADIX) | |
0ebc4cda | 949 | |
b3e6b5df | 950 | .align 7 |
278a6cdc | 951 | .globl h_data_storage_common |
b3e6b5df | 952 | h_data_storage_common: |
278a6cdc MN |
953 | mfspr r10,SPRN_HDAR |
954 | std r10,PACA_EXGEN+EX_DAR(r13) | |
955 | mfspr r10,SPRN_HDSISR | |
956 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
957 | EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) | |
b1576fec | 958 | bl save_nvgprs |
9daf112b | 959 | RECONCILE_IRQ_STATE(r10, r11) |
278a6cdc | 960 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
961 | bl unknown_exception |
962 | b ret_from_except | |
b3e6b5df | 963 | |
0ebc4cda BH |
964 | .align 7 |
965 | .globl instruction_access_common | |
966 | instruction_access_common: | |
967 | EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) | |
9daf112b | 968 | RECONCILE_IRQ_STATE(r10, r11) |
a546498f | 969 | ld r12,_MSR(r1) |
0ebc4cda BH |
970 | ld r3,_NIP(r1) |
971 | andis. r4,r12,0x5820 | |
972 | li r5,0x400 | |
caca285e AK |
973 | std r3,_DAR(r1) |
974 | std r4,_DSISR(r1) | |
975 | BEGIN_MMU_FTR_SECTION | |
b1576fec | 976 | b do_hash_page /* Try to handle as hpte fault */ |
caca285e AK |
977 | MMU_FTR_SECTION_ELSE |
978 | b handle_page_fault | |
979 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_RADIX) | |
0ebc4cda | 980 | |
35425501 | 981 | STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception) |
b3e6b5df | 982 | |
4e243b79 MS |
983 | /* |
984 | * Machine check is different because we use a different | |
985 | * save area: PACA_EXMC instead of PACA_EXGEN. | |
986 | */ | |
987 | .align 7 | |
988 | .globl machine_check_common | |
989 | machine_check_common: | |
990 | ||
991 | mfspr r10,SPRN_DAR | |
992 | std r10,PACA_EXGEN+EX_DAR(r13) | |
993 | mfspr r10,SPRN_DSISR | |
994 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
995 | EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) | |
996 | FINISH_NAP | |
9daf112b | 997 | RECONCILE_IRQ_STATE(r10, r11) |
4e243b79 MS |
998 | ld r3,PACA_EXGEN+EX_DAR(r13) |
999 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | |
1000 | std r3,_DAR(r1) | |
1001 | std r4,_DSISR(r1) | |
b1576fec | 1002 | bl save_nvgprs |
4e243b79 | 1003 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1004 | bl machine_check_exception |
1005 | b ret_from_except | |
4e243b79 | 1006 | |
0ebc4cda BH |
1007 | .align 7 |
1008 | .globl alignment_common | |
1009 | alignment_common: | |
1010 | mfspr r10,SPRN_DAR | |
1011 | std r10,PACA_EXGEN+EX_DAR(r13) | |
1012 | mfspr r10,SPRN_DSISR | |
1013 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
1014 | EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) | |
1015 | ld r3,PACA_EXGEN+EX_DAR(r13) | |
1016 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | |
1017 | std r3,_DAR(r1) | |
1018 | std r4,_DSISR(r1) | |
b1576fec | 1019 | bl save_nvgprs |
9daf112b | 1020 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1021 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1022 | bl alignment_exception |
1023 | b ret_from_except | |
0ebc4cda BH |
1024 | |
1025 | .align 7 | |
1026 | .globl program_check_common | |
1027 | program_check_common: | |
1028 | EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) | |
b1576fec | 1029 | bl save_nvgprs |
9daf112b | 1030 | RECONCILE_IRQ_STATE(r10, r11) |
922b9f86 | 1031 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1032 | bl program_check_exception |
1033 | b ret_from_except | |
0ebc4cda BH |
1034 | |
1035 | .align 7 | |
1036 | .globl fp_unavailable_common | |
1037 | fp_unavailable_common: | |
1038 | EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) | |
1039 | bne 1f /* if from user, just load it up */ | |
b1576fec | 1040 | bl save_nvgprs |
9daf112b | 1041 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1042 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1043 | bl kernel_fp_unavailable_exception |
0ebc4cda | 1044 | BUG_OPCODE |
bc2a9408 MN |
1045 | 1: |
1046 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
1047 | BEGIN_FTR_SECTION | |
1048 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1049 | * transaction), go do TM stuff | |
1050 | */ | |
1051 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1052 | bne- 2f | |
1053 | END_FTR_SECTION_IFSET(CPU_FTR_TM) | |
1054 | #endif | |
b1576fec | 1055 | bl load_up_fpu |
0ebc4cda | 1056 | b fast_exception_return |
bc2a9408 MN |
1057 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1058 | 2: /* User process was in a transaction */ | |
b1576fec | 1059 | bl save_nvgprs |
9daf112b | 1060 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1061 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1062 | bl fp_unavailable_tm |
1063 | b ret_from_except | |
bc2a9408 | 1064 | #endif |
0ebc4cda BH |
1065 | .align 7 |
1066 | .globl altivec_unavailable_common | |
1067 | altivec_unavailable_common: | |
1068 | EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) | |
1069 | #ifdef CONFIG_ALTIVEC | |
1070 | BEGIN_FTR_SECTION | |
1071 | beq 1f | |
bc2a9408 MN |
1072 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1073 | BEGIN_FTR_SECTION_NESTED(69) | |
1074 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1075 | * transaction), go do TM stuff | |
1076 | */ | |
1077 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1078 | bne- 2f | |
1079 | END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) | |
1080 | #endif | |
b1576fec | 1081 | bl load_up_altivec |
0ebc4cda | 1082 | b fast_exception_return |
bc2a9408 MN |
1083 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1084 | 2: /* User process was in a transaction */ | |
b1576fec | 1085 | bl save_nvgprs |
9daf112b | 1086 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1087 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1088 | bl altivec_unavailable_tm |
1089 | b ret_from_except | |
bc2a9408 | 1090 | #endif |
0ebc4cda BH |
1091 | 1: |
1092 | END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |
1093 | #endif | |
b1576fec | 1094 | bl save_nvgprs |
9daf112b | 1095 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1096 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1097 | bl altivec_unavailable_exception |
1098 | b ret_from_except | |
0ebc4cda BH |
1099 | |
1100 | .align 7 | |
1101 | .globl vsx_unavailable_common | |
1102 | vsx_unavailable_common: | |
1103 | EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) | |
1104 | #ifdef CONFIG_VSX | |
1105 | BEGIN_FTR_SECTION | |
7230c564 | 1106 | beq 1f |
bc2a9408 MN |
1107 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1108 | BEGIN_FTR_SECTION_NESTED(69) | |
1109 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1110 | * transaction), go do TM stuff | |
1111 | */ | |
1112 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1113 | bne- 2f | |
1114 | END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) | |
1115 | #endif | |
b1576fec | 1116 | b load_up_vsx |
bc2a9408 MN |
1117 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1118 | 2: /* User process was in a transaction */ | |
b1576fec | 1119 | bl save_nvgprs |
9daf112b | 1120 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1121 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1122 | bl vsx_unavailable_tm |
1123 | b ret_from_except | |
bc2a9408 | 1124 | #endif |
0ebc4cda BH |
1125 | 1: |
1126 | END_FTR_SECTION_IFSET(CPU_FTR_VSX) | |
1127 | #endif | |
b1576fec | 1128 | bl save_nvgprs |
9daf112b | 1129 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1130 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1131 | bl vsx_unavailable_exception |
1132 | b ret_from_except | |
0ebc4cda | 1133 | |
35425501 AB |
1134 | STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) |
1135 | STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) | |
d0c0c9a1 | 1136 | |
61383407 | 1137 | /* Equivalents to the above handlers for relocation-on interrupt vectors */ |
1707dd16 | 1138 | STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) |
1707dd16 | 1139 | MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) |
61383407 | 1140 | |
1707dd16 PM |
1141 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
1142 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) | |
1143 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) | |
021424a1 | 1144 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) |
88f09412 | 1145 | STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) |
61383407 | 1146 | |
8ed8ab40 HB |
1147 | /* |
1148 | * The __end_interrupts marker must be past the out-of-line (OOL) | |
1149 | * handlers, so that they are copied to real address 0x100 when running | |
1150 | * a relocatable kernel. This ensures they can be reached from the short | |
1151 | * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch | |
1152 | * directly, without using LOAD_HANDLER(). | |
1153 | */ | |
1154 | .align 7 | |
1155 | .globl __end_interrupts | |
1156 | __end_interrupts: | |
1157 | ||
61383407 BH |
1158 | #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) |
1159 | /* | |
1160 | * Data area reserved for FWNMI option. | |
1161 | * This address (0x7000) is fixed by the RPA. | |
1162 | */ | |
1163 | .= 0x7000 | |
1164 | .globl fwnmi_data_area | |
1165 | fwnmi_data_area: | |
1166 | ||
1167 | /* pseries and powernv need to keep the whole page from | |
1168 | * 0x7000 to 0x8000 free for use by the firmware | |
1169 | */ | |
1170 | . = 0x8000 | |
1171 | #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ | |
1172 | ||
11d54904 GR |
1173 | .globl hmi_exception_early |
1174 | hmi_exception_early: | |
1175 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60) | |
1176 | mr r10,r1 /* Save r1 */ | |
1177 | ld r1,PACAEMERGSP(r13) /* Use emergency stack */ | |
1178 | subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ | |
1179 | std r9,_CCR(r1) /* save CR in stackframe */ | |
1180 | mfspr r11,SPRN_HSRR0 /* Save HSRR0 */ | |
1181 | std r11,_NIP(r1) /* save HSRR0 in stackframe */ | |
1182 | mfspr r12,SPRN_HSRR1 /* Save SRR1 */ | |
1183 | std r12,_MSR(r1) /* save SRR1 in stackframe */ | |
1184 | std r10,0(r1) /* make stack chain pointer */ | |
1185 | std r0,GPR0(r1) /* save r0 in stackframe */ | |
1186 | std r10,GPR1(r1) /* save r1 in stackframe */ | |
1187 | EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN) | |
1188 | EXCEPTION_PROLOG_COMMON_3(0xe60) | |
1189 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1190 | bl hmi_exception_realmode | |
1191 | /* Windup the stack. */ | |
11d54904 GR |
1192 | /* Move original HSRR0 and HSRR1 into the respective regs */ |
1193 | ld r9,_MSR(r1) | |
1194 | mtspr SPRN_HSRR1,r9 | |
1195 | ld r3,_NIP(r1) | |
1196 | mtspr SPRN_HSRR0,r3 | |
1197 | ld r9,_CTR(r1) | |
1198 | mtctr r9 | |
1199 | ld r9,_XER(r1) | |
1200 | mtxer r9 | |
1201 | ld r9,_LINK(r1) | |
1202 | mtlr r9 | |
1203 | REST_GPR(0, r1) | |
1204 | REST_8GPRS(2, r1) | |
1205 | REST_GPR(10, r1) | |
1206 | ld r11,_CCR(r1) | |
1207 | mtcr r11 | |
1208 | REST_GPR(11, r1) | |
1209 | REST_2GPRS(12, r1) | |
1210 | /* restore original r1. */ | |
1211 | ld r1,GPR1(r1) | |
1212 | ||
1213 | /* | |
1214 | * Go to virtual mode and pull the HMI event information from | |
1215 | * firmware. | |
1216 | */ | |
1217 | .globl hmi_exception_after_realmode | |
1218 | hmi_exception_after_realmode: | |
1219 | SET_SCRATCH0(r13) | |
1220 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
1221 | b hmi_exception_hv | |
1222 | ||
61383407 | 1223 | |
4e243b79 MS |
1224 | #define MACHINE_CHECK_HANDLER_WINDUP \ |
1225 | /* Clear MSR_RI before setting SRR0 and SRR1. */\ | |
1226 | li r0,MSR_RI; \ | |
1227 | mfmsr r9; /* get MSR value */ \ | |
1228 | andc r9,r9,r0; \ | |
1229 | mtmsrd r9,1; /* Clear MSR_RI */ \ | |
1230 | /* Move original SRR0 and SRR1 into the respective regs */ \ | |
1231 | ld r9,_MSR(r1); \ | |
1232 | mtspr SPRN_SRR1,r9; \ | |
1233 | ld r3,_NIP(r1); \ | |
1234 | mtspr SPRN_SRR0,r3; \ | |
1235 | ld r9,_CTR(r1); \ | |
1236 | mtctr r9; \ | |
1237 | ld r9,_XER(r1); \ | |
1238 | mtxer r9; \ | |
1239 | ld r9,_LINK(r1); \ | |
1240 | mtlr r9; \ | |
1241 | REST_GPR(0, r1); \ | |
1242 | REST_8GPRS(2, r1); \ | |
1243 | REST_GPR(10, r1); \ | |
1244 | ld r11,_CCR(r1); \ | |
1245 | mtcr r11; \ | |
1246 | /* Decrement paca->in_mce. */ \ | |
1247 | lhz r12,PACA_IN_MCE(r13); \ | |
1248 | subi r12,r12,1; \ | |
1249 | sth r12,PACA_IN_MCE(r13); \ | |
1250 | REST_GPR(11, r1); \ | |
1251 | REST_2GPRS(12, r1); \ | |
1252 | /* restore original r1. */ \ | |
1253 | ld r1,GPR1(r1) | |
1254 | ||
1255 | /* | |
1256 | * Handle machine check early in real mode. We come here with | |
1257 | * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. | |
1258 | */ | |
1259 | .align 7 | |
1260 | .globl machine_check_handle_early | |
1261 | machine_check_handle_early: | |
1262 | std r0,GPR0(r1) /* Save r0 */ | |
1263 | EXCEPTION_PROLOG_COMMON_3(0x200) | |
b1576fec | 1264 | bl save_nvgprs |
4e243b79 | 1265 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1266 | bl machine_check_early |
2749a2f2 | 1267 | std r3,RESULT(r1) /* Save result */ |
4e243b79 MS |
1268 | ld r12,_MSR(r1) |
1269 | #ifdef CONFIG_PPC_P7_NAP | |
1270 | /* | |
1271 | * Check if thread was in power saving mode. We come here when any | |
1272 | * of the following is true: | |
1273 | * a. thread wasn't in power saving mode | |
1274 | * b. thread was in power saving mode with no state loss or | |
1275 | * supervisor state loss | |
1276 | * | |
1277 | * Go back to nap again if (b) is true. | |
1278 | */ | |
1279 | rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */ | |
1280 | beq 4f /* No, it wasn;t */ | |
1281 | /* Thread was in power saving mode. Go back to nap again. */ | |
1282 | cmpwi r11,2 | |
1283 | bne 3f | |
1284 | /* Supervisor state loss */ | |
1285 | li r0,1 | |
1286 | stb r0,PACA_NAPSTATELOST(r13) | |
b1576fec | 1287 | 3: bl machine_check_queue_event |
4e243b79 MS |
1288 | MACHINE_CHECK_HANDLER_WINDUP |
1289 | GET_PACA(r13) | |
1290 | ld r1,PACAR1(r13) | |
7cba160a | 1291 | li r3,PNV_THREAD_NAP |
b1576fec | 1292 | b power7_enter_nap_mode |
4e243b79 MS |
1293 | 4: |
1294 | #endif | |
1295 | /* | |
1296 | * Check if we are coming from hypervisor userspace. If yes then we | |
1297 | * continue in host kernel in V mode to deliver the MC event. | |
1298 | */ | |
1299 | rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */ | |
1300 | beq 5f | |
1301 | andi. r11,r12,MSR_PR /* See if coming from user. */ | |
1302 | bne 9f /* continue in V mode if we are. */ | |
1303 | ||
1304 | 5: | |
44d5f6f5 | 1305 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
4e243b79 MS |
1306 | /* |
1307 | * We are coming from kernel context. Check if we are coming from | |
1308 | * guest. if yes, then we can continue. We will fall through | |
1309 | * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest. | |
1310 | */ | |
1311 | lbz r11,HSTATE_IN_GUEST(r13) | |
1312 | cmpwi r11,0 /* Check if coming from guest */ | |
1313 | bne 9f /* continue if we are. */ | |
1314 | #endif | |
1315 | /* | |
1316 | * At this point we are not sure about what context we come from. | |
1317 | * Queue up the MCE event and return from the interrupt. | |
1318 | * But before that, check if this is an un-recoverable exception. | |
1319 | * If yes, then stay on emergency stack and panic. | |
1320 | */ | |
1321 | andi. r11,r12,MSR_RI | |
1322 | bne 2f | |
2749a2f2 MS |
1323 | 1: mfspr r11,SPRN_SRR0 |
1324 | ld r10,PACAKBASE(r13) | |
1325 | LOAD_HANDLER(r10,unrecover_mce) | |
1326 | mtspr SPRN_SRR0,r10 | |
1327 | ld r10,PACAKMSR(r13) | |
1328 | /* | |
1329 | * We are going down. But there are chances that we might get hit by | |
1330 | * another MCE during panic path and we may run into unstable state | |
1331 | * with no way out. Hence, turn ME bit off while going down, so that | |
1332 | * when another MCE is hit during panic path, system will checkstop | |
1333 | * and hypervisor will get restarted cleanly by SP. | |
1334 | */ | |
1335 | li r3,MSR_ME | |
1336 | andc r10,r10,r3 /* Turn off MSR_ME */ | |
1337 | mtspr SPRN_SRR1,r10 | |
1338 | rfid | |
1339 | b . | |
4e243b79 | 1340 | 2: |
2749a2f2 MS |
1341 | /* |
1342 | * Check if we have successfully handled/recovered from error, if not | |
1343 | * then stay on emergency stack and panic. | |
1344 | */ | |
1345 | ld r3,RESULT(r1) /* Load result */ | |
1346 | cmpdi r3,0 /* see if we handled MCE successfully */ | |
1347 | ||
1348 | beq 1b /* if !handled then panic */ | |
4e243b79 MS |
1349 | /* |
1350 | * Return from MC interrupt. | |
1351 | * Queue up the MCE event so that we can log it later, while | |
1352 | * returning from kernel or opal call. | |
1353 | */ | |
b1576fec | 1354 | bl machine_check_queue_event |
4e243b79 MS |
1355 | MACHINE_CHECK_HANDLER_WINDUP |
1356 | rfid | |
1357 | 9: | |
1358 | /* Deliver the machine check to host kernel in V mode. */ | |
1359 | MACHINE_CHECK_HANDLER_WINDUP | |
1360 | b machine_check_pSeries | |
1361 | ||
2749a2f2 MS |
1362 | unrecover_mce: |
1363 | /* Invoke machine_check_exception to print MCE event and panic. */ | |
1364 | addi r3,r1,STACK_FRAME_OVERHEAD | |
ad718622 | 1365 | bl machine_check_exception |
2749a2f2 MS |
1366 | /* |
1367 | * We will not reach here. Even if we did, there is no way out. Call | |
1368 | * unrecoverable_exception and die. | |
1369 | */ | |
1370 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | |
ad718622 | 1371 | bl unrecoverable_exception |
2749a2f2 | 1372 | b 1b |
087aa036 CG |
1373 | /* |
1374 | * r13 points to the PACA, r9 contains the saved CR, | |
1375 | * r12 contain the saved SRR1, SRR0 is still ready for return | |
1376 | * r3 has the faulting address | |
1377 | * r9 - r13 are saved in paca->exslb. | |
1378 | * r3 is saved in paca->slb_r3 | |
1379 | * We assume we aren't going to take any exceptions during this procedure. | |
1380 | */ | |
ad0289e4 | 1381 | slb_miss_realmode: |
087aa036 CG |
1382 | mflr r10 |
1383 | #ifdef CONFIG_RELOCATABLE | |
1384 | mtctr r11 | |
1385 | #endif | |
1386 | ||
1387 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ | |
1388 | std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ | |
1389 | ||
caca285e AK |
1390 | #ifdef CONFIG_PPC_STD_MMU_64 |
1391 | BEGIN_MMU_FTR_SECTION | |
b1576fec | 1392 | bl slb_allocate_realmode |
caca285e AK |
1393 | END_MMU_FTR_SECTION_IFCLR(MMU_FTR_RADIX) |
1394 | #endif | |
087aa036 CG |
1395 | /* All done -- return from exception. */ |
1396 | ||
1397 | ld r10,PACA_EXSLB+EX_LR(r13) | |
1398 | ld r3,PACA_EXSLB+EX_R3(r13) | |
1399 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ | |
1400 | ||
1401 | mtlr r10 | |
caca285e AK |
1402 | BEGIN_MMU_FTR_SECTION |
1403 | b 2f | |
1404 | END_MMU_FTR_SECTION_IFSET(MMU_FTR_RADIX) | |
087aa036 CG |
1405 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ |
1406 | beq- 2f | |
1407 | ||
1408 | .machine push | |
1409 | .machine "power4" | |
1410 | mtcrf 0x80,r9 | |
1411 | mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ | |
1412 | .machine pop | |
1413 | ||
1414 | RESTORE_PPR_PACA(PACA_EXSLB, r9) | |
1415 | ld r9,PACA_EXSLB+EX_R9(r13) | |
1416 | ld r10,PACA_EXSLB+EX_R10(r13) | |
1417 | ld r11,PACA_EXSLB+EX_R11(r13) | |
1418 | ld r12,PACA_EXSLB+EX_R12(r13) | |
1419 | ld r13,PACA_EXSLB+EX_R13(r13) | |
1420 | rfid | |
1421 | b . /* prevent speculative execution */ | |
1422 | ||
1423 | 2: mfspr r11,SPRN_SRR0 | |
1424 | ld r10,PACAKBASE(r13) | |
1425 | LOAD_HANDLER(r10,unrecov_slb) | |
1426 | mtspr SPRN_SRR0,r10 | |
1427 | ld r10,PACAKMSR(r13) | |
1428 | mtspr SPRN_SRR1,r10 | |
1429 | rfid | |
1430 | b . | |
1431 | ||
1432 | unrecov_slb: | |
1433 | EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) | |
9daf112b | 1434 | RECONCILE_IRQ_STATE(r10, r11) |
b1576fec | 1435 | bl save_nvgprs |
087aa036 | 1436 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1437 | bl unrecoverable_exception |
087aa036 CG |
1438 | b 1b |
1439 | ||
1440 | ||
1441 | #ifdef CONFIG_PPC_970_NAP | |
1442 | power4_fixup_nap: | |
1443 | andc r9,r9,r10 | |
1444 | std r9,TI_LOCAL_FLAGS(r11) | |
1445 | ld r10,_LINK(r1) /* make idle task do the */ | |
1446 | std r10,_NIP(r1) /* equivalent of a blr */ | |
1447 | blr | |
1448 | #endif | |
1449 | ||
0ebc4cda BH |
1450 | /* |
1451 | * Hash table stuff | |
1452 | */ | |
1453 | .align 7 | |
6a3bab90 | 1454 | do_hash_page: |
caca285e | 1455 | #ifdef CONFIG_PPC_STD_MMU_64 |
9c7cc234 | 1456 | andis. r0,r4,0xa410 /* weird error? */ |
0ebc4cda | 1457 | bne- handle_page_fault /* if not, try to insert a HPTE */ |
9c7cc234 P |
1458 | andis. r0,r4,DSISR_DABRMATCH@h |
1459 | bne- handle_dabr_fault | |
9778b696 | 1460 | CURRENT_THREAD_INFO(r11, r1) |
9c1e1052 PM |
1461 | lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ |
1462 | andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ | |
1463 | bne 77f /* then don't call hash_page now */ | |
0ebc4cda BH |
1464 | |
1465 | /* | |
1466 | * r3 contains the faulting address | |
106713a1 | 1467 | * r4 msr |
0ebc4cda | 1468 | * r5 contains the trap number |
aefa5688 | 1469 | * r6 contains dsisr |
0ebc4cda | 1470 | * |
7230c564 | 1471 | * at return r3 = 0 for success, 1 for page fault, negative for error |
0ebc4cda | 1472 | */ |
106713a1 | 1473 | mr r4,r12 |
aefa5688 | 1474 | ld r6,_DSISR(r1) |
106713a1 AK |
1475 | bl __hash_page /* build HPTE if possible */ |
1476 | cmpdi r3,0 /* see if __hash_page succeeded */ | |
0ebc4cda | 1477 | |
7230c564 | 1478 | /* Success */ |
0ebc4cda | 1479 | beq fast_exc_return_irq /* Return from exception on success */ |
0ebc4cda | 1480 | |
7230c564 BH |
1481 | /* Error */ |
1482 | blt- 13f | |
caca285e | 1483 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
9c7cc234 | 1484 | |
0ebc4cda BH |
1485 | /* Here we have a page fault that hash_page can't handle. */ |
1486 | handle_page_fault: | |
0ebc4cda BH |
1487 | 11: ld r4,_DAR(r1) |
1488 | ld r5,_DSISR(r1) | |
1489 | addi r3,r1,STACK_FRAME_OVERHEAD | |
b1576fec | 1490 | bl do_page_fault |
0ebc4cda | 1491 | cmpdi r3,0 |
a546498f | 1492 | beq+ 12f |
b1576fec | 1493 | bl save_nvgprs |
0ebc4cda BH |
1494 | mr r5,r3 |
1495 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1496 | lwz r4,_DAR(r1) | |
b1576fec AB |
1497 | bl bad_page_fault |
1498 | b ret_from_except | |
0ebc4cda | 1499 | |
a546498f BH |
1500 | /* We have a data breakpoint exception - handle it */ |
1501 | handle_dabr_fault: | |
b1576fec | 1502 | bl save_nvgprs |
a546498f BH |
1503 | ld r4,_DAR(r1) |
1504 | ld r5,_DSISR(r1) | |
1505 | addi r3,r1,STACK_FRAME_OVERHEAD | |
b1576fec AB |
1506 | bl do_break |
1507 | 12: b ret_from_except_lite | |
a546498f | 1508 | |
0ebc4cda | 1509 | |
caca285e | 1510 | #ifdef CONFIG_PPC_STD_MMU_64 |
0ebc4cda BH |
1511 | /* We have a page fault that hash_page could handle but HV refused |
1512 | * the PTE insertion | |
1513 | */ | |
b1576fec | 1514 | 13: bl save_nvgprs |
0ebc4cda BH |
1515 | mr r5,r3 |
1516 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1517 | ld r4,_DAR(r1) | |
b1576fec AB |
1518 | bl low_hash_fault |
1519 | b ret_from_except | |
caca285e | 1520 | #endif |
0ebc4cda | 1521 | |
9c1e1052 PM |
1522 | /* |
1523 | * We come here as a result of a DSI at a point where we don't want | |
1524 | * to call hash_page, such as when we are accessing memory (possibly | |
1525 | * user memory) inside a PMU interrupt that occurred while interrupts | |
1526 | * were soft-disabled. We want to invoke the exception handler for | |
1527 | * the access, or panic if there isn't a handler. | |
1528 | */ | |
b1576fec | 1529 | 77: bl save_nvgprs |
9c1e1052 PM |
1530 | mr r4,r3 |
1531 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1532 | li r5,SIGSEGV | |
b1576fec AB |
1533 | bl bad_page_fault |
1534 | b ret_from_except | |
4e2bf01b ME |
1535 | |
1536 | /* | |
1537 | * Here we have detected that the kernel stack pointer is bad. | |
1538 | * R9 contains the saved CR, r13 points to the paca, | |
1539 | * r10 contains the (bad) kernel stack pointer, | |
1540 | * r11 and r12 contain the saved SRR0 and SRR1. | |
1541 | * We switch to using an emergency stack, save the registers there, | |
1542 | * and call kernel_bad_stack(), which panics. | |
1543 | */ | |
1544 | bad_stack: | |
1545 | ld r1,PACAEMERGSP(r13) | |
1546 | subi r1,r1,64+INT_FRAME_SIZE | |
1547 | std r9,_CCR(r1) | |
1548 | std r10,GPR1(r1) | |
1549 | std r11,_NIP(r1) | |
1550 | std r12,_MSR(r1) | |
1551 | mfspr r11,SPRN_DAR | |
1552 | mfspr r12,SPRN_DSISR | |
1553 | std r11,_DAR(r1) | |
1554 | std r12,_DSISR(r1) | |
1555 | mflr r10 | |
1556 | mfctr r11 | |
1557 | mfxer r12 | |
1558 | std r10,_LINK(r1) | |
1559 | std r11,_CTR(r1) | |
1560 | std r12,_XER(r1) | |
1561 | SAVE_GPR(0,r1) | |
1562 | SAVE_GPR(2,r1) | |
1563 | ld r10,EX_R3(r3) | |
1564 | std r10,GPR3(r1) | |
1565 | SAVE_GPR(4,r1) | |
1566 | SAVE_4GPRS(5,r1) | |
1567 | ld r9,EX_R9(r3) | |
1568 | ld r10,EX_R10(r3) | |
1569 | SAVE_2GPRS(9,r1) | |
1570 | ld r9,EX_R11(r3) | |
1571 | ld r10,EX_R12(r3) | |
1572 | ld r11,EX_R13(r3) | |
1573 | std r9,GPR11(r1) | |
1574 | std r10,GPR12(r1) | |
1575 | std r11,GPR13(r1) | |
1576 | BEGIN_FTR_SECTION | |
1577 | ld r10,EX_CFAR(r3) | |
1578 | std r10,ORIG_GPR3(r1) | |
1579 | END_FTR_SECTION_IFSET(CPU_FTR_CFAR) | |
1580 | SAVE_8GPRS(14,r1) | |
1581 | SAVE_10GPRS(22,r1) | |
1582 | lhz r12,PACA_TRAP_SAVE(r13) | |
1583 | std r12,_TRAP(r1) | |
1584 | addi r11,r1,INT_FRAME_SIZE | |
1585 | std r11,0(r1) | |
1586 | li r12,0 | |
1587 | std r12,0(r11) | |
1588 | ld r2,PACATOC(r13) | |
1589 | ld r11,exception_marker@toc(r2) | |
1590 | std r12,RESULT(r1) | |
1591 | std r11,STACK_FRAME_OVERHEAD-16(r1) | |
1592 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | |
1593 | bl kernel_bad_stack | |
1594 | b 1b |