Commit | Line | Data |
---|---|---|
0ebc4cda BH |
1 | /* |
2 | * This file contains the 64-bit "server" PowerPC variant | |
3 | * of the low level exception handling including exception | |
4 | * vectors, exception return, part of the slb and stab | |
5 | * handling and other fixed offset specific things. | |
6 | * | |
7 | * This file is meant to be #included from head_64.S due to | |
25985edc | 8 | * position dependent assembly. |
0ebc4cda BH |
9 | * |
10 | * Most of this originates from head_64.S and thus has the same | |
11 | * copyright history. | |
12 | * | |
13 | */ | |
14 | ||
7230c564 | 15 | #include <asm/hw_irq.h> |
8aa34ab8 | 16 | #include <asm/exception-64s.h> |
46f52210 | 17 | #include <asm/ptrace.h> |
7cba160a | 18 | #include <asm/cpuidle.h> |
8aa34ab8 | 19 | |
0ebc4cda BH |
20 | /* |
21 | * We layout physical memory as follows: | |
22 | * 0x0000 - 0x00ff : Secondary processor spin code | |
c1fb6816 MN |
23 | * 0x0100 - 0x17ff : pSeries Interrupt prologs |
24 | * 0x1800 - 0x4000 : interrupt support common interrupt prologs | |
25 | * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1 | |
26 | * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1 | |
0ebc4cda | 27 | * 0x7000 - 0x7fff : FWNMI data area |
c1fb6816 MN |
28 | * 0x8000 - 0x8fff : Initial (CPU0) segment table |
29 | * 0x9000 - : Early init and support code | |
0ebc4cda | 30 | */ |
742415d6 MN |
31 | /* Syscall routine is used twice, in reloc-off and reloc-on paths */ |
32 | #define SYSCALL_PSERIES_1 \ | |
33 | BEGIN_FTR_SECTION \ | |
34 | cmpdi r0,0x1ebe ; \ | |
35 | beq- 1f ; \ | |
36 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \ | |
37 | mr r9,r13 ; \ | |
38 | GET_PACA(r13) ; \ | |
39 | mfspr r11,SPRN_SRR0 ; \ | |
40 | 0: | |
41 | ||
42 | #define SYSCALL_PSERIES_2_RFID \ | |
43 | mfspr r12,SPRN_SRR1 ; \ | |
44 | ld r10,PACAKBASE(r13) ; \ | |
45 | LOAD_HANDLER(r10, system_call_entry) ; \ | |
46 | mtspr SPRN_SRR0,r10 ; \ | |
47 | ld r10,PACAKMSR(r13) ; \ | |
48 | mtspr SPRN_SRR1,r10 ; \ | |
49 | rfid ; \ | |
50 | b . ; /* prevent speculative execution */ | |
51 | ||
52 | #define SYSCALL_PSERIES_3 \ | |
53 | /* Fast LE/BE switch system call */ \ | |
54 | 1: mfspr r12,SPRN_SRR1 ; \ | |
55 | xori r12,r12,MSR_LE ; \ | |
56 | mtspr SPRN_SRR1,r12 ; \ | |
57 | rfid ; /* return to userspace */ \ | |
742415d6 MN |
58 | b . ; /* prevent speculative execution */ |
59 | ||
4700dfaf MN |
60 | #if defined(CONFIG_RELOCATABLE) |
61 | /* | |
62 | * We can't branch directly; in the direct case we use LR | |
63 | * and system_call_entry restores LR. (We thus need to move | |
64 | * LR to r10 in the RFID case too.) | |
65 | */ | |
66 | #define SYSCALL_PSERIES_2_DIRECT \ | |
67 | mflr r10 ; \ | |
68 | ld r12,PACAKBASE(r13) ; \ | |
69 | LOAD_HANDLER(r12, system_call_entry_direct) ; \ | |
6a404806 | 70 | mtctr r12 ; \ |
4700dfaf MN |
71 | mfspr r12,SPRN_SRR1 ; \ |
72 | /* Re-use of r13... No spare regs to do this */ \ | |
73 | li r13,MSR_RI ; \ | |
74 | mtmsrd r13,1 ; \ | |
75 | GET_PACA(r13) ; /* get r13 back */ \ | |
6a404806 | 76 | bctr ; |
4700dfaf MN |
77 | #else |
78 | /* We can branch directly */ | |
79 | #define SYSCALL_PSERIES_2_DIRECT \ | |
80 | mfspr r12,SPRN_SRR1 ; \ | |
81 | li r10,MSR_RI ; \ | |
82 | mtmsrd r10,1 ; /* Set RI (EE=0) */ \ | |
83 | b system_call_entry_direct ; | |
84 | #endif | |
0ebc4cda | 85 | |
0ebc4cda BH |
86 | /* |
87 | * This is the start of the interrupt handlers for pSeries | |
88 | * This code runs with relocation off. | |
89 | * Code from here to __end_interrupts gets copied down to real | |
90 | * address 0x100 when we are running a relocatable kernel. | |
91 | * Therefore any relative branches in this section must only | |
92 | * branch to labels in this section. | |
93 | */ | |
94 | . = 0x100 | |
95 | .globl __start_interrupts | |
96 | __start_interrupts: | |
97 | ||
948cf67c BH |
98 | .globl system_reset_pSeries; |
99 | system_reset_pSeries: | |
44e9309f | 100 | HMT_MEDIUM_PPR_DISCARD |
948cf67c BH |
101 | SET_SCRATCH0(r13) |
102 | #ifdef CONFIG_PPC_P7_NAP | |
103 | BEGIN_FTR_SECTION | |
104 | /* Running native on arch 2.06 or later, check if we are | |
77b54e9f | 105 | * waking up from nap/sleep/winkle. |
948cf67c BH |
106 | */ |
107 | mfspr r13,SPRN_SRR1 | |
371fefd6 PM |
108 | rlwinm. r13,r13,47-31,30,31 |
109 | beq 9f | |
110 | ||
7cba160a SP |
111 | cmpwi cr3,r13,2 |
112 | ||
77b54e9f SP |
113 | /* |
114 | * Check if last bit of HSPGR0 is set. This indicates whether we are | |
115 | * waking up from winkle. | |
116 | */ | |
371fefd6 | 117 | GET_PACA(r13) |
77b54e9f SP |
118 | clrldi r5,r13,63 |
119 | clrrdi r13,r13,1 | |
120 | cmpwi cr4,r5,1 | |
121 | mtspr SPRN_HSPRG0,r13 | |
122 | ||
7cba160a SP |
123 | lbz r0,PACA_THREAD_IDLE_STATE(r13) |
124 | cmpwi cr2,r0,PNV_THREAD_NAP | |
125 | bgt cr2,8f /* Either sleep or Winkle */ | |
126 | ||
127 | /* Waking up from nap should not cause hypervisor state loss */ | |
128 | bgt cr3,. | |
129 | ||
130 | /* Waking up from nap */ | |
131 | li r0,PNV_THREAD_RUNNING | |
132 | stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ | |
371fefd6 | 133 | |
3a167bea | 134 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
f0888f70 PM |
135 | li r0,KVM_HWTHREAD_IN_KERNEL |
136 | stb r0,HSTATE_HWTHREAD_STATE(r13) | |
137 | /* Order setting hwthread_state vs. testing hwthread_req */ | |
138 | sync | |
139 | lbz r0,HSTATE_HWTHREAD_REQ(r13) | |
140 | cmpwi r0,0 | |
141 | beq 1f | |
371fefd6 PM |
142 | b kvm_start_guest |
143 | 1: | |
144 | #endif | |
145 | ||
56548fc0 PM |
146 | /* Return SRR1 from power7_nap() */ |
147 | mfspr r3,SPRN_SRR1 | |
7cba160a | 148 | beq cr3,2f |
b1576fec AB |
149 | b power7_wakeup_noloss |
150 | 2: b power7_wakeup_loss | |
aca79d2b VS |
151 | |
152 | /* Fast Sleep wakeup on PowerNV */ | |
153 | 8: GET_PACA(r13) | |
b1576fec | 154 | b power7_wakeup_tb_loss |
aca79d2b | 155 | |
371fefd6 | 156 | 9: |
969391c5 | 157 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
948cf67c | 158 | #endif /* CONFIG_PPC_P7_NAP */ |
b01c8b54 PM |
159 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
160 | NOTEST, 0x100) | |
0ebc4cda BH |
161 | |
162 | . = 0x200 | |
b01c8b54 PM |
163 | machine_check_pSeries_1: |
164 | /* This is moved out of line as it can be patched by FW, but | |
165 | * some code path might still want to branch into the original | |
166 | * vector | |
167 | */ | |
1707dd16 PM |
168 | HMT_MEDIUM_PPR_DISCARD |
169 | SET_SCRATCH0(r13) /* save r13 */ | |
1c51089f MS |
170 | #ifdef CONFIG_PPC_P7_NAP |
171 | BEGIN_FTR_SECTION | |
172 | /* Running native on arch 2.06 or later, check if we are | |
173 | * waking up from nap. We only handle no state loss and | |
174 | * supervisor state loss. We do -not- handle hypervisor | |
175 | * state loss at this time. | |
176 | */ | |
177 | mfspr r13,SPRN_SRR1 | |
178 | rlwinm. r13,r13,47-31,30,31 | |
d410ae21 | 179 | OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) |
1c51089f MS |
180 | beq 9f |
181 | ||
d410ae21 MS |
182 | mfspr r13,SPRN_SRR1 |
183 | rlwinm. r13,r13,47-31,30,31 | |
1c51089f MS |
184 | /* waking up from powersave (nap) state */ |
185 | cmpwi cr1,r13,2 | |
186 | /* Total loss of HV state is fatal. let's just stay stuck here */ | |
d410ae21 | 187 | OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) |
1c51089f MS |
188 | bgt cr1,. |
189 | 9: | |
d410ae21 | 190 | OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR) |
1c51089f MS |
191 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
192 | #endif /* CONFIG_PPC_P7_NAP */ | |
1707dd16 | 193 | EXCEPTION_PROLOG_0(PACA_EXMC) |
1e9b4507 MS |
194 | BEGIN_FTR_SECTION |
195 | b machine_check_pSeries_early | |
196 | FTR_SECTION_ELSE | |
1707dd16 | 197 | b machine_check_pSeries_0 |
1e9b4507 | 198 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
0ebc4cda BH |
199 | |
200 | . = 0x300 | |
201 | .globl data_access_pSeries | |
202 | data_access_pSeries: | |
44e9309f | 203 | HMT_MEDIUM_PPR_DISCARD |
673b189a | 204 | SET_SCRATCH0(r13) |
b01c8b54 | 205 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, |
697d3899 | 206 | KVMTEST, 0x300) |
0ebc4cda BH |
207 | |
208 | . = 0x380 | |
209 | .globl data_access_slb_pSeries | |
210 | data_access_slb_pSeries: | |
44e9309f | 211 | HMT_MEDIUM_PPR_DISCARD |
673b189a | 212 | SET_SCRATCH0(r13) |
1707dd16 | 213 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
697d3899 | 214 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) |
0ebc4cda BH |
215 | std r3,PACA_EXSLB+EX_R3(r13) |
216 | mfspr r3,SPRN_DAR | |
0ebc4cda BH |
217 | #ifdef __DISABLED__ |
218 | /* Keep that around for when we re-implement dynamic VSIDs */ | |
219 | cmpdi r3,0 | |
220 | bge slb_miss_user_pseries | |
221 | #endif /* __DISABLED__ */ | |
b01c8b54 | 222 | mfspr r12,SPRN_SRR1 |
0ebc4cda | 223 | #ifndef CONFIG_RELOCATABLE |
b1576fec | 224 | b slb_miss_realmode |
0ebc4cda BH |
225 | #else |
226 | /* | |
ad0289e4 | 227 | * We can't just use a direct branch to slb_miss_realmode |
0ebc4cda BH |
228 | * because the distance from here to there depends on where |
229 | * the kernel ends up being put. | |
230 | */ | |
231 | mfctr r11 | |
232 | ld r10,PACAKBASE(r13) | |
ad0289e4 | 233 | LOAD_HANDLER(r10, slb_miss_realmode) |
0ebc4cda BH |
234 | mtctr r10 |
235 | bctr | |
236 | #endif | |
237 | ||
b3e6b5df | 238 | STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access) |
0ebc4cda BH |
239 | |
240 | . = 0x480 | |
241 | .globl instruction_access_slb_pSeries | |
242 | instruction_access_slb_pSeries: | |
44e9309f | 243 | HMT_MEDIUM_PPR_DISCARD |
673b189a | 244 | SET_SCRATCH0(r13) |
1707dd16 | 245 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
de56a948 | 246 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480) |
0ebc4cda BH |
247 | std r3,PACA_EXSLB+EX_R3(r13) |
248 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | |
0ebc4cda BH |
249 | #ifdef __DISABLED__ |
250 | /* Keep that around for when we re-implement dynamic VSIDs */ | |
251 | cmpdi r3,0 | |
252 | bge slb_miss_user_pseries | |
253 | #endif /* __DISABLED__ */ | |
b01c8b54 | 254 | mfspr r12,SPRN_SRR1 |
0ebc4cda | 255 | #ifndef CONFIG_RELOCATABLE |
b1576fec | 256 | b slb_miss_realmode |
0ebc4cda BH |
257 | #else |
258 | mfctr r11 | |
259 | ld r10,PACAKBASE(r13) | |
ad0289e4 | 260 | LOAD_HANDLER(r10, slb_miss_realmode) |
0ebc4cda BH |
261 | mtctr r10 |
262 | bctr | |
263 | #endif | |
264 | ||
b3e6b5df BH |
265 | /* We open code these as we can't have a ". = x" (even with |
266 | * x = "." within a feature section | |
267 | */ | |
a5d4f3ad | 268 | . = 0x500; |
b3e6b5df BH |
269 | .globl hardware_interrupt_pSeries; |
270 | .globl hardware_interrupt_hv; | |
a5d4f3ad | 271 | hardware_interrupt_pSeries: |
b3e6b5df | 272 | hardware_interrupt_hv: |
a485c709 | 273 | HMT_MEDIUM_PPR_DISCARD |
a5d4f3ad | 274 | BEGIN_FTR_SECTION |
b01c8b54 PM |
275 | _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, |
276 | EXC_HV, SOFTEN_TEST_HV) | |
277 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) | |
de56a948 PM |
278 | FTR_SECTION_ELSE |
279 | _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, | |
9e368f29 | 280 | EXC_STD, SOFTEN_TEST_HV_201) |
de56a948 | 281 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) |
969391c5 | 282 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
a5d4f3ad | 283 | |
b3e6b5df | 284 | STD_EXCEPTION_PSERIES(0x600, 0x600, alignment) |
de56a948 | 285 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600) |
b01c8b54 | 286 | |
b3e6b5df | 287 | STD_EXCEPTION_PSERIES(0x700, 0x700, program_check) |
de56a948 | 288 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700) |
b01c8b54 | 289 | |
b3e6b5df | 290 | STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable) |
de56a948 | 291 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800) |
a5d4f3ad | 292 | |
a485c709 PM |
293 | . = 0x900 |
294 | .globl decrementer_pSeries | |
295 | decrementer_pSeries: | |
296 | _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR) | |
297 | ||
dabe859e | 298 | STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) |
a5d4f3ad | 299 | |
1dbdafec | 300 | MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super) |
de56a948 | 301 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00) |
b01c8b54 | 302 | |
b3e6b5df | 303 | STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b) |
de56a948 | 304 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00) |
0ebc4cda BH |
305 | |
306 | . = 0xc00 | |
307 | .globl system_call_pSeries | |
308 | system_call_pSeries: | |
8b91a255 SW |
309 | /* |
310 | * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems | |
311 | * that support it) before changing to HMT_MEDIUM. That allows the KVM | |
312 | * code to save that value into the guest state (it is the guest's PPR | |
313 | * value). Otherwise just change to HMT_MEDIUM as userspace has | |
314 | * already saved the PPR. | |
315 | */ | |
b01c8b54 PM |
316 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
317 | SET_SCRATCH0(r13) | |
318 | GET_PACA(r13) | |
319 | std r9,PACA_EXGEN+EX_R9(r13) | |
8b91a255 SW |
320 | OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); |
321 | HMT_MEDIUM; | |
b01c8b54 | 322 | std r10,PACA_EXGEN+EX_R10(r13) |
8b91a255 | 323 | OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR); |
b01c8b54 PM |
324 | mfcr r9 |
325 | KVMTEST(0xc00) | |
326 | GET_SCRATCH0(r13) | |
8b91a255 SW |
327 | #else |
328 | HMT_MEDIUM; | |
b01c8b54 | 329 | #endif |
742415d6 MN |
330 | SYSCALL_PSERIES_1 |
331 | SYSCALL_PSERIES_2_RFID | |
332 | SYSCALL_PSERIES_3 | |
b01c8b54 PM |
333 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) |
334 | ||
b3e6b5df | 335 | STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step) |
de56a948 | 336 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00) |
b3e6b5df BH |
337 | |
338 | /* At 0xe??? we have a bunch of hypervisor exceptions, we branch | |
339 | * out of line to handle them | |
340 | */ | |
341 | . = 0xe00 | |
d671ddd6 | 342 | hv_data_storage_trampoline: |
1707dd16 PM |
343 | SET_SCRATCH0(r13) |
344 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 345 | b h_data_storage_hv |
1707dd16 | 346 | |
b3e6b5df | 347 | . = 0xe20 |
d671ddd6 | 348 | hv_instr_storage_trampoline: |
1707dd16 PM |
349 | SET_SCRATCH0(r13) |
350 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 351 | b h_instr_storage_hv |
1707dd16 | 352 | |
b3e6b5df | 353 | . = 0xe40 |
d671ddd6 | 354 | emulation_assist_trampoline: |
1707dd16 PM |
355 | SET_SCRATCH0(r13) |
356 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 357 | b emulation_assist_hv |
1707dd16 | 358 | |
b3e6b5df | 359 | . = 0xe60 |
d671ddd6 | 360 | hv_exception_trampoline: |
1707dd16 PM |
361 | SET_SCRATCH0(r13) |
362 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0869b6fd | 363 | b hmi_exception_early |
1707dd16 | 364 | |
655bb3f4 | 365 | . = 0xe80 |
d671ddd6 | 366 | hv_doorbell_trampoline: |
1707dd16 PM |
367 | SET_SCRATCH0(r13) |
368 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
655bb3f4 | 369 | b h_doorbell_hv |
0ebc4cda BH |
370 | |
371 | /* We need to deal with the Altivec unavailable exception | |
372 | * here which is at 0xf20, thus in the middle of the | |
373 | * prolog code of the PerformanceMonitor one. A little | |
374 | * trickery is thus necessary | |
375 | */ | |
376 | . = 0xf00 | |
fa111f1f | 377 | performance_monitor_pseries_trampoline: |
1707dd16 PM |
378 | SET_SCRATCH0(r13) |
379 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
380 | b performance_monitor_pSeries |
381 | ||
382 | . = 0xf20 | |
fa111f1f | 383 | altivec_unavailable_pseries_trampoline: |
1707dd16 PM |
384 | SET_SCRATCH0(r13) |
385 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
386 | b altivec_unavailable_pSeries |
387 | ||
388 | . = 0xf40 | |
fa111f1f | 389 | vsx_unavailable_pseries_trampoline: |
1707dd16 PM |
390 | SET_SCRATCH0(r13) |
391 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
392 | b vsx_unavailable_pSeries |
393 | ||
d0c0c9a1 | 394 | . = 0xf60 |
fa111f1f | 395 | facility_unavailable_trampoline: |
d0c0c9a1 MN |
396 | SET_SCRATCH0(r13) |
397 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
021424a1 | 398 | b facility_unavailable_pSeries |
d0c0c9a1 | 399 | |
b14b6260 | 400 | . = 0xf80 |
fa111f1f | 401 | hv_facility_unavailable_trampoline: |
b14b6260 ME |
402 | SET_SCRATCH0(r13) |
403 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
404 | b facility_unavailable_hv | |
405 | ||
0ebc4cda | 406 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 407 | STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) |
5ccf55dd | 408 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) |
0ebc4cda | 409 | #endif /* CONFIG_CBE_RAS */ |
b01c8b54 | 410 | |
b3e6b5df | 411 | STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint) |
de56a948 | 412 | KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300) |
b01c8b54 | 413 | |
b92a66a6 | 414 | . = 0x1500 |
51cf2b30 | 415 | .global denorm_exception_hv |
b92a66a6 | 416 | denorm_exception_hv: |
44e9309f | 417 | HMT_MEDIUM_PPR_DISCARD |
b92a66a6 | 418 | mtspr SPRN_SPRG_HSCRATCH0,r13 |
1707dd16 | 419 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
630573c1 | 420 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500) |
b92a66a6 MN |
421 | |
422 | #ifdef CONFIG_PPC_DENORMALISATION | |
423 | mfspr r10,SPRN_HSRR1 | |
424 | mfspr r11,SPRN_HSRR0 /* save HSRR0 */ | |
425 | andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */ | |
426 | addi r11,r11,-4 /* HSRR0 is next instruction */ | |
427 | bne+ denorm_assist | |
428 | #endif | |
429 | ||
630573c1 | 430 | KVMTEST(0x1500) |
b92a66a6 MN |
431 | EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV) |
432 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500) | |
433 | ||
0ebc4cda | 434 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 435 | STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) |
5ccf55dd | 436 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) |
0ebc4cda | 437 | #endif /* CONFIG_CBE_RAS */ |
b01c8b54 | 438 | |
b3e6b5df | 439 | STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist) |
de56a948 | 440 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700) |
b01c8b54 | 441 | |
0ebc4cda | 442 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 443 | STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) |
5ccf55dd | 444 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) |
faab4dd2 MN |
445 | #else |
446 | . = 0x1800 | |
0ebc4cda BH |
447 | #endif /* CONFIG_CBE_RAS */ |
448 | ||
0ebc4cda | 449 | |
b3e6b5df BH |
450 | /*** Out of line interrupts support ***/ |
451 | ||
faab4dd2 | 452 | .align 7 |
b01c8b54 | 453 | /* moved from 0x200 */ |
1e9b4507 MS |
454 | machine_check_pSeries_early: |
455 | BEGIN_FTR_SECTION | |
456 | EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200) | |
457 | /* | |
458 | * Register contents: | |
459 | * R13 = PACA | |
460 | * R9 = CR | |
461 | * Original R9 to R13 is saved on PACA_EXMC | |
462 | * | |
e75ad93a MS |
463 | * Switch to mc_emergency stack and handle re-entrancy (we limit |
464 | * the nested MCE upto level 4 to avoid stack overflow). | |
465 | * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1 | |
1e9b4507 MS |
466 | * |
467 | * We use paca->in_mce to check whether this is the first entry or | |
468 | * nested machine check. We increment paca->in_mce to track nested | |
469 | * machine checks. | |
470 | * | |
471 | * If this is the first entry then set stack pointer to | |
472 | * paca->mc_emergency_sp, otherwise r1 is already pointing to | |
473 | * stack frame on mc_emergency stack. | |
474 | * | |
475 | * NOTE: We are here with MSR_ME=0 (off), which means we risk a | |
476 | * checkstop if we get another machine check exception before we do | |
477 | * rfid with MSR_ME=1. | |
478 | */ | |
479 | mr r11,r1 /* Save r1 */ | |
480 | lhz r10,PACA_IN_MCE(r13) | |
481 | cmpwi r10,0 /* Are we in nested machine check */ | |
482 | bne 0f /* Yes, we are. */ | |
483 | /* First machine check entry */ | |
484 | ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ | |
485 | 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ | |
486 | addi r10,r10,1 /* increment paca->in_mce */ | |
487 | sth r10,PACA_IN_MCE(r13) | |
e75ad93a MS |
488 | /* Limit nested MCE to level 4 to avoid stack overflow */ |
489 | cmpwi r10,4 | |
490 | bgt 2f /* Check if we hit limit of 4 */ | |
1e9b4507 MS |
491 | std r11,GPR1(r1) /* Save r1 on the stack. */ |
492 | std r11,0(r1) /* make stack chain pointer */ | |
493 | mfspr r11,SPRN_SRR0 /* Save SRR0 */ | |
494 | std r11,_NIP(r1) | |
495 | mfspr r11,SPRN_SRR1 /* Save SRR1 */ | |
496 | std r11,_MSR(r1) | |
497 | mfspr r11,SPRN_DAR /* Save DAR */ | |
498 | std r11,_DAR(r1) | |
499 | mfspr r11,SPRN_DSISR /* Save DSISR */ | |
500 | std r11,_DSISR(r1) | |
501 | std r9,_CCR(r1) /* Save CR in stackframe */ | |
502 | /* Save r9 through r13 from EXMC save area to stack frame. */ | |
503 | EXCEPTION_PROLOG_COMMON_2(PACA_EXMC) | |
504 | mfmsr r11 /* get MSR value */ | |
505 | ori r11,r11,MSR_ME /* turn on ME bit */ | |
506 | ori r11,r11,MSR_RI /* turn on RI bit */ | |
507 | ld r12,PACAKBASE(r13) /* get high part of &label */ | |
508 | LOAD_HANDLER(r12, machine_check_handle_early) | |
e75ad93a | 509 | 1: mtspr SPRN_SRR0,r12 |
1e9b4507 MS |
510 | mtspr SPRN_SRR1,r11 |
511 | rfid | |
512 | b . /* prevent speculative execution */ | |
e75ad93a MS |
513 | 2: |
514 | /* Stack overflow. Stay on emergency stack and panic. | |
515 | * Keep the ME bit off while panic-ing, so that if we hit | |
516 | * another machine check we checkstop. | |
517 | */ | |
518 | addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */ | |
519 | ld r11,PACAKMSR(r13) | |
520 | ld r12,PACAKBASE(r13) | |
521 | LOAD_HANDLER(r12, unrecover_mce) | |
522 | li r10,MSR_ME | |
523 | andc r11,r11,r10 /* Turn off MSR_ME */ | |
524 | b 1b | |
525 | b . /* prevent speculative execution */ | |
1e9b4507 MS |
526 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) |
527 | ||
b01c8b54 PM |
528 | machine_check_pSeries: |
529 | .globl machine_check_fwnmi | |
530 | machine_check_fwnmi: | |
44e9309f | 531 | HMT_MEDIUM_PPR_DISCARD |
b01c8b54 | 532 | SET_SCRATCH0(r13) /* save r13 */ |
1707dd16 PM |
533 | EXCEPTION_PROLOG_0(PACA_EXMC) |
534 | machine_check_pSeries_0: | |
535 | EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200) | |
536 | EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD) | |
b01c8b54 | 537 | KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) |
697d3899 PM |
538 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) |
539 | KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) | |
de56a948 PM |
540 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400) |
541 | KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480) | |
542 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900) | |
b01c8b54 PM |
543 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) |
544 | ||
b92a66a6 MN |
545 | #ifdef CONFIG_PPC_DENORMALISATION |
546 | denorm_assist: | |
547 | BEGIN_FTR_SECTION | |
548 | /* | |
549 | * To denormalise we need to move a copy of the register to itself. | |
550 | * For POWER6 do that here for all FP regs. | |
551 | */ | |
552 | mfmsr r10 | |
553 | ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) | |
554 | xori r10,r10,(MSR_FE0|MSR_FE1) | |
555 | mtmsrd r10 | |
556 | sync | |
d7c67fb1 MN |
557 | |
558 | #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 | |
559 | #define FMR4(n) FMR2(n) ; FMR2(n+2) | |
560 | #define FMR8(n) FMR4(n) ; FMR4(n+4) | |
561 | #define FMR16(n) FMR8(n) ; FMR8(n+8) | |
562 | #define FMR32(n) FMR16(n) ; FMR16(n+16) | |
563 | FMR32(0) | |
564 | ||
b92a66a6 MN |
565 | FTR_SECTION_ELSE |
566 | /* | |
567 | * To denormalise we need to move a copy of the register to itself. | |
568 | * For POWER7 do that here for the first 32 VSX registers only. | |
569 | */ | |
570 | mfmsr r10 | |
571 | oris r10,r10,MSR_VSX@h | |
572 | mtmsrd r10 | |
573 | sync | |
d7c67fb1 MN |
574 | |
575 | #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) | |
576 | #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) | |
577 | #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) | |
578 | #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) | |
579 | #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) | |
580 | XVCPSGNDP32(0) | |
581 | ||
b92a66a6 | 582 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) |
fb0fce3e MN |
583 | |
584 | BEGIN_FTR_SECTION | |
585 | b denorm_done | |
586 | END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) | |
587 | /* | |
588 | * To denormalise we need to move a copy of the register to itself. | |
589 | * For POWER8 we need to do that for all 64 VSX registers | |
590 | */ | |
591 | XVCPSGNDP32(32) | |
592 | denorm_done: | |
b92a66a6 MN |
593 | mtspr SPRN_HSRR0,r11 |
594 | mtcrf 0x80,r9 | |
595 | ld r9,PACA_EXGEN+EX_R9(r13) | |
44e9309f | 596 | RESTORE_PPR_PACA(PACA_EXGEN, r10) |
630573c1 PM |
597 | BEGIN_FTR_SECTION |
598 | ld r10,PACA_EXGEN+EX_CFAR(r13) | |
599 | mtspr SPRN_CFAR,r10 | |
600 | END_FTR_SECTION_IFSET(CPU_FTR_CFAR) | |
b92a66a6 MN |
601 | ld r10,PACA_EXGEN+EX_R10(r13) |
602 | ld r11,PACA_EXGEN+EX_R11(r13) | |
603 | ld r12,PACA_EXGEN+EX_R12(r13) | |
604 | ld r13,PACA_EXGEN+EX_R13(r13) | |
605 | HRFID | |
606 | b . | |
607 | #endif | |
608 | ||
b01c8b54 | 609 | .align 7 |
b3e6b5df | 610 | /* moved from 0xe00 */ |
1707dd16 | 611 | STD_EXCEPTION_HV_OOL(0xe02, h_data_storage) |
b01c8b54 | 612 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) |
1707dd16 | 613 | STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage) |
b01c8b54 | 614 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) |
1707dd16 | 615 | STD_EXCEPTION_HV_OOL(0xe42, emulation_assist) |
b01c8b54 | 616 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) |
0869b6fd | 617 | MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception) |
b01c8b54 | 618 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) |
0869b6fd | 619 | |
1707dd16 | 620 | MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) |
655bb3f4 | 621 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) |
0ebc4cda BH |
622 | |
623 | /* moved from 0xf00 */ | |
1707dd16 | 624 | STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
de56a948 | 625 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00) |
1707dd16 | 626 | STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) |
de56a948 | 627 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20) |
1707dd16 | 628 | STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) |
de56a948 | 629 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40) |
021424a1 | 630 | STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) |
d0c0c9a1 | 631 | KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60) |
b14b6260 ME |
632 | STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable) |
633 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82) | |
0ebc4cda BH |
634 | |
635 | /* | |
fe9e1d54 IM |
636 | * An interrupt came in while soft-disabled. We set paca->irq_happened, then: |
637 | * - If it was a decrementer interrupt, we bump the dec to max and and return. | |
638 | * - If it was a doorbell we return immediately since doorbells are edge | |
639 | * triggered and won't automatically refire. | |
0869b6fd MS |
640 | * - If it was a HMI we return immediately since we handled it in realmode |
641 | * and it won't refire. | |
fe9e1d54 IM |
642 | * - else we hard disable and return. |
643 | * This is called with r10 containing the value to OR to the paca field. | |
0ebc4cda | 644 | */ |
7230c564 BH |
645 | #define MASKED_INTERRUPT(_H) \ |
646 | masked_##_H##interrupt: \ | |
647 | std r11,PACA_EXGEN+EX_R11(r13); \ | |
648 | lbz r11,PACAIRQHAPPENED(r13); \ | |
649 | or r11,r11,r10; \ | |
650 | stb r11,PACAIRQHAPPENED(r13); \ | |
fe9e1d54 IM |
651 | cmpwi r10,PACA_IRQ_DEC; \ |
652 | bne 1f; \ | |
7230c564 BH |
653 | lis r10,0x7fff; \ |
654 | ori r10,r10,0xffff; \ | |
655 | mtspr SPRN_DEC,r10; \ | |
656 | b 2f; \ | |
fe9e1d54 | 657 | 1: cmpwi r10,PACA_IRQ_DBELL; \ |
0869b6fd MS |
658 | beq 2f; \ |
659 | cmpwi r10,PACA_IRQ_HMI; \ | |
fe9e1d54 IM |
660 | beq 2f; \ |
661 | mfspr r10,SPRN_##_H##SRR1; \ | |
7230c564 BH |
662 | rldicl r10,r10,48,1; /* clear MSR_EE */ \ |
663 | rotldi r10,r10,16; \ | |
664 | mtspr SPRN_##_H##SRR1,r10; \ | |
665 | 2: mtcrf 0x80,r9; \ | |
666 | ld r9,PACA_EXGEN+EX_R9(r13); \ | |
667 | ld r10,PACA_EXGEN+EX_R10(r13); \ | |
668 | ld r11,PACA_EXGEN+EX_R11(r13); \ | |
669 | GET_SCRATCH0(r13); \ | |
670 | ##_H##rfid; \ | |
0ebc4cda | 671 | b . |
7230c564 BH |
672 | |
673 | MASKED_INTERRUPT() | |
674 | MASKED_INTERRUPT(H) | |
0ebc4cda | 675 | |
7230c564 BH |
676 | /* |
677 | * Called from arch_local_irq_enable when an interrupt needs | |
fe9e1d54 IM |
678 | * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate |
679 | * which kind of interrupt. MSR:EE is already off. We generate a | |
7230c564 BH |
680 | * stackframe like if a real interrupt had happened. |
681 | * | |
682 | * Note: While MSR:EE is off, we need to make sure that _MSR | |
683 | * in the generated frame has EE set to 1 or the exception | |
684 | * handler will not properly re-enable them. | |
685 | */ | |
686 | _GLOBAL(__replay_interrupt) | |
687 | /* We are going to jump to the exception common code which | |
688 | * will retrieve various register values from the PACA which | |
689 | * we don't give a damn about, so we don't bother storing them. | |
690 | */ | |
691 | mfmsr r12 | |
692 | mflr r11 | |
693 | mfcr r9 | |
694 | ori r12,r12,MSR_EE | |
fe9e1d54 IM |
695 | cmpwi r3,0x900 |
696 | beq decrementer_common | |
697 | cmpwi r3,0x500 | |
698 | beq hardware_interrupt_common | |
699 | BEGIN_FTR_SECTION | |
700 | cmpwi r3,0xe80 | |
701 | beq h_doorbell_common | |
702 | FTR_SECTION_ELSE | |
703 | cmpwi r3,0xa00 | |
704 | beq doorbell_super_common | |
705 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) | |
706 | blr | |
a5d4f3ad | 707 | |
0ebc4cda BH |
708 | #ifdef CONFIG_PPC_PSERIES |
709 | /* | |
710 | * Vectors for the FWNMI option. Share common code. | |
711 | */ | |
712 | .globl system_reset_fwnmi | |
713 | .align 7 | |
714 | system_reset_fwnmi: | |
44e9309f | 715 | HMT_MEDIUM_PPR_DISCARD |
673b189a | 716 | SET_SCRATCH0(r13) /* save r13 */ |
b01c8b54 PM |
717 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
718 | NOTEST, 0x100) | |
0ebc4cda BH |
719 | |
720 | #endif /* CONFIG_PPC_PSERIES */ | |
721 | ||
722 | #ifdef __DISABLED__ | |
723 | /* | |
724 | * This is used for when the SLB miss handler has to go virtual, | |
725 | * which doesn't happen for now anymore but will once we re-implement | |
726 | * dynamic VSIDs for shared page tables | |
727 | */ | |
728 | slb_miss_user_pseries: | |
729 | std r10,PACA_EXGEN+EX_R10(r13) | |
730 | std r11,PACA_EXGEN+EX_R11(r13) | |
731 | std r12,PACA_EXGEN+EX_R12(r13) | |
673b189a | 732 | GET_SCRATCH0(r10) |
0ebc4cda BH |
733 | ld r11,PACA_EXSLB+EX_R9(r13) |
734 | ld r12,PACA_EXSLB+EX_R3(r13) | |
735 | std r10,PACA_EXGEN+EX_R13(r13) | |
736 | std r11,PACA_EXGEN+EX_R9(r13) | |
737 | std r12,PACA_EXGEN+EX_R3(r13) | |
738 | clrrdi r12,r13,32 | |
739 | mfmsr r10 | |
740 | mfspr r11,SRR0 /* save SRR0 */ | |
741 | ori r12,r12,slb_miss_user_common@l /* virt addr of handler */ | |
742 | ori r10,r10,MSR_IR|MSR_DR|MSR_RI | |
743 | mtspr SRR0,r12 | |
744 | mfspr r12,SRR1 /* and SRR1 */ | |
745 | mtspr SRR1,r10 | |
746 | rfid | |
747 | b . /* prevent spec. execution */ | |
748 | #endif /* __DISABLED__ */ | |
749 | ||
4f6c11db PM |
750 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
751 | kvmppc_skip_interrupt: | |
752 | /* | |
753 | * Here all GPRs are unchanged from when the interrupt happened | |
754 | * except for r13, which is saved in SPRG_SCRATCH0. | |
755 | */ | |
756 | mfspr r13, SPRN_SRR0 | |
757 | addi r13, r13, 4 | |
758 | mtspr SPRN_SRR0, r13 | |
759 | GET_SCRATCH0(r13) | |
760 | rfid | |
761 | b . | |
762 | ||
763 | kvmppc_skip_Hinterrupt: | |
764 | /* | |
765 | * Here all GPRs are unchanged from when the interrupt happened | |
766 | * except for r13, which is saved in SPRG_SCRATCH0. | |
767 | */ | |
768 | mfspr r13, SPRN_HSRR0 | |
769 | addi r13, r13, 4 | |
770 | mtspr SPRN_HSRR0, r13 | |
771 | GET_SCRATCH0(r13) | |
772 | hrfid | |
773 | b . | |
774 | #endif | |
775 | ||
0ebc4cda BH |
776 | /* |
777 | * Code from here down to __end_handlers is invoked from the | |
778 | * exception prologs above. Because the prologs assemble the | |
779 | * addresses of these handlers using the LOAD_HANDLER macro, | |
61e2390e MN |
780 | * which uses an ori instruction, these handlers must be in |
781 | * the first 64k of the kernel image. | |
0ebc4cda BH |
782 | */ |
783 | ||
784 | /*** Common interrupt handlers ***/ | |
785 | ||
35425501 | 786 | STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception) |
0ebc4cda | 787 | |
7450f6f0 | 788 | STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) |
35425501 AB |
789 | STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt) |
790 | STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt) | |
1dbdafec | 791 | #ifdef CONFIG_PPC_DOORBELL |
35425501 | 792 | STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception) |
1dbdafec | 793 | #else |
35425501 | 794 | STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception) |
1dbdafec | 795 | #endif |
35425501 AB |
796 | STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception) |
797 | STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception) | |
798 | STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception) | |
799 | STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt) | |
0869b6fd | 800 | STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception) |
655bb3f4 | 801 | #ifdef CONFIG_PPC_DOORBELL |
35425501 | 802 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception) |
655bb3f4 | 803 | #else |
35425501 | 804 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) |
655bb3f4 | 805 | #endif |
35425501 AB |
806 | STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) |
807 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) | |
808 | STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) | |
0ebc4cda | 809 | #ifdef CONFIG_ALTIVEC |
35425501 | 810 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception) |
0ebc4cda | 811 | #else |
35425501 | 812 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) |
0ebc4cda BH |
813 | #endif |
814 | #ifdef CONFIG_CBE_RAS | |
35425501 AB |
815 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) |
816 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) | |
817 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) | |
0ebc4cda BH |
818 | #endif /* CONFIG_CBE_RAS */ |
819 | ||
c1fb6816 MN |
820 | /* |
821 | * Relocation-on interrupts: A subset of the interrupts can be delivered | |
822 | * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering | |
823 | * it. Addresses are the same as the original interrupt addresses, but | |
824 | * offset by 0xc000000000004000. | |
825 | * It's impossible to receive interrupts below 0x300 via this mechanism. | |
826 | * KVM: None of these traps are from the guest ; anything that escalated | |
827 | * to HV=1 from HV=0 is delivered via real mode handlers. | |
828 | */ | |
829 | ||
830 | /* | |
831 | * This uses the standard macro, since the original 0x300 vector | |
832 | * only has extra guff for STAB-based processors -- which never | |
833 | * come here. | |
834 | */ | |
835 | STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access) | |
836 | . = 0x4380 | |
837 | .globl data_access_slb_relon_pSeries | |
838 | data_access_slb_relon_pSeries: | |
c1fb6816 | 839 | SET_SCRATCH0(r13) |
1707dd16 | 840 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
c1fb6816 MN |
841 | EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) |
842 | std r3,PACA_EXSLB+EX_R3(r13) | |
843 | mfspr r3,SPRN_DAR | |
844 | mfspr r12,SPRN_SRR1 | |
845 | #ifndef CONFIG_RELOCATABLE | |
b1576fec | 846 | b slb_miss_realmode |
c1fb6816 MN |
847 | #else |
848 | /* | |
ad0289e4 | 849 | * We can't just use a direct branch to slb_miss_realmode |
c1fb6816 MN |
850 | * because the distance from here to there depends on where |
851 | * the kernel ends up being put. | |
852 | */ | |
853 | mfctr r11 | |
854 | ld r10,PACAKBASE(r13) | |
ad0289e4 | 855 | LOAD_HANDLER(r10, slb_miss_realmode) |
c1fb6816 MN |
856 | mtctr r10 |
857 | bctr | |
858 | #endif | |
859 | ||
860 | STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access) | |
861 | . = 0x4480 | |
862 | .globl instruction_access_slb_relon_pSeries | |
863 | instruction_access_slb_relon_pSeries: | |
c1fb6816 | 864 | SET_SCRATCH0(r13) |
1707dd16 | 865 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
c1fb6816 MN |
866 | EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) |
867 | std r3,PACA_EXSLB+EX_R3(r13) | |
868 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | |
869 | mfspr r12,SPRN_SRR1 | |
870 | #ifndef CONFIG_RELOCATABLE | |
b1576fec | 871 | b slb_miss_realmode |
c1fb6816 MN |
872 | #else |
873 | mfctr r11 | |
874 | ld r10,PACAKBASE(r13) | |
ad0289e4 | 875 | LOAD_HANDLER(r10, slb_miss_realmode) |
c1fb6816 MN |
876 | mtctr r10 |
877 | bctr | |
878 | #endif | |
879 | ||
880 | . = 0x4500 | |
881 | .globl hardware_interrupt_relon_pSeries; | |
882 | .globl hardware_interrupt_relon_hv; | |
883 | hardware_interrupt_relon_pSeries: | |
884 | hardware_interrupt_relon_hv: | |
885 | BEGIN_FTR_SECTION | |
886 | _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV) | |
887 | FTR_SECTION_ELSE | |
888 | _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR) | |
3e96ca7f | 889 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
c1fb6816 MN |
890 | STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment) |
891 | STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check) | |
892 | STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) | |
893 | MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) | |
894 | STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) | |
1dbdafec | 895 | MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super) |
c1fb6816 MN |
896 | STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) |
897 | ||
898 | . = 0x4c00 | |
899 | .globl system_call_relon_pSeries | |
900 | system_call_relon_pSeries: | |
901 | HMT_MEDIUM | |
902 | SYSCALL_PSERIES_1 | |
903 | SYSCALL_PSERIES_2_DIRECT | |
904 | SYSCALL_PSERIES_3 | |
905 | ||
906 | STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) | |
907 | ||
908 | . = 0x4e00 | |
1d567cb4 | 909 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 MN |
910 | |
911 | . = 0x4e20 | |
1d567cb4 | 912 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 MN |
913 | |
914 | . = 0x4e40 | |
d671ddd6 | 915 | emulation_assist_relon_trampoline: |
1707dd16 PM |
916 | SET_SCRATCH0(r13) |
917 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
918 | b emulation_assist_relon_hv |
919 | ||
c1fb6816 | 920 | . = 0x4e60 |
1d567cb4 | 921 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 | 922 | |
655bb3f4 | 923 | . = 0x4e80 |
d671ddd6 | 924 | h_doorbell_relon_trampoline: |
1707dd16 PM |
925 | SET_SCRATCH0(r13) |
926 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
655bb3f4 | 927 | b h_doorbell_relon_hv |
c1fb6816 | 928 | |
c1fb6816 | 929 | . = 0x4f00 |
fa111f1f | 930 | performance_monitor_relon_pseries_trampoline: |
1707dd16 PM |
931 | SET_SCRATCH0(r13) |
932 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
933 | b performance_monitor_relon_pSeries |
934 | ||
c1fb6816 | 935 | . = 0x4f20 |
fa111f1f | 936 | altivec_unavailable_relon_pseries_trampoline: |
1707dd16 PM |
937 | SET_SCRATCH0(r13) |
938 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
939 | b altivec_unavailable_relon_pSeries |
940 | ||
c1fb6816 | 941 | . = 0x4f40 |
fa111f1f | 942 | vsx_unavailable_relon_pseries_trampoline: |
1707dd16 PM |
943 | SET_SCRATCH0(r13) |
944 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
945 | b vsx_unavailable_relon_pSeries |
946 | ||
d0c0c9a1 | 947 | . = 0x4f60 |
fa111f1f | 948 | facility_unavailable_relon_trampoline: |
d0c0c9a1 MN |
949 | SET_SCRATCH0(r13) |
950 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
021424a1 | 951 | b facility_unavailable_relon_pSeries |
d0c0c9a1 | 952 | |
b14b6260 | 953 | . = 0x4f80 |
fa111f1f | 954 | hv_facility_unavailable_relon_trampoline: |
b14b6260 ME |
955 | SET_SCRATCH0(r13) |
956 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
88f09412 | 957 | b hv_facility_unavailable_relon_hv |
b14b6260 | 958 | |
c1fb6816 MN |
959 | STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) |
960 | #ifdef CONFIG_PPC_DENORMALISATION | |
961 | . = 0x5500 | |
962 | b denorm_exception_hv | |
963 | #endif | |
c1fb6816 | 964 | STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) |
c1fb6816 MN |
965 | |
966 | /* Other future vectors */ | |
967 | .align 7 | |
968 | .globl __end_interrupts | |
969 | __end_interrupts: | |
970 | ||
0ebc4cda | 971 | .align 7 |
c1fb6816 MN |
972 | system_call_entry_direct: |
973 | #if defined(CONFIG_RELOCATABLE) | |
974 | /* The first level prologue may have used LR to get here, saving | |
975 | * orig in r10. To save hacking/ifdeffing common code, restore here. | |
976 | */ | |
977 | mtlr r10 | |
978 | #endif | |
0ebc4cda BH |
979 | system_call_entry: |
980 | b system_call_common | |
981 | ||
fe1952fc | 982 | ppc64_runlatch_on_trampoline: |
b1576fec | 983 | b __ppc64_runlatch_on |
fe1952fc | 984 | |
0ebc4cda BH |
985 | /* |
986 | * Here r13 points to the paca, r9 contains the saved CR, | |
987 | * SRR0 and SRR1 are saved in r11 and r12, | |
988 | * r9 - r13 are saved in paca->exgen. | |
989 | */ | |
990 | .align 7 | |
991 | .globl data_access_common | |
992 | data_access_common: | |
993 | mfspr r10,SPRN_DAR | |
994 | std r10,PACA_EXGEN+EX_DAR(r13) | |
995 | mfspr r10,SPRN_DSISR | |
996 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
997 | EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) | |
9daf112b | 998 | RECONCILE_IRQ_STATE(r10, r11) |
a546498f | 999 | ld r12,_MSR(r1) |
0ebc4cda BH |
1000 | ld r3,PACA_EXGEN+EX_DAR(r13) |
1001 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | |
1002 | li r5,0x300 | |
b1576fec | 1003 | b do_hash_page /* Try to handle as hpte fault */ |
0ebc4cda | 1004 | |
b3e6b5df | 1005 | .align 7 |
278a6cdc | 1006 | .globl h_data_storage_common |
b3e6b5df | 1007 | h_data_storage_common: |
278a6cdc MN |
1008 | mfspr r10,SPRN_HDAR |
1009 | std r10,PACA_EXGEN+EX_DAR(r13) | |
1010 | mfspr r10,SPRN_HDSISR | |
1011 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
1012 | EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) | |
b1576fec | 1013 | bl save_nvgprs |
9daf112b | 1014 | RECONCILE_IRQ_STATE(r10, r11) |
278a6cdc | 1015 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1016 | bl unknown_exception |
1017 | b ret_from_except | |
b3e6b5df | 1018 | |
0ebc4cda BH |
1019 | .align 7 |
1020 | .globl instruction_access_common | |
1021 | instruction_access_common: | |
1022 | EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) | |
9daf112b | 1023 | RECONCILE_IRQ_STATE(r10, r11) |
a546498f | 1024 | ld r12,_MSR(r1) |
0ebc4cda BH |
1025 | ld r3,_NIP(r1) |
1026 | andis. r4,r12,0x5820 | |
1027 | li r5,0x400 | |
b1576fec | 1028 | b do_hash_page /* Try to handle as hpte fault */ |
0ebc4cda | 1029 | |
35425501 | 1030 | STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception) |
b3e6b5df | 1031 | |
0ebc4cda BH |
1032 | /* |
1033 | * Here is the common SLB miss user that is used when going to virtual | |
1034 | * mode for SLB misses, that is currently not used | |
1035 | */ | |
1036 | #ifdef __DISABLED__ | |
1037 | .align 7 | |
1038 | .globl slb_miss_user_common | |
1039 | slb_miss_user_common: | |
1040 | mflr r10 | |
1041 | std r3,PACA_EXGEN+EX_DAR(r13) | |
1042 | stw r9,PACA_EXGEN+EX_CCR(r13) | |
1043 | std r10,PACA_EXGEN+EX_LR(r13) | |
1044 | std r11,PACA_EXGEN+EX_SRR0(r13) | |
b1576fec | 1045 | bl slb_allocate_user |
0ebc4cda BH |
1046 | |
1047 | ld r10,PACA_EXGEN+EX_LR(r13) | |
1048 | ld r3,PACA_EXGEN+EX_R3(r13) | |
1049 | lwz r9,PACA_EXGEN+EX_CCR(r13) | |
1050 | ld r11,PACA_EXGEN+EX_SRR0(r13) | |
1051 | mtlr r10 | |
1052 | beq- slb_miss_fault | |
1053 | ||
1054 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ | |
1055 | beq- unrecov_user_slb | |
1056 | mfmsr r10 | |
1057 | ||
1058 | .machine push | |
1059 | .machine "power4" | |
1060 | mtcrf 0x80,r9 | |
1061 | .machine pop | |
1062 | ||
1063 | clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */ | |
1064 | mtmsrd r10,1 | |
1065 | ||
1066 | mtspr SRR0,r11 | |
1067 | mtspr SRR1,r12 | |
1068 | ||
1069 | ld r9,PACA_EXGEN+EX_R9(r13) | |
1070 | ld r10,PACA_EXGEN+EX_R10(r13) | |
1071 | ld r11,PACA_EXGEN+EX_R11(r13) | |
1072 | ld r12,PACA_EXGEN+EX_R12(r13) | |
1073 | ld r13,PACA_EXGEN+EX_R13(r13) | |
1074 | rfid | |
1075 | b . | |
1076 | ||
1077 | slb_miss_fault: | |
1078 | EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN) | |
1079 | ld r4,PACA_EXGEN+EX_DAR(r13) | |
1080 | li r5,0 | |
1081 | std r4,_DAR(r1) | |
1082 | std r5,_DSISR(r1) | |
1083 | b handle_page_fault | |
1084 | ||
1085 | unrecov_user_slb: | |
1086 | EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN) | |
9daf112b | 1087 | RECONCILE_IRQ_STATE(r10, r11) |
b1576fec | 1088 | bl save_nvgprs |
0ebc4cda | 1089 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1090 | bl unrecoverable_exception |
0ebc4cda BH |
1091 | b 1b |
1092 | ||
1093 | #endif /* __DISABLED__ */ | |
1094 | ||
1095 | ||
4e243b79 MS |
1096 | /* |
1097 | * Machine check is different because we use a different | |
1098 | * save area: PACA_EXMC instead of PACA_EXGEN. | |
1099 | */ | |
1100 | .align 7 | |
1101 | .globl machine_check_common | |
1102 | machine_check_common: | |
1103 | ||
1104 | mfspr r10,SPRN_DAR | |
1105 | std r10,PACA_EXGEN+EX_DAR(r13) | |
1106 | mfspr r10,SPRN_DSISR | |
1107 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
1108 | EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) | |
1109 | FINISH_NAP | |
9daf112b | 1110 | RECONCILE_IRQ_STATE(r10, r11) |
4e243b79 MS |
1111 | ld r3,PACA_EXGEN+EX_DAR(r13) |
1112 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | |
1113 | std r3,_DAR(r1) | |
1114 | std r4,_DSISR(r1) | |
b1576fec | 1115 | bl save_nvgprs |
4e243b79 | 1116 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1117 | bl machine_check_exception |
1118 | b ret_from_except | |
4e243b79 | 1119 | |
0ebc4cda BH |
1120 | .align 7 |
1121 | .globl alignment_common | |
1122 | alignment_common: | |
1123 | mfspr r10,SPRN_DAR | |
1124 | std r10,PACA_EXGEN+EX_DAR(r13) | |
1125 | mfspr r10,SPRN_DSISR | |
1126 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
1127 | EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) | |
1128 | ld r3,PACA_EXGEN+EX_DAR(r13) | |
1129 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | |
1130 | std r3,_DAR(r1) | |
1131 | std r4,_DSISR(r1) | |
b1576fec | 1132 | bl save_nvgprs |
9daf112b | 1133 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1134 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1135 | bl alignment_exception |
1136 | b ret_from_except | |
0ebc4cda BH |
1137 | |
1138 | .align 7 | |
1139 | .globl program_check_common | |
1140 | program_check_common: | |
1141 | EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) | |
b1576fec | 1142 | bl save_nvgprs |
9daf112b | 1143 | RECONCILE_IRQ_STATE(r10, r11) |
922b9f86 | 1144 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1145 | bl program_check_exception |
1146 | b ret_from_except | |
0ebc4cda BH |
1147 | |
1148 | .align 7 | |
1149 | .globl fp_unavailable_common | |
1150 | fp_unavailable_common: | |
1151 | EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) | |
1152 | bne 1f /* if from user, just load it up */ | |
b1576fec | 1153 | bl save_nvgprs |
9daf112b | 1154 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1155 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1156 | bl kernel_fp_unavailable_exception |
0ebc4cda | 1157 | BUG_OPCODE |
bc2a9408 MN |
1158 | 1: |
1159 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
1160 | BEGIN_FTR_SECTION | |
1161 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1162 | * transaction), go do TM stuff | |
1163 | */ | |
1164 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1165 | bne- 2f | |
1166 | END_FTR_SECTION_IFSET(CPU_FTR_TM) | |
1167 | #endif | |
b1576fec | 1168 | bl load_up_fpu |
0ebc4cda | 1169 | b fast_exception_return |
bc2a9408 MN |
1170 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1171 | 2: /* User process was in a transaction */ | |
b1576fec | 1172 | bl save_nvgprs |
9daf112b | 1173 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1174 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1175 | bl fp_unavailable_tm |
1176 | b ret_from_except | |
bc2a9408 | 1177 | #endif |
0ebc4cda BH |
1178 | .align 7 |
1179 | .globl altivec_unavailable_common | |
1180 | altivec_unavailable_common: | |
1181 | EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) | |
1182 | #ifdef CONFIG_ALTIVEC | |
1183 | BEGIN_FTR_SECTION | |
1184 | beq 1f | |
bc2a9408 MN |
1185 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1186 | BEGIN_FTR_SECTION_NESTED(69) | |
1187 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1188 | * transaction), go do TM stuff | |
1189 | */ | |
1190 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1191 | bne- 2f | |
1192 | END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) | |
1193 | #endif | |
b1576fec | 1194 | bl load_up_altivec |
0ebc4cda | 1195 | b fast_exception_return |
bc2a9408 MN |
1196 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1197 | 2: /* User process was in a transaction */ | |
b1576fec | 1198 | bl save_nvgprs |
9daf112b | 1199 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1200 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1201 | bl altivec_unavailable_tm |
1202 | b ret_from_except | |
bc2a9408 | 1203 | #endif |
0ebc4cda BH |
1204 | 1: |
1205 | END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |
1206 | #endif | |
b1576fec | 1207 | bl save_nvgprs |
9daf112b | 1208 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1209 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1210 | bl altivec_unavailable_exception |
1211 | b ret_from_except | |
0ebc4cda BH |
1212 | |
1213 | .align 7 | |
1214 | .globl vsx_unavailable_common | |
1215 | vsx_unavailable_common: | |
1216 | EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) | |
1217 | #ifdef CONFIG_VSX | |
1218 | BEGIN_FTR_SECTION | |
7230c564 | 1219 | beq 1f |
bc2a9408 MN |
1220 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1221 | BEGIN_FTR_SECTION_NESTED(69) | |
1222 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1223 | * transaction), go do TM stuff | |
1224 | */ | |
1225 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1226 | bne- 2f | |
1227 | END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) | |
1228 | #endif | |
b1576fec | 1229 | b load_up_vsx |
bc2a9408 MN |
1230 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1231 | 2: /* User process was in a transaction */ | |
b1576fec | 1232 | bl save_nvgprs |
9daf112b | 1233 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1234 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1235 | bl vsx_unavailable_tm |
1236 | b ret_from_except | |
bc2a9408 | 1237 | #endif |
0ebc4cda BH |
1238 | 1: |
1239 | END_FTR_SECTION_IFSET(CPU_FTR_VSX) | |
1240 | #endif | |
b1576fec | 1241 | bl save_nvgprs |
9daf112b | 1242 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1243 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1244 | bl vsx_unavailable_exception |
1245 | b ret_from_except | |
0ebc4cda | 1246 | |
35425501 AB |
1247 | STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) |
1248 | STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) | |
d0c0c9a1 | 1249 | |
0ebc4cda BH |
1250 | .align 7 |
1251 | .globl __end_handlers | |
1252 | __end_handlers: | |
1253 | ||
61383407 | 1254 | /* Equivalents to the above handlers for relocation-on interrupt vectors */ |
1707dd16 | 1255 | STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) |
1707dd16 | 1256 | MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) |
61383407 | 1257 | |
1707dd16 PM |
1258 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
1259 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) | |
1260 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) | |
021424a1 | 1261 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) |
88f09412 | 1262 | STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) |
61383407 BH |
1263 | |
1264 | #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) | |
1265 | /* | |
1266 | * Data area reserved for FWNMI option. | |
1267 | * This address (0x7000) is fixed by the RPA. | |
1268 | */ | |
1269 | .= 0x7000 | |
1270 | .globl fwnmi_data_area | |
1271 | fwnmi_data_area: | |
1272 | ||
1273 | /* pseries and powernv need to keep the whole page from | |
1274 | * 0x7000 to 0x8000 free for use by the firmware | |
1275 | */ | |
1276 | . = 0x8000 | |
1277 | #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ | |
1278 | ||
11d54904 GR |
1279 | .globl hmi_exception_early |
1280 | hmi_exception_early: | |
1281 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60) | |
1282 | mr r10,r1 /* Save r1 */ | |
1283 | ld r1,PACAEMERGSP(r13) /* Use emergency stack */ | |
1284 | subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ | |
1285 | std r9,_CCR(r1) /* save CR in stackframe */ | |
1286 | mfspr r11,SPRN_HSRR0 /* Save HSRR0 */ | |
1287 | std r11,_NIP(r1) /* save HSRR0 in stackframe */ | |
1288 | mfspr r12,SPRN_HSRR1 /* Save SRR1 */ | |
1289 | std r12,_MSR(r1) /* save SRR1 in stackframe */ | |
1290 | std r10,0(r1) /* make stack chain pointer */ | |
1291 | std r0,GPR0(r1) /* save r0 in stackframe */ | |
1292 | std r10,GPR1(r1) /* save r1 in stackframe */ | |
1293 | EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN) | |
1294 | EXCEPTION_PROLOG_COMMON_3(0xe60) | |
1295 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1296 | bl hmi_exception_realmode | |
1297 | /* Windup the stack. */ | |
11d54904 GR |
1298 | /* Move original HSRR0 and HSRR1 into the respective regs */ |
1299 | ld r9,_MSR(r1) | |
1300 | mtspr SPRN_HSRR1,r9 | |
1301 | ld r3,_NIP(r1) | |
1302 | mtspr SPRN_HSRR0,r3 | |
1303 | ld r9,_CTR(r1) | |
1304 | mtctr r9 | |
1305 | ld r9,_XER(r1) | |
1306 | mtxer r9 | |
1307 | ld r9,_LINK(r1) | |
1308 | mtlr r9 | |
1309 | REST_GPR(0, r1) | |
1310 | REST_8GPRS(2, r1) | |
1311 | REST_GPR(10, r1) | |
1312 | ld r11,_CCR(r1) | |
1313 | mtcr r11 | |
1314 | REST_GPR(11, r1) | |
1315 | REST_2GPRS(12, r1) | |
1316 | /* restore original r1. */ | |
1317 | ld r1,GPR1(r1) | |
1318 | ||
1319 | /* | |
1320 | * Go to virtual mode and pull the HMI event information from | |
1321 | * firmware. | |
1322 | */ | |
1323 | .globl hmi_exception_after_realmode | |
1324 | hmi_exception_after_realmode: | |
1325 | SET_SCRATCH0(r13) | |
1326 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
1327 | b hmi_exception_hv | |
1328 | ||
61383407 | 1329 | |
4e243b79 MS |
1330 | #define MACHINE_CHECK_HANDLER_WINDUP \ |
1331 | /* Clear MSR_RI before setting SRR0 and SRR1. */\ | |
1332 | li r0,MSR_RI; \ | |
1333 | mfmsr r9; /* get MSR value */ \ | |
1334 | andc r9,r9,r0; \ | |
1335 | mtmsrd r9,1; /* Clear MSR_RI */ \ | |
1336 | /* Move original SRR0 and SRR1 into the respective regs */ \ | |
1337 | ld r9,_MSR(r1); \ | |
1338 | mtspr SPRN_SRR1,r9; \ | |
1339 | ld r3,_NIP(r1); \ | |
1340 | mtspr SPRN_SRR0,r3; \ | |
1341 | ld r9,_CTR(r1); \ | |
1342 | mtctr r9; \ | |
1343 | ld r9,_XER(r1); \ | |
1344 | mtxer r9; \ | |
1345 | ld r9,_LINK(r1); \ | |
1346 | mtlr r9; \ | |
1347 | REST_GPR(0, r1); \ | |
1348 | REST_8GPRS(2, r1); \ | |
1349 | REST_GPR(10, r1); \ | |
1350 | ld r11,_CCR(r1); \ | |
1351 | mtcr r11; \ | |
1352 | /* Decrement paca->in_mce. */ \ | |
1353 | lhz r12,PACA_IN_MCE(r13); \ | |
1354 | subi r12,r12,1; \ | |
1355 | sth r12,PACA_IN_MCE(r13); \ | |
1356 | REST_GPR(11, r1); \ | |
1357 | REST_2GPRS(12, r1); \ | |
1358 | /* restore original r1. */ \ | |
1359 | ld r1,GPR1(r1) | |
1360 | ||
1361 | /* | |
1362 | * Handle machine check early in real mode. We come here with | |
1363 | * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. | |
1364 | */ | |
1365 | .align 7 | |
1366 | .globl machine_check_handle_early | |
1367 | machine_check_handle_early: | |
1368 | std r0,GPR0(r1) /* Save r0 */ | |
1369 | EXCEPTION_PROLOG_COMMON_3(0x200) | |
b1576fec | 1370 | bl save_nvgprs |
4e243b79 | 1371 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1372 | bl machine_check_early |
2749a2f2 | 1373 | std r3,RESULT(r1) /* Save result */ |
4e243b79 MS |
1374 | ld r12,_MSR(r1) |
1375 | #ifdef CONFIG_PPC_P7_NAP | |
1376 | /* | |
1377 | * Check if thread was in power saving mode. We come here when any | |
1378 | * of the following is true: | |
1379 | * a. thread wasn't in power saving mode | |
1380 | * b. thread was in power saving mode with no state loss or | |
1381 | * supervisor state loss | |
1382 | * | |
1383 | * Go back to nap again if (b) is true. | |
1384 | */ | |
1385 | rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */ | |
1386 | beq 4f /* No, it wasn;t */ | |
1387 | /* Thread was in power saving mode. Go back to nap again. */ | |
1388 | cmpwi r11,2 | |
1389 | bne 3f | |
1390 | /* Supervisor state loss */ | |
1391 | li r0,1 | |
1392 | stb r0,PACA_NAPSTATELOST(r13) | |
b1576fec | 1393 | 3: bl machine_check_queue_event |
4e243b79 MS |
1394 | MACHINE_CHECK_HANDLER_WINDUP |
1395 | GET_PACA(r13) | |
1396 | ld r1,PACAR1(r13) | |
7cba160a | 1397 | li r3,PNV_THREAD_NAP |
b1576fec | 1398 | b power7_enter_nap_mode |
4e243b79 MS |
1399 | 4: |
1400 | #endif | |
1401 | /* | |
1402 | * Check if we are coming from hypervisor userspace. If yes then we | |
1403 | * continue in host kernel in V mode to deliver the MC event. | |
1404 | */ | |
1405 | rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */ | |
1406 | beq 5f | |
1407 | andi. r11,r12,MSR_PR /* See if coming from user. */ | |
1408 | bne 9f /* continue in V mode if we are. */ | |
1409 | ||
1410 | 5: | |
1411 | #ifdef CONFIG_KVM_BOOK3S_64_HV | |
1412 | /* | |
1413 | * We are coming from kernel context. Check if we are coming from | |
1414 | * guest. if yes, then we can continue. We will fall through | |
1415 | * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest. | |
1416 | */ | |
1417 | lbz r11,HSTATE_IN_GUEST(r13) | |
1418 | cmpwi r11,0 /* Check if coming from guest */ | |
1419 | bne 9f /* continue if we are. */ | |
1420 | #endif | |
1421 | /* | |
1422 | * At this point we are not sure about what context we come from. | |
1423 | * Queue up the MCE event and return from the interrupt. | |
1424 | * But before that, check if this is an un-recoverable exception. | |
1425 | * If yes, then stay on emergency stack and panic. | |
1426 | */ | |
1427 | andi. r11,r12,MSR_RI | |
1428 | bne 2f | |
2749a2f2 MS |
1429 | 1: mfspr r11,SPRN_SRR0 |
1430 | ld r10,PACAKBASE(r13) | |
1431 | LOAD_HANDLER(r10,unrecover_mce) | |
1432 | mtspr SPRN_SRR0,r10 | |
1433 | ld r10,PACAKMSR(r13) | |
1434 | /* | |
1435 | * We are going down. But there are chances that we might get hit by | |
1436 | * another MCE during panic path and we may run into unstable state | |
1437 | * with no way out. Hence, turn ME bit off while going down, so that | |
1438 | * when another MCE is hit during panic path, system will checkstop | |
1439 | * and hypervisor will get restarted cleanly by SP. | |
1440 | */ | |
1441 | li r3,MSR_ME | |
1442 | andc r10,r10,r3 /* Turn off MSR_ME */ | |
1443 | mtspr SPRN_SRR1,r10 | |
1444 | rfid | |
1445 | b . | |
4e243b79 | 1446 | 2: |
2749a2f2 MS |
1447 | /* |
1448 | * Check if we have successfully handled/recovered from error, if not | |
1449 | * then stay on emergency stack and panic. | |
1450 | */ | |
1451 | ld r3,RESULT(r1) /* Load result */ | |
1452 | cmpdi r3,0 /* see if we handled MCE successfully */ | |
1453 | ||
1454 | beq 1b /* if !handled then panic */ | |
4e243b79 MS |
1455 | /* |
1456 | * Return from MC interrupt. | |
1457 | * Queue up the MCE event so that we can log it later, while | |
1458 | * returning from kernel or opal call. | |
1459 | */ | |
b1576fec | 1460 | bl machine_check_queue_event |
4e243b79 MS |
1461 | MACHINE_CHECK_HANDLER_WINDUP |
1462 | rfid | |
1463 | 9: | |
1464 | /* Deliver the machine check to host kernel in V mode. */ | |
1465 | MACHINE_CHECK_HANDLER_WINDUP | |
1466 | b machine_check_pSeries | |
1467 | ||
2749a2f2 MS |
1468 | unrecover_mce: |
1469 | /* Invoke machine_check_exception to print MCE event and panic. */ | |
1470 | addi r3,r1,STACK_FRAME_OVERHEAD | |
ad718622 | 1471 | bl machine_check_exception |
2749a2f2 MS |
1472 | /* |
1473 | * We will not reach here. Even if we did, there is no way out. Call | |
1474 | * unrecoverable_exception and die. | |
1475 | */ | |
1476 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | |
ad718622 | 1477 | bl unrecoverable_exception |
2749a2f2 | 1478 | b 1b |
087aa036 CG |
1479 | /* |
1480 | * r13 points to the PACA, r9 contains the saved CR, | |
1481 | * r12 contain the saved SRR1, SRR0 is still ready for return | |
1482 | * r3 has the faulting address | |
1483 | * r9 - r13 are saved in paca->exslb. | |
1484 | * r3 is saved in paca->slb_r3 | |
1485 | * We assume we aren't going to take any exceptions during this procedure. | |
1486 | */ | |
ad0289e4 | 1487 | slb_miss_realmode: |
087aa036 CG |
1488 | mflr r10 |
1489 | #ifdef CONFIG_RELOCATABLE | |
1490 | mtctr r11 | |
1491 | #endif | |
1492 | ||
1493 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ | |
1494 | std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ | |
1495 | ||
b1576fec | 1496 | bl slb_allocate_realmode |
087aa036 CG |
1497 | |
1498 | /* All done -- return from exception. */ | |
1499 | ||
1500 | ld r10,PACA_EXSLB+EX_LR(r13) | |
1501 | ld r3,PACA_EXSLB+EX_R3(r13) | |
1502 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ | |
1503 | ||
1504 | mtlr r10 | |
1505 | ||
1506 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ | |
1507 | beq- 2f | |
1508 | ||
1509 | .machine push | |
1510 | .machine "power4" | |
1511 | mtcrf 0x80,r9 | |
1512 | mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ | |
1513 | .machine pop | |
1514 | ||
1515 | RESTORE_PPR_PACA(PACA_EXSLB, r9) | |
1516 | ld r9,PACA_EXSLB+EX_R9(r13) | |
1517 | ld r10,PACA_EXSLB+EX_R10(r13) | |
1518 | ld r11,PACA_EXSLB+EX_R11(r13) | |
1519 | ld r12,PACA_EXSLB+EX_R12(r13) | |
1520 | ld r13,PACA_EXSLB+EX_R13(r13) | |
1521 | rfid | |
1522 | b . /* prevent speculative execution */ | |
1523 | ||
1524 | 2: mfspr r11,SPRN_SRR0 | |
1525 | ld r10,PACAKBASE(r13) | |
1526 | LOAD_HANDLER(r10,unrecov_slb) | |
1527 | mtspr SPRN_SRR0,r10 | |
1528 | ld r10,PACAKMSR(r13) | |
1529 | mtspr SPRN_SRR1,r10 | |
1530 | rfid | |
1531 | b . | |
1532 | ||
1533 | unrecov_slb: | |
1534 | EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) | |
9daf112b | 1535 | RECONCILE_IRQ_STATE(r10, r11) |
b1576fec | 1536 | bl save_nvgprs |
087aa036 | 1537 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1538 | bl unrecoverable_exception |
087aa036 CG |
1539 | b 1b |
1540 | ||
1541 | ||
1542 | #ifdef CONFIG_PPC_970_NAP | |
1543 | power4_fixup_nap: | |
1544 | andc r9,r9,r10 | |
1545 | std r9,TI_LOCAL_FLAGS(r11) | |
1546 | ld r10,_LINK(r1) /* make idle task do the */ | |
1547 | std r10,_NIP(r1) /* equivalent of a blr */ | |
1548 | blr | |
1549 | #endif | |
1550 | ||
0ebc4cda BH |
1551 | /* |
1552 | * Hash table stuff | |
1553 | */ | |
1554 | .align 7 | |
6a3bab90 | 1555 | do_hash_page: |
0ebc4cda BH |
1556 | std r3,_DAR(r1) |
1557 | std r4,_DSISR(r1) | |
1558 | ||
9c7cc234 | 1559 | andis. r0,r4,0xa410 /* weird error? */ |
0ebc4cda | 1560 | bne- handle_page_fault /* if not, try to insert a HPTE */ |
9c7cc234 P |
1561 | andis. r0,r4,DSISR_DABRMATCH@h |
1562 | bne- handle_dabr_fault | |
9778b696 | 1563 | CURRENT_THREAD_INFO(r11, r1) |
9c1e1052 PM |
1564 | lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ |
1565 | andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ | |
1566 | bne 77f /* then don't call hash_page now */ | |
0ebc4cda BH |
1567 | /* |
1568 | * We need to set the _PAGE_USER bit if MSR_PR is set or if we are | |
1569 | * accessing a userspace segment (even from the kernel). We assume | |
1570 | * kernel addresses always have the high bit set. | |
1571 | */ | |
1572 | rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */ | |
1573 | rotldi r0,r3,15 /* Move high bit into MSR_PR posn */ | |
1574 | orc r0,r12,r0 /* MSR_PR | ~high_bit */ | |
1575 | rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */ | |
1576 | ori r4,r4,1 /* add _PAGE_PRESENT */ | |
1577 | rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */ | |
1578 | ||
1579 | /* | |
1580 | * r3 contains the faulting address | |
1581 | * r4 contains the required access permissions | |
1582 | * r5 contains the trap number | |
aefa5688 | 1583 | * r6 contains dsisr |
0ebc4cda | 1584 | * |
7230c564 | 1585 | * at return r3 = 0 for success, 1 for page fault, negative for error |
0ebc4cda | 1586 | */ |
aefa5688 | 1587 | ld r6,_DSISR(r1) |
b1576fec | 1588 | bl hash_page /* build HPTE if possible */ |
0ebc4cda BH |
1589 | cmpdi r3,0 /* see if hash_page succeeded */ |
1590 | ||
7230c564 | 1591 | /* Success */ |
0ebc4cda | 1592 | beq fast_exc_return_irq /* Return from exception on success */ |
0ebc4cda | 1593 | |
7230c564 BH |
1594 | /* Error */ |
1595 | blt- 13f | |
9c7cc234 | 1596 | |
0ebc4cda BH |
1597 | /* Here we have a page fault that hash_page can't handle. */ |
1598 | handle_page_fault: | |
0ebc4cda BH |
1599 | 11: ld r4,_DAR(r1) |
1600 | ld r5,_DSISR(r1) | |
1601 | addi r3,r1,STACK_FRAME_OVERHEAD | |
b1576fec | 1602 | bl do_page_fault |
0ebc4cda | 1603 | cmpdi r3,0 |
a546498f | 1604 | beq+ 12f |
b1576fec | 1605 | bl save_nvgprs |
0ebc4cda BH |
1606 | mr r5,r3 |
1607 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1608 | lwz r4,_DAR(r1) | |
b1576fec AB |
1609 | bl bad_page_fault |
1610 | b ret_from_except | |
0ebc4cda | 1611 | |
a546498f BH |
1612 | /* We have a data breakpoint exception - handle it */ |
1613 | handle_dabr_fault: | |
b1576fec | 1614 | bl save_nvgprs |
a546498f BH |
1615 | ld r4,_DAR(r1) |
1616 | ld r5,_DSISR(r1) | |
1617 | addi r3,r1,STACK_FRAME_OVERHEAD | |
b1576fec AB |
1618 | bl do_break |
1619 | 12: b ret_from_except_lite | |
a546498f | 1620 | |
0ebc4cda BH |
1621 | |
1622 | /* We have a page fault that hash_page could handle but HV refused | |
1623 | * the PTE insertion | |
1624 | */ | |
b1576fec | 1625 | 13: bl save_nvgprs |
0ebc4cda BH |
1626 | mr r5,r3 |
1627 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1628 | ld r4,_DAR(r1) | |
b1576fec AB |
1629 | bl low_hash_fault |
1630 | b ret_from_except | |
0ebc4cda | 1631 | |
9c1e1052 PM |
1632 | /* |
1633 | * We come here as a result of a DSI at a point where we don't want | |
1634 | * to call hash_page, such as when we are accessing memory (possibly | |
1635 | * user memory) inside a PMU interrupt that occurred while interrupts | |
1636 | * were soft-disabled. We want to invoke the exception handler for | |
1637 | * the access, or panic if there isn't a handler. | |
1638 | */ | |
b1576fec | 1639 | 77: bl save_nvgprs |
9c1e1052 PM |
1640 | mr r4,r3 |
1641 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1642 | li r5,SIGSEGV | |
b1576fec AB |
1643 | bl bad_page_fault |
1644 | b ret_from_except | |
4e2bf01b ME |
1645 | |
1646 | /* | |
1647 | * Here we have detected that the kernel stack pointer is bad. | |
1648 | * R9 contains the saved CR, r13 points to the paca, | |
1649 | * r10 contains the (bad) kernel stack pointer, | |
1650 | * r11 and r12 contain the saved SRR0 and SRR1. | |
1651 | * We switch to using an emergency stack, save the registers there, | |
1652 | * and call kernel_bad_stack(), which panics. | |
1653 | */ | |
1654 | bad_stack: | |
1655 | ld r1,PACAEMERGSP(r13) | |
1656 | subi r1,r1,64+INT_FRAME_SIZE | |
1657 | std r9,_CCR(r1) | |
1658 | std r10,GPR1(r1) | |
1659 | std r11,_NIP(r1) | |
1660 | std r12,_MSR(r1) | |
1661 | mfspr r11,SPRN_DAR | |
1662 | mfspr r12,SPRN_DSISR | |
1663 | std r11,_DAR(r1) | |
1664 | std r12,_DSISR(r1) | |
1665 | mflr r10 | |
1666 | mfctr r11 | |
1667 | mfxer r12 | |
1668 | std r10,_LINK(r1) | |
1669 | std r11,_CTR(r1) | |
1670 | std r12,_XER(r1) | |
1671 | SAVE_GPR(0,r1) | |
1672 | SAVE_GPR(2,r1) | |
1673 | ld r10,EX_R3(r3) | |
1674 | std r10,GPR3(r1) | |
1675 | SAVE_GPR(4,r1) | |
1676 | SAVE_4GPRS(5,r1) | |
1677 | ld r9,EX_R9(r3) | |
1678 | ld r10,EX_R10(r3) | |
1679 | SAVE_2GPRS(9,r1) | |
1680 | ld r9,EX_R11(r3) | |
1681 | ld r10,EX_R12(r3) | |
1682 | ld r11,EX_R13(r3) | |
1683 | std r9,GPR11(r1) | |
1684 | std r10,GPR12(r1) | |
1685 | std r11,GPR13(r1) | |
1686 | BEGIN_FTR_SECTION | |
1687 | ld r10,EX_CFAR(r3) | |
1688 | std r10,ORIG_GPR3(r1) | |
1689 | END_FTR_SECTION_IFSET(CPU_FTR_CFAR) | |
1690 | SAVE_8GPRS(14,r1) | |
1691 | SAVE_10GPRS(22,r1) | |
1692 | lhz r12,PACA_TRAP_SAVE(r13) | |
1693 | std r12,_TRAP(r1) | |
1694 | addi r11,r1,INT_FRAME_SIZE | |
1695 | std r11,0(r1) | |
1696 | li r12,0 | |
1697 | std r12,0(r11) | |
1698 | ld r2,PACATOC(r13) | |
1699 | ld r11,exception_marker@toc(r2) | |
1700 | std r12,RESULT(r1) | |
1701 | std r11,STACK_FRAME_OVERHEAD-16(r1) | |
1702 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | |
1703 | bl kernel_bad_stack | |
1704 | b 1b |