Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
e3873444 GL |
56 | #include <linux/of.h> |
57 | #include <linux/of_irq.h> | |
1da177e4 LT |
58 | |
59 | #include <asm/uaccess.h> | |
60 | #include <asm/system.h> | |
61 | #include <asm/io.h> | |
62 | #include <asm/pgtable.h> | |
63 | #include <asm/irq.h> | |
64 | #include <asm/cache.h> | |
65 | #include <asm/prom.h> | |
66 | #include <asm/ptrace.h> | |
1da177e4 | 67 | #include <asm/machdep.h> |
0ebfff14 | 68 | #include <asm/udbg.h> |
3e7f45ad | 69 | #include <asm/smp.h> |
89c81797 | 70 | |
d04c56f7 | 71 | #ifdef CONFIG_PPC64 |
1da177e4 | 72 | #include <asm/paca.h> |
d04c56f7 | 73 | #include <asm/firmware.h> |
0874dd40 | 74 | #include <asm/lv1call.h> |
756e7104 | 75 | #endif |
1bf4af16 AB |
76 | #define CREATE_TRACE_POINTS |
77 | #include <asm/trace.h> | |
1da177e4 | 78 | |
8c007bfd AB |
79 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); |
80 | EXPORT_PER_CPU_SYMBOL(irq_stat); | |
81 | ||
868accb7 | 82 | int __irq_offset_value; |
756e7104 | 83 | |
756e7104 | 84 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
85 | EXPORT_SYMBOL(__irq_offset_value); |
86 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 87 | |
756e7104 SR |
88 | #ifdef CONFIG_TAU_INT |
89 | extern int tau_initialized; | |
90 | extern int tau_interrupts(int); | |
91 | #endif | |
b9e5b4e6 | 92 | #endif /* CONFIG_PPC32 */ |
756e7104 | 93 | |
756e7104 | 94 | #ifdef CONFIG_PPC64 |
cd015707 ME |
95 | |
96 | #ifndef CONFIG_SPARSE_IRQ | |
1da177e4 | 97 | EXPORT_SYMBOL(irq_desc); |
cd015707 | 98 | #endif |
1da177e4 LT |
99 | |
100 | int distribute_irqs = 1; | |
d04c56f7 | 101 | |
4e491d14 | 102 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
103 | { |
104 | unsigned long enabled; | |
105 | ||
106 | __asm__ __volatile__("lbz %0,%1(13)" | |
107 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
108 | ||
109 | return enabled; | |
110 | } | |
111 | ||
4e491d14 | 112 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
113 | { |
114 | __asm__ __volatile__("stb %0,%1(13)" | |
115 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
116 | } | |
117 | ||
df9ee292 | 118 | notrace void arch_local_irq_restore(unsigned long en) |
d04c56f7 | 119 | { |
ef2b343e HD |
120 | /* |
121 | * get_paca()->soft_enabled = en; | |
122 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
123 | * That was allowed before, and in such a case we do need to take care | |
124 | * that gcc will set soft_enabled directly via r13, not choose to use | |
125 | * an intermediate register, lest we're preempted to a different cpu. | |
126 | */ | |
127 | set_soft_enabled(en); | |
d04c56f7 PM |
128 | if (!en) |
129 | return; | |
130 | ||
94491685 | 131 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 132 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
133 | /* |
134 | * Do we need to disable preemption here? Not really: in the | |
135 | * unlikely event that we're preempted to a different cpu in | |
136 | * between getting r13, loading its lppaca_ptr, and loading | |
137 | * its any_int, we might call iseries_handle_interrupts without | |
138 | * an interrupt pending on the new cpu, but that's no disaster, | |
139 | * is it? And the business of preempting us off the old cpu | |
140 | * would itself involve a local_irq_restore which handles the | |
141 | * interrupt to that cpu. | |
142 | * | |
143 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
144 | * to avoid any preemption checking added into get_paca(). | |
145 | */ | |
146 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 147 | iseries_handle_interrupts(); |
d04c56f7 | 148 | } |
94491685 | 149 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 150 | |
ef2b343e HD |
151 | /* |
152 | * if (get_paca()->hard_enabled) return; | |
153 | * But again we need to take care that gcc gets hard_enabled directly | |
154 | * via r13, not choose to use an intermediate register, lest we're | |
155 | * preempted to a different cpu in between the two instructions. | |
156 | */ | |
157 | if (get_hard_enabled()) | |
d04c56f7 | 158 | return; |
ef2b343e | 159 | |
89c81797 | 160 | #if defined(CONFIG_BOOKE) && defined(CONFIG_SMP) |
850f22d5 | 161 | /* Check for pending doorbell interrupts and resend to ourself */ |
23d72bfd MM |
162 | if (cpu_has_feature(CPU_FTR_DBELL)) |
163 | smp_muxed_ipi_resend(); | |
89c81797 BH |
164 | #endif |
165 | ||
ef2b343e HD |
166 | /* |
167 | * Need to hard-enable interrupts here. Since currently disabled, | |
168 | * no need to take further asm precautions against preemption; but | |
169 | * use local_paca instead of get_paca() to avoid preemption checking. | |
170 | */ | |
171 | local_paca->hard_enabled = en; | |
e8775d4a BH |
172 | |
173 | #ifndef CONFIG_BOOKE | |
174 | /* On server, re-trigger the decrementer if it went negative since | |
175 | * some processors only trigger on edge transitions of the sign bit. | |
176 | * | |
177 | * BookE has a level sensitive decrementer (latches in TSR) so we | |
178 | * don't need that | |
179 | */ | |
d04c56f7 PM |
180 | if ((int)mfspr(SPRN_DEC) < 0) |
181 | mtspr(SPRN_DEC, 1); | |
e8775d4a | 182 | #endif /* CONFIG_BOOKE */ |
0874dd40 TS |
183 | |
184 | /* | |
185 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
186 | * Any HV call will have this side effect. | |
187 | */ | |
188 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
189 | u64 tmp; | |
190 | lv1_get_version_info(&tmp); | |
191 | } | |
192 | ||
e1fa2e13 | 193 | __hard_irq_enable(); |
d04c56f7 | 194 | } |
df9ee292 | 195 | EXPORT_SYMBOL(arch_local_irq_restore); |
756e7104 | 196 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 197 | |
433c9c67 | 198 | int arch_show_interrupts(struct seq_file *p, int prec) |
c86845ed AB |
199 | { |
200 | int j; | |
201 | ||
202 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) | |
203 | if (tau_initialized) { | |
204 | seq_printf(p, "%*s: ", prec, "TAU"); | |
205 | for_each_online_cpu(j) | |
206 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
207 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); | |
208 | } | |
209 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */ | |
210 | ||
89713ed1 AB |
211 | seq_printf(p, "%*s: ", prec, "LOC"); |
212 | for_each_online_cpu(j) | |
213 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs); | |
214 | seq_printf(p, " Local timer interrupts\n"); | |
215 | ||
17081102 AB |
216 | seq_printf(p, "%*s: ", prec, "SPU"); |
217 | for_each_online_cpu(j) | |
218 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs); | |
219 | seq_printf(p, " Spurious interrupts\n"); | |
220 | ||
89713ed1 AB |
221 | seq_printf(p, "%*s: ", prec, "CNT"); |
222 | for_each_online_cpu(j) | |
223 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs); | |
224 | seq_printf(p, " Performance monitoring interrupts\n"); | |
225 | ||
226 | seq_printf(p, "%*s: ", prec, "MCE"); | |
227 | for_each_online_cpu(j) | |
228 | seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions); | |
229 | seq_printf(p, " Machine check exceptions\n"); | |
230 | ||
c86845ed AB |
231 | return 0; |
232 | } | |
233 | ||
89713ed1 AB |
234 | /* |
235 | * /proc/stat helpers | |
236 | */ | |
237 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
238 | { | |
239 | u64 sum = per_cpu(irq_stat, cpu).timer_irqs; | |
240 | ||
241 | sum += per_cpu(irq_stat, cpu).pmu_irqs; | |
242 | sum += per_cpu(irq_stat, cpu).mce_exceptions; | |
17081102 | 243 | sum += per_cpu(irq_stat, cpu).spurious_irqs; |
89713ed1 AB |
244 | |
245 | return sum; | |
246 | } | |
247 | ||
1da177e4 | 248 | #ifdef CONFIG_HOTPLUG_CPU |
1c91cc57 | 249 | void migrate_irqs(void) |
1da177e4 | 250 | { |
6cff46f4 | 251 | struct irq_desc *desc; |
1da177e4 LT |
252 | unsigned int irq; |
253 | static int warned; | |
b6decb70 | 254 | cpumask_var_t mask; |
1c91cc57 | 255 | const struct cpumask *map = cpu_online_mask; |
1da177e4 | 256 | |
b6decb70 | 257 | alloc_cpumask_var(&mask, GFP_KERNEL); |
1da177e4 | 258 | |
b6decb70 | 259 | for_each_irq(irq) { |
7bfbc1f2 | 260 | struct irq_data *data; |
e1180287 LB |
261 | struct irq_chip *chip; |
262 | ||
6cff46f4 | 263 | desc = irq_to_desc(irq); |
3cd85192 JB |
264 | if (!desc) |
265 | continue; | |
266 | ||
7bfbc1f2 TG |
267 | data = irq_desc_get_irq_data(desc); |
268 | if (irqd_is_per_cpu(data)) | |
1da177e4 LT |
269 | continue; |
270 | ||
7bfbc1f2 | 271 | chip = irq_data_get_irq_chip(data); |
e1180287 | 272 | |
7bfbc1f2 | 273 | cpumask_and(mask, data->affinity, map); |
b6decb70 | 274 | if (cpumask_any(mask) >= nr_cpu_ids) { |
1da177e4 | 275 | printk("Breaking affinity for irq %i\n", irq); |
b6decb70 | 276 | cpumask_copy(mask, map); |
1da177e4 | 277 | } |
e1180287 | 278 | if (chip->irq_set_affinity) |
7bfbc1f2 | 279 | chip->irq_set_affinity(data, mask, true); |
6cff46f4 | 280 | else if (desc->action && !(warned++)) |
1da177e4 LT |
281 | printk("Cannot set affinity for irq %i\n", irq); |
282 | } | |
283 | ||
b6decb70 AB |
284 | free_cpumask_var(mask); |
285 | ||
1da177e4 LT |
286 | local_irq_enable(); |
287 | mdelay(1); | |
288 | local_irq_disable(); | |
289 | } | |
290 | #endif | |
291 | ||
f2694ba5 ME |
292 | static inline void handle_one_irq(unsigned int irq) |
293 | { | |
294 | struct thread_info *curtp, *irqtp; | |
295 | unsigned long saved_sp_limit; | |
296 | struct irq_desc *desc; | |
f2694ba5 | 297 | |
2e455257 MM |
298 | desc = irq_to_desc(irq); |
299 | if (!desc) | |
300 | return; | |
301 | ||
f2694ba5 ME |
302 | /* Switch to the irq stack to handle this */ |
303 | curtp = current_thread_info(); | |
304 | irqtp = hardirq_ctx[smp_processor_id()]; | |
305 | ||
306 | if (curtp == irqtp) { | |
307 | /* We're already on the irq stack, just handle it */ | |
2e455257 | 308 | desc->handle_irq(irq, desc); |
f2694ba5 ME |
309 | return; |
310 | } | |
311 | ||
f2694ba5 ME |
312 | saved_sp_limit = current->thread.ksp_limit; |
313 | ||
f2694ba5 ME |
314 | irqtp->task = curtp->task; |
315 | irqtp->flags = 0; | |
316 | ||
317 | /* Copy the softirq bits in preempt_count so that the | |
318 | * softirq checks work in the hardirq context. */ | |
319 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
320 | (curtp->preempt_count & SOFTIRQ_MASK); | |
321 | ||
322 | current->thread.ksp_limit = (unsigned long)irqtp + | |
323 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
324 | ||
835363e6 | 325 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
326 | current->thread.ksp_limit = saved_sp_limit; |
327 | irqtp->task = NULL; | |
328 | ||
329 | /* Set any flag that may have been set on the | |
330 | * alternate stack | |
331 | */ | |
332 | if (irqtp->flags) | |
333 | set_bits(irqtp->flags, &curtp->flags); | |
334 | } | |
f2694ba5 | 335 | |
d7cb10d6 ME |
336 | static inline void check_stack_overflow(void) |
337 | { | |
338 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
339 | long sp; | |
340 | ||
341 | sp = __get_SP() & (THREAD_SIZE-1); | |
342 | ||
343 | /* check for stack overflow: is there less than 2KB free? */ | |
344 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
345 | printk("do_IRQ: stack overflow: %ld\n", | |
346 | sp - sizeof(struct thread_info)); | |
347 | dump_stack(); | |
348 | } | |
349 | #endif | |
350 | } | |
351 | ||
1da177e4 LT |
352 | void do_IRQ(struct pt_regs *regs) |
353 | { | |
7d12e780 | 354 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 355 | unsigned int irq; |
1da177e4 | 356 | |
1bf4af16 AB |
357 | trace_irq_entry(regs); |
358 | ||
4b218e9b | 359 | irq_enter(); |
1da177e4 | 360 | |
d7cb10d6 | 361 | check_stack_overflow(); |
1da177e4 | 362 | |
35a84c2f | 363 | irq = ppc_md.get_irq(); |
1da177e4 | 364 | |
f2694ba5 ME |
365 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
366 | handle_one_irq(irq); | |
367 | else if (irq != NO_IRQ_IGNORE) | |
17081102 | 368 | __get_cpu_var(irq_stat).spurious_irqs++; |
e199500c | 369 | |
4b218e9b | 370 | irq_exit(); |
7d12e780 | 371 | set_irq_regs(old_regs); |
756e7104 | 372 | |
e199500c | 373 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
374 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
375 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
376 | get_lppaca()->int_dword.fields.decr_int = 0; |
377 | /* Signal a fake decrementer interrupt */ | |
378 | timer_interrupt(regs); | |
e199500c SR |
379 | } |
380 | #endif | |
1bf4af16 AB |
381 | |
382 | trace_irq_exit(regs); | |
e199500c | 383 | } |
1da177e4 LT |
384 | |
385 | void __init init_IRQ(void) | |
386 | { | |
70584578 SR |
387 | if (ppc_md.init_IRQ) |
388 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
389 | |
390 | exc_lvl_ctx_init(); | |
391 | ||
1da177e4 LT |
392 | irq_ctx_init(); |
393 | } | |
394 | ||
bcf0b088 KG |
395 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
396 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
397 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
398 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
399 | ||
400 | void exc_lvl_ctx_init(void) | |
401 | { | |
402 | struct thread_info *tp; | |
ca1769f7 | 403 | int i, cpu_nr; |
bcf0b088 KG |
404 | |
405 | for_each_possible_cpu(i) { | |
ca1769f7 ME |
406 | #ifdef CONFIG_PPC64 |
407 | cpu_nr = i; | |
408 | #else | |
409 | cpu_nr = get_hard_smp_processor_id(i); | |
410 | #endif | |
411 | memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE); | |
412 | tp = critirq_ctx[cpu_nr]; | |
413 | tp->cpu = cpu_nr; | |
bcf0b088 KG |
414 | tp->preempt_count = 0; |
415 | ||
416 | #ifdef CONFIG_BOOKE | |
ca1769f7 ME |
417 | memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE); |
418 | tp = dbgirq_ctx[cpu_nr]; | |
419 | tp->cpu = cpu_nr; | |
bcf0b088 KG |
420 | tp->preempt_count = 0; |
421 | ||
ca1769f7 ME |
422 | memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE); |
423 | tp = mcheckirq_ctx[cpu_nr]; | |
424 | tp->cpu = cpu_nr; | |
bcf0b088 KG |
425 | tp->preempt_count = HARDIRQ_OFFSET; |
426 | #endif | |
427 | } | |
428 | } | |
429 | #endif | |
1da177e4 | 430 | |
22722051 AM |
431 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
432 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
433 | |
434 | void irq_ctx_init(void) | |
435 | { | |
436 | struct thread_info *tp; | |
437 | int i; | |
438 | ||
0e551954 | 439 | for_each_possible_cpu(i) { |
1da177e4 LT |
440 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
441 | tp = softirq_ctx[i]; | |
442 | tp->cpu = i; | |
e6768a4f | 443 | tp->preempt_count = 0; |
1da177e4 LT |
444 | |
445 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
446 | tp = hardirq_ctx[i]; | |
447 | tp->cpu = i; | |
448 | tp->preempt_count = HARDIRQ_OFFSET; | |
449 | } | |
450 | } | |
451 | ||
c6622f63 PM |
452 | static inline void do_softirq_onstack(void) |
453 | { | |
454 | struct thread_info *curtp, *irqtp; | |
85218827 | 455 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
456 | |
457 | curtp = current_thread_info(); | |
458 | irqtp = softirq_ctx[smp_processor_id()]; | |
459 | irqtp->task = curtp->task; | |
85218827 KG |
460 | current->thread.ksp_limit = (unsigned long)irqtp + |
461 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 462 | call_do_softirq(irqtp); |
85218827 | 463 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
464 | irqtp->task = NULL; |
465 | } | |
1da177e4 | 466 | |
1da177e4 LT |
467 | void do_softirq(void) |
468 | { | |
469 | unsigned long flags; | |
1da177e4 LT |
470 | |
471 | if (in_interrupt()) | |
1da177e4 LT |
472 | return; |
473 | ||
1da177e4 | 474 | local_irq_save(flags); |
1da177e4 | 475 | |
912b2539 | 476 | if (local_softirq_pending()) |
c6622f63 | 477 | do_softirq_onstack(); |
1da177e4 LT |
478 | |
479 | local_irq_restore(flags); | |
1da177e4 | 480 | } |
1da177e4 | 481 | |
1da177e4 | 482 | |
1da177e4 | 483 | /* |
0ebfff14 | 484 | * IRQ controller and virtual interrupts |
1da177e4 LT |
485 | */ |
486 | ||
476eb491 GL |
487 | /* The main irq map itself is an array of NR_IRQ entries containing the |
488 | * associate host and irq number. An entry with a host of NULL is free. | |
489 | * An entry can be allocated if it's free, the allocator always then sets | |
490 | * hwirq first to the host's invalid irq number and then fills ops. | |
491 | */ | |
492 | struct irq_map_entry { | |
493 | irq_hw_number_t hwirq; | |
494 | struct irq_host *host; | |
495 | }; | |
496 | ||
0ebfff14 | 497 | static LIST_HEAD(irq_hosts); |
f95e085b | 498 | static DEFINE_RAW_SPINLOCK(irq_big_lock); |
150c6c8f | 499 | static DEFINE_MUTEX(revmap_trees_mutex); |
476eb491 | 500 | static struct irq_map_entry irq_map[NR_IRQS]; |
0ebfff14 BH |
501 | static unsigned int irq_virq_count = NR_IRQS; |
502 | static struct irq_host *irq_default_host; | |
1da177e4 | 503 | |
476eb491 GL |
504 | irq_hw_number_t irqd_to_hwirq(struct irq_data *d) |
505 | { | |
506 | return irq_map[d->irq].hwirq; | |
507 | } | |
508 | EXPORT_SYMBOL_GPL(irqd_to_hwirq); | |
509 | ||
35923f12 OJ |
510 | irq_hw_number_t virq_to_hw(unsigned int virq) |
511 | { | |
512 | return irq_map[virq].hwirq; | |
513 | } | |
514 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
515 | ||
3ee62d36 MM |
516 | bool virq_is_host(unsigned int virq, struct irq_host *host) |
517 | { | |
518 | return irq_map[virq].host == host; | |
519 | } | |
520 | EXPORT_SYMBOL_GPL(virq_is_host); | |
521 | ||
68158006 ME |
522 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
523 | { | |
524 | return h->of_node != NULL && h->of_node == np; | |
525 | } | |
526 | ||
5669c3cf | 527 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
528 | unsigned int revmap_type, |
529 | unsigned int revmap_arg, | |
530 | struct irq_host_ops *ops, | |
531 | irq_hw_number_t inval_irq) | |
1da177e4 | 532 | { |
0ebfff14 BH |
533 | struct irq_host *host; |
534 | unsigned int size = sizeof(struct irq_host); | |
535 | unsigned int i; | |
536 | unsigned int *rmap; | |
537 | unsigned long flags; | |
538 | ||
539 | /* Allocate structure and revmap table if using linear mapping */ | |
540 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
541 | size += revmap_arg * sizeof(unsigned int); | |
3af259d1 | 542 | host = kzalloc(size, GFP_KERNEL); |
0ebfff14 BH |
543 | if (host == NULL) |
544 | return NULL; | |
7d01c880 | 545 | |
0ebfff14 BH |
546 | /* Fill structure */ |
547 | host->revmap_type = revmap_type; | |
548 | host->inval_irq = inval_irq; | |
549 | host->ops = ops; | |
19fc65b5 | 550 | host->of_node = of_node_get(of_node); |
7d01c880 | 551 | |
68158006 ME |
552 | if (host->ops->match == NULL) |
553 | host->ops->match = default_irq_host_match; | |
7d01c880 | 554 | |
f95e085b | 555 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
556 | |
557 | /* If it's a legacy controller, check for duplicates and | |
558 | * mark it as allocated (we use irq 0 host pointer for that | |
559 | */ | |
560 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
561 | if (irq_map[0].host != NULL) { | |
f95e085b | 562 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
3d1b5e20 MM |
563 | of_node_put(host->of_node); |
564 | kfree(host); | |
0ebfff14 BH |
565 | return NULL; |
566 | } | |
567 | irq_map[0].host = host; | |
568 | } | |
569 | ||
570 | list_add(&host->link, &irq_hosts); | |
f95e085b | 571 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
572 | |
573 | /* Additional setups per revmap type */ | |
574 | switch(revmap_type) { | |
575 | case IRQ_HOST_MAP_LEGACY: | |
576 | /* 0 is always the invalid number for legacy */ | |
577 | host->inval_irq = 0; | |
578 | /* setup us as the host for all legacy interrupts */ | |
579 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 580 | irq_map[i].hwirq = i; |
0ebfff14 BH |
581 | smp_wmb(); |
582 | irq_map[i].host = host; | |
583 | smp_wmb(); | |
584 | ||
0ebfff14 BH |
585 | /* Legacy flags are left to default at this point, |
586 | * one can then use irq_create_mapping() to | |
c03983ac | 587 | * explicitly change them |
0ebfff14 | 588 | */ |
6e99e458 | 589 | ops->map(host, i, i); |
41fb5e62 MM |
590 | |
591 | /* Clear norequest flags */ | |
592 | irq_clear_status_flags(i, IRQ_NOREQUEST); | |
0ebfff14 BH |
593 | } |
594 | break; | |
595 | case IRQ_HOST_MAP_LINEAR: | |
596 | rmap = (unsigned int *)(host + 1); | |
597 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 598 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
599 | host->revmap_data.linear.size = revmap_arg; |
600 | smp_wmb(); | |
601 | host->revmap_data.linear.revmap = rmap; | |
602 | break; | |
3af259d1 MM |
603 | case IRQ_HOST_MAP_TREE: |
604 | INIT_RADIX_TREE(&host->revmap_data.tree, GFP_KERNEL); | |
605 | break; | |
0ebfff14 BH |
606 | default: |
607 | break; | |
608 | } | |
609 | ||
610 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
611 | ||
612 | return host; | |
1da177e4 LT |
613 | } |
614 | ||
0ebfff14 | 615 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 616 | { |
0ebfff14 BH |
617 | struct irq_host *h, *found = NULL; |
618 | unsigned long flags; | |
619 | ||
620 | /* We might want to match the legacy controller last since | |
621 | * it might potentially be set to match all interrupts in | |
622 | * the absence of a device node. This isn't a problem so far | |
623 | * yet though... | |
624 | */ | |
f95e085b | 625 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 | 626 | list_for_each_entry(h, &irq_hosts, link) |
68158006 | 627 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
628 | found = h; |
629 | break; | |
630 | } | |
f95e085b | 631 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
632 | return found; |
633 | } | |
634 | EXPORT_SYMBOL_GPL(irq_find_host); | |
635 | ||
636 | void irq_set_default_host(struct irq_host *host) | |
637 | { | |
638 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 639 | |
0ebfff14 BH |
640 | irq_default_host = host; |
641 | } | |
1da177e4 | 642 | |
0ebfff14 BH |
643 | void irq_set_virq_count(unsigned int count) |
644 | { | |
645 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 646 | |
0ebfff14 BH |
647 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
648 | if (count < NR_IRQS) | |
649 | irq_virq_count = count; | |
650 | } | |
651 | ||
6fde40f3 ME |
652 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
653 | irq_hw_number_t hwirq) | |
654 | { | |
a9d8946b | 655 | int res; |
cd015707 | 656 | |
a9d8946b TG |
657 | res = irq_alloc_desc_at(virq, 0); |
658 | if (res != virq) { | |
cd015707 ME |
659 | pr_debug("irq: -> allocating desc failed\n"); |
660 | goto error; | |
661 | } | |
662 | ||
6fde40f3 ME |
663 | /* map it */ |
664 | smp_wmb(); | |
665 | irq_map[virq].hwirq = hwirq; | |
666 | smp_mb(); | |
667 | ||
668 | if (host->ops->map(host, virq, hwirq)) { | |
669 | pr_debug("irq: -> mapping failed, freeing\n"); | |
a9d8946b | 670 | goto errdesc; |
6fde40f3 ME |
671 | } |
672 | ||
41fb5e62 MM |
673 | irq_clear_status_flags(virq, IRQ_NOREQUEST); |
674 | ||
6fde40f3 | 675 | return 0; |
cd015707 | 676 | |
a9d8946b TG |
677 | errdesc: |
678 | irq_free_descs(virq, 1); | |
cd015707 ME |
679 | error: |
680 | irq_free_virt(virq, 1); | |
681 | return -1; | |
6fde40f3 | 682 | } |
8ec8f2e8 | 683 | |
ee51de56 ME |
684 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
685 | { | |
686 | unsigned int virq; | |
687 | ||
688 | if (host == NULL) | |
689 | host = irq_default_host; | |
690 | ||
691 | BUG_ON(host == NULL); | |
692 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
693 | ||
694 | virq = irq_alloc_virt(host, 1, 0); | |
695 | if (virq == NO_IRQ) { | |
696 | pr_debug("irq: create_direct virq allocation failed\n"); | |
697 | return NO_IRQ; | |
698 | } | |
699 | ||
700 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
701 | ||
702 | if (irq_setup_virq(host, virq, virq)) | |
703 | return NO_IRQ; | |
704 | ||
705 | return virq; | |
706 | } | |
707 | ||
0ebfff14 | 708 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 709 | irq_hw_number_t hwirq) |
0ebfff14 BH |
710 | { |
711 | unsigned int virq, hint; | |
712 | ||
6e99e458 | 713 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
714 | |
715 | /* Look for default host if nececssary */ | |
716 | if (host == NULL) | |
717 | host = irq_default_host; | |
718 | if (host == NULL) { | |
719 | printk(KERN_WARNING "irq_create_mapping called for" | |
720 | " NULL host, hwirq=%lx\n", hwirq); | |
721 | WARN_ON(1); | |
722 | return NO_IRQ; | |
1da177e4 | 723 | } |
0ebfff14 | 724 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 725 | |
8142f032 | 726 | /* Check if mapping already exists */ |
0ebfff14 | 727 | virq = irq_find_mapping(host, hwirq); |
f5921697 | 728 | if (virq != NO_IRQ) { |
0ebfff14 | 729 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 730 | return virq; |
1da177e4 LT |
731 | } |
732 | ||
0ebfff14 BH |
733 | /* Get a virtual interrupt number */ |
734 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
735 | /* Handle legacy */ | |
736 | virq = (unsigned int)hwirq; | |
737 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
738 | return NO_IRQ; | |
739 | return virq; | |
740 | } else { | |
741 | /* Allocate a virtual interrupt number */ | |
742 | hint = hwirq % irq_virq_count; | |
743 | virq = irq_alloc_virt(host, 1, hint); | |
744 | if (virq == NO_IRQ) { | |
745 | pr_debug("irq: -> virq allocation failed\n"); | |
746 | return NO_IRQ; | |
747 | } | |
748 | } | |
0ebfff14 | 749 | |
6fde40f3 | 750 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 751 | return NO_IRQ; |
6fde40f3 | 752 | |
c7d07fdd ME |
753 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
754 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
755 | ||
1da177e4 | 756 | return virq; |
0ebfff14 BH |
757 | } |
758 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
759 | ||
f3d2ab41 | 760 | unsigned int irq_create_of_mapping(struct device_node *controller, |
40d50cf7 | 761 | const u32 *intspec, unsigned int intsize) |
0ebfff14 BH |
762 | { |
763 | struct irq_host *host; | |
764 | irq_hw_number_t hwirq; | |
6e99e458 BH |
765 | unsigned int type = IRQ_TYPE_NONE; |
766 | unsigned int virq; | |
1da177e4 | 767 | |
0ebfff14 BH |
768 | if (controller == NULL) |
769 | host = irq_default_host; | |
770 | else | |
771 | host = irq_find_host(controller); | |
6e99e458 BH |
772 | if (host == NULL) { |
773 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
774 | controller->full_name); | |
0ebfff14 | 775 | return NO_IRQ; |
6e99e458 | 776 | } |
0ebfff14 BH |
777 | |
778 | /* If host has no translation, then we assume interrupt line */ | |
779 | if (host->ops->xlate == NULL) | |
780 | hwirq = intspec[0]; | |
781 | else { | |
782 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 783 | &hwirq, &type)) |
0ebfff14 | 784 | return NO_IRQ; |
1da177e4 | 785 | } |
0ebfff14 | 786 | |
6e99e458 BH |
787 | /* Create mapping */ |
788 | virq = irq_create_mapping(host, hwirq); | |
789 | if (virq == NO_IRQ) | |
790 | return virq; | |
791 | ||
792 | /* Set type if specified and different than the current one */ | |
793 | if (type != IRQ_TYPE_NONE && | |
7bfbc1f2 | 794 | type != (irqd_get_trigger_type(irq_get_irq_data(virq)))) |
ec775d0e | 795 | irq_set_irq_type(virq, type); |
6e99e458 | 796 | return virq; |
1da177e4 | 797 | } |
0ebfff14 | 798 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 799 | |
0ebfff14 BH |
800 | void irq_dispose_mapping(unsigned int virq) |
801 | { | |
5414c6be | 802 | struct irq_host *host; |
0ebfff14 | 803 | irq_hw_number_t hwirq; |
1da177e4 | 804 | |
5414c6be ME |
805 | if (virq == NO_IRQ) |
806 | return; | |
807 | ||
808 | host = irq_map[virq].host; | |
2d441681 | 809 | if (WARN_ON(host == NULL)) |
0ebfff14 | 810 | return; |
1da177e4 | 811 | |
0ebfff14 BH |
812 | /* Never unmap legacy interrupts */ |
813 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
814 | return; | |
1da177e4 | 815 | |
41fb5e62 MM |
816 | irq_set_status_flags(virq, IRQ_NOREQUEST); |
817 | ||
0ebfff14 | 818 | /* remove chip and handler */ |
ec775d0e | 819 | irq_set_chip_and_handler(virq, NULL, NULL); |
0ebfff14 BH |
820 | |
821 | /* Make sure it's completed */ | |
822 | synchronize_irq(virq); | |
823 | ||
824 | /* Tell the PIC about it */ | |
825 | if (host->ops->unmap) | |
826 | host->ops->unmap(host, virq); | |
827 | smp_mb(); | |
828 | ||
829 | /* Clear reverse map */ | |
830 | hwirq = irq_map[virq].hwirq; | |
831 | switch(host->revmap_type) { | |
832 | case IRQ_HOST_MAP_LINEAR: | |
833 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 834 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
835 | break; |
836 | case IRQ_HOST_MAP_TREE: | |
150c6c8f | 837 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 838 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 839 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
840 | break; |
841 | } | |
1da177e4 | 842 | |
0ebfff14 BH |
843 | /* Destroy map */ |
844 | smp_mb(); | |
845 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 846 | |
a9d8946b | 847 | irq_free_descs(virq, 1); |
0ebfff14 BH |
848 | /* Free it */ |
849 | irq_free_virt(virq, 1); | |
1da177e4 | 850 | } |
0ebfff14 | 851 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 852 | |
0ebfff14 BH |
853 | unsigned int irq_find_mapping(struct irq_host *host, |
854 | irq_hw_number_t hwirq) | |
855 | { | |
856 | unsigned int i; | |
857 | unsigned int hint = hwirq % irq_virq_count; | |
858 | ||
859 | /* Look for default host if nececssary */ | |
860 | if (host == NULL) | |
861 | host = irq_default_host; | |
862 | if (host == NULL) | |
863 | return NO_IRQ; | |
864 | ||
865 | /* legacy -> bail early */ | |
866 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
867 | return hwirq; | |
868 | ||
869 | /* Slow path does a linear search of the map */ | |
870 | if (hint < NUM_ISA_INTERRUPTS) | |
871 | hint = NUM_ISA_INTERRUPTS; | |
872 | i = hint; | |
873 | do { | |
874 | if (irq_map[i].host == host && | |
875 | irq_map[i].hwirq == hwirq) | |
876 | return i; | |
877 | i++; | |
878 | if (i >= irq_virq_count) | |
879 | i = NUM_ISA_INTERRUPTS; | |
880 | } while(i != hint); | |
881 | return NO_IRQ; | |
882 | } | |
883 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 884 | |
0ebfff14 | 885 | |
967e012e SD |
886 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
887 | irq_hw_number_t hwirq) | |
1da177e4 | 888 | { |
0ebfff14 BH |
889 | struct irq_map_entry *ptr; |
890 | unsigned int virq; | |
1da177e4 | 891 | |
2d441681 MM |
892 | if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_TREE)) |
893 | return irq_find_mapping(host, hwirq); | |
1da177e4 | 894 | |
150c6c8f | 895 | /* |
9b788251 MM |
896 | * The ptr returned references the static global irq_map. |
897 | * but freeing an irq can delete nodes along the path to | |
898 | * do the lookup via call_rcu. | |
150c6c8f | 899 | */ |
9b788251 | 900 | rcu_read_lock(); |
967e012e | 901 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
9b788251 | 902 | rcu_read_unlock(); |
8ec8f2e8 | 903 | |
967e012e SD |
904 | /* |
905 | * If found in radix tree, then fine. | |
906 | * Else fallback to linear lookup - this should not happen in practice | |
907 | * as it means that we failed to insert the node in the radix tree. | |
908 | */ | |
909 | if (ptr) | |
0ebfff14 | 910 | virq = ptr - irq_map; |
967e012e SD |
911 | else |
912 | virq = irq_find_mapping(host, hwirq); | |
913 | ||
914 | return virq; | |
915 | } | |
916 | ||
917 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
918 | irq_hw_number_t hwirq) | |
919 | { | |
2d441681 MM |
920 | if (WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE)) |
921 | return; | |
967e012e | 922 | |
8ec8f2e8 | 923 | if (virq != NO_IRQ) { |
150c6c8f | 924 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
925 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
926 | &irq_map[virq]); | |
150c6c8f | 927 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 928 | } |
1da177e4 LT |
929 | } |
930 | ||
0ebfff14 BH |
931 | unsigned int irq_linear_revmap(struct irq_host *host, |
932 | irq_hw_number_t hwirq) | |
c6622f63 | 933 | { |
0ebfff14 | 934 | unsigned int *revmap; |
c6622f63 | 935 | |
2d441681 MM |
936 | if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_LINEAR)) |
937 | return irq_find_mapping(host, hwirq); | |
0ebfff14 BH |
938 | |
939 | /* Check revmap bounds */ | |
940 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
941 | return irq_find_mapping(host, hwirq); | |
942 | ||
943 | /* Check if revmap was allocated */ | |
944 | revmap = host->revmap_data.linear.revmap; | |
945 | if (unlikely(revmap == NULL)) | |
946 | return irq_find_mapping(host, hwirq); | |
947 | ||
948 | /* Fill up revmap with slow path if no mapping found */ | |
949 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
950 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
951 | ||
952 | return revmap[hwirq]; | |
c6622f63 PM |
953 | } |
954 | ||
0ebfff14 BH |
955 | unsigned int irq_alloc_virt(struct irq_host *host, |
956 | unsigned int count, | |
957 | unsigned int hint) | |
958 | { | |
959 | unsigned long flags; | |
960 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 961 | |
0ebfff14 BH |
962 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
963 | return NO_IRQ; | |
964 | ||
f95e085b | 965 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
966 | |
967 | /* Use hint for 1 interrupt if any */ | |
968 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
969 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
970 | found = hint; | |
971 | goto hint_found; | |
972 | } | |
973 | ||
974 | /* Look for count consecutive numbers in the allocatable | |
975 | * (non-legacy) space | |
976 | */ | |
e1251465 ME |
977 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
978 | if (irq_map[i].host != NULL) | |
979 | j = 0; | |
980 | else | |
981 | j++; | |
982 | ||
983 | if (j == count) { | |
984 | found = i - count + 1; | |
985 | break; | |
986 | } | |
0ebfff14 BH |
987 | } |
988 | if (found == NO_IRQ) { | |
f95e085b | 989 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
990 | return NO_IRQ; |
991 | } | |
992 | hint_found: | |
993 | for (i = found; i < (found + count); i++) { | |
994 | irq_map[i].hwirq = host->inval_irq; | |
995 | smp_wmb(); | |
996 | irq_map[i].host = host; | |
997 | } | |
f95e085b | 998 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
0ebfff14 BH |
999 | return found; |
1000 | } | |
1001 | ||
1002 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
1003 | { |
1004 | unsigned long flags; | |
0ebfff14 | 1005 | unsigned int i; |
1da177e4 | 1006 | |
0ebfff14 BH |
1007 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
1008 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 1009 | |
4dd60290 MM |
1010 | if (virq < NUM_ISA_INTERRUPTS) { |
1011 | if (virq + count < NUM_ISA_INTERRUPTS) | |
1012 | return; | |
1013 | count =- NUM_ISA_INTERRUPTS - virq; | |
1014 | virq = NUM_ISA_INTERRUPTS; | |
1015 | } | |
1016 | ||
1017 | if (count > irq_virq_count || virq > irq_virq_count - count) { | |
1018 | if (virq > irq_virq_count) | |
1019 | return; | |
1020 | count = irq_virq_count - virq; | |
1021 | } | |
1022 | ||
f95e085b | 1023 | raw_spin_lock_irqsave(&irq_big_lock, flags); |
0ebfff14 BH |
1024 | for (i = virq; i < (virq + count); i++) { |
1025 | struct irq_host *host; | |
1da177e4 | 1026 | |
0ebfff14 BH |
1027 | host = irq_map[i].host; |
1028 | irq_map[i].hwirq = host->inval_irq; | |
1029 | smp_wmb(); | |
1030 | irq_map[i].host = NULL; | |
1031 | } | |
f95e085b | 1032 | raw_spin_unlock_irqrestore(&irq_big_lock, flags); |
1da177e4 | 1033 | } |
0ebfff14 | 1034 | |
cd015707 | 1035 | int arch_early_irq_init(void) |
0ebfff14 | 1036 | { |
cd015707 | 1037 | return 0; |
0ebfff14 BH |
1038 | } |
1039 | ||
60b332e7 ME |
1040 | #ifdef CONFIG_VIRQ_DEBUG |
1041 | static int virq_debug_show(struct seq_file *m, void *private) | |
1042 | { | |
1043 | unsigned long flags; | |
97f7d6bc | 1044 | struct irq_desc *desc; |
60b332e7 | 1045 | const char *p; |
4e74fd7d | 1046 | static const char none[] = "none"; |
73706c32 | 1047 | void *data; |
60b332e7 ME |
1048 | int i; |
1049 | ||
73706c32 ME |
1050 | seq_printf(m, "%-5s %-7s %-15s %-18s %s\n", "virq", "hwirq", |
1051 | "chip name", "chip data", "host name"); | |
60b332e7 | 1052 | |
76f1d94f | 1053 | for (i = 1; i < nr_irqs; i++) { |
6cff46f4 | 1054 | desc = irq_to_desc(i); |
76f1d94f ME |
1055 | if (!desc) |
1056 | continue; | |
1057 | ||
239007b8 | 1058 | raw_spin_lock_irqsave(&desc->lock, flags); |
60b332e7 ME |
1059 | |
1060 | if (desc->action && desc->action->handler) { | |
e1180287 LB |
1061 | struct irq_chip *chip; |
1062 | ||
60b332e7 | 1063 | seq_printf(m, "%5d ", i); |
476eb491 | 1064 | seq_printf(m, "0x%05lx ", irq_map[i].hwirq); |
60b332e7 | 1065 | |
ec775d0e | 1066 | chip = irq_desc_get_chip(desc); |
e1180287 LB |
1067 | if (chip && chip->name) |
1068 | p = chip->name; | |
60b332e7 ME |
1069 | else |
1070 | p = none; | |
1071 | seq_printf(m, "%-15s ", p); | |
1072 | ||
73706c32 ME |
1073 | data = irq_desc_get_chip_data(desc); |
1074 | seq_printf(m, "0x%16p ", data); | |
1075 | ||
60b332e7 ME |
1076 | if (irq_map[i].host && irq_map[i].host->of_node) |
1077 | p = irq_map[i].host->of_node->full_name; | |
1078 | else | |
1079 | p = none; | |
1080 | seq_printf(m, "%s\n", p); | |
1081 | } | |
1082 | ||
239007b8 | 1083 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
60b332e7 ME |
1084 | } |
1085 | ||
1086 | return 0; | |
1087 | } | |
1088 | ||
1089 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1090 | { | |
1091 | return single_open(file, virq_debug_show, inode->i_private); | |
1092 | } | |
1093 | ||
1094 | static const struct file_operations virq_debug_fops = { | |
1095 | .open = virq_debug_open, | |
1096 | .read = seq_read, | |
1097 | .llseek = seq_lseek, | |
1098 | .release = single_release, | |
1099 | }; | |
1100 | ||
1101 | static int __init irq_debugfs_init(void) | |
1102 | { | |
1103 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1104 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1105 | return -ENOMEM; |
1106 | ||
1107 | return 0; | |
1108 | } | |
1109 | __initcall(irq_debugfs_init); | |
1110 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1111 | ||
c6622f63 | 1112 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1113 | static int __init setup_noirqdistrib(char *str) |
1114 | { | |
1115 | distribute_irqs = 0; | |
1116 | return 1; | |
1117 | } | |
1118 | ||
1119 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1120 | #endif /* CONFIG_PPC64 */ |